MAQ4123 DATA SHEET (11/05/2015) DOWNLOAD

MAQ4123/MAQ4124/MAQ4125
Automotive AEC-Q100 Qualified Dual
3A Peak Low-Side MOSFET Driver
Bipolar/CMOS/DMOS Process
General Description
Features
The MAQ4123/MAQ4124/MAQ4125 are a family of dual
3A buffer/MOSFET drivers intended for driving power
MOSFETs, IGBTs and other heavy loads (capacitive,
resistive or inductive) which require low-impedance, high
peak currents and fast switching times. They are available
in
inverting,
non-inverting
and
complementary
configurations.
The MAQ4123/MAQ4124/MAQ4125 operate from a 4.5V
to 20V supply, feature an output resistance of 2.3Ω, sink or
source 3A of peak current, and switch an 1800pF
capacitive load in 10ns with typical propagation delay
times of 50ns.
The MAQ4123/MAQ4124/MAQ4125 feature TTL or CMOS
compatible inputs with 400mV of hysteresis to provide
noise immunity. The inputs can withstand negative voltage
swings of 5V and are latch-up protected to withstand
200mA of reverse current.
The MAQ4123/MAQ4124/MAQ4125 are rated for the
−40°C to +125°C operating temperature range, have been
AEC-Q100 qualified for automotive applications, and are
available in the ePad SOIC-8 package for improved power
dissipation and thermal performance required by
automotive applications.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
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Automotive AEC-Q100 Qualified
High ±3A peak output current
Wide 4.5V to 20V supply voltage range
Low 2.3Ω output resistance
Matched rise and fall times
Fast 10ns rise/fall times with 1800pF capacitive load
Low propagation delay time of 50ns (typical)
TTL/CMOS logic inputs independent of supply voltage
Latch-up protected to 200mA reverse current
Logic input withstands swing to −5V
Low equivalent 6pF input capacitance
Output voltage swings within 25mV of ground or VS
Low supply current
− 2.0mA with logic-1 input (maximum over
temperature)
− 300μA with logic-0 input (maximum over
temperature)
‘426/7/8-, ‘1426/7/8-, ‘4426/7/8 industry standard pin
out
Inverting, non-inverting, and differential configurations
−40°C to +125°C temperature range
Exposed backside pad (ePad) packaging for improved
power dissipation
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
July 2011
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Ordering Information
Part Number
Configuration
Junction Temperature Range
Lead Finish
Package
MAQ4123YME
Dual Inverting
–40°C to +125°C
Pb-Free
ePad 8-Pin SOIC
MAQ4124YME
Dual Non-Inverting
–40°C to +125°C
Pb-Free
ePad 8-Pin SOIC
MAQ4125YME
Inverting + Non-Inverting
–40°C to +125°C
Pb-Free
ePad 8-Pin SOIC
Pin Configuration
ePad SOIC-8 (ME)
ePad SOIC (ME)
ePad SOIC-8 (ME)
Pin Description
Pin Number
Pin Name
1
NC
Not connected (may be left floating).
2
INA
Input. Control input for the OUTA driver.
3
GND
Ground. Return for both output drive sections and ground reference for both input signals.
4
INB
Input. Control input for the OUTB driver.
5
OUTB
6
VS
7
OUTA
8
NC
Not connected (may be left floating).
ePad
EP
Exposed Pad (ePad). Must make a full connection to the GND plane to maximize thermal
performance of the package.
July 2011
Pin Function
Output Drive. OUTB high-current drive pin.
Supply. +4.5V to +20V. Provides power to both driver outputs and internal control circuitry.
Output Drive. OUTA high-current driver pin.
2
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Functional Diagram
July 2011
3
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VS)..................................................... +24V
Input Voltage (VIN) .......................... VS + 0.3V to GND – 5V
Maximum Junction Temperature (TJ)......................... 150°C
Storage Temperature (Ts)........................... –65°C to 150°C
Lead Temperature (soldering, 10s)............................ 260°C
ESD HBM Rating(3)......................................................... 2kV
ESD MM Rating(3) .........................................................200V
Supply Voltage (VS)....................................... +4.5V to +20V
Junction Temperature (TJ) ........................ –40°C to +125°C
Package Thermal Resistance
ePad SOIC-8 (θJA) .............................................41°C/W
ePad SOIC-8(θJC)…………………...…………14.7°C/W
Electrical Characteristics(4)
4.5V ≤ VS ≤ 20V; TA = +25°C, bold values indicate –40°C ≤ TJ ≤ +125°C, unless noted. Input voltage slew rate >2.5V/µs.
Symbol
Parameter
Condition
Min.
Typ.
2.4
1.6
Max.
Units
Input
VIH
Logic 1 Input Voltage
VIL
Logic 0 Input Voltage
IIN
Input Current
1.45
0V ≤ VIN ≤ VS
–1
–10
VS – 0.025
V
0.8
V
1
10
μA
0.025
V
Output
VOH
High Output Voltage
IOUT = 100μA
VOL
Low Output Voltage
IOUT = –100μA
Output Resistance HI State
RO
Output Resistance LO State
IPK
Peak Output Current
I
Latch-Up Protection
Withstand Reverse Current
IOUT = 10mA, VS = 20V
V
2.3
IOUT = 10mA, VS = 20V
5
8
IOUT = 10mA, VS = 20V
2.2
5
8
IOUT = 10mA, VS = 20V
Ω
Ω
3
A
>200
mA
Switching Time
tR
Rise Time
Test figure 1, CL = 1800pF, VS = 20V
11
35
60
ns
tF
Fall Time
Test figure 1, CL = 1800pF, VS = 20V
11
35
60
ns
tD1
Delay Time
Test figure 1, CL = 1800pF, VS = 20V
40
75
100
ns
tD2
Delay Time
Test figure 1, CL = 1800pF, VS = 20V
60
75
100
ns
Power Supply
IS
Power Supply Current
VIN = 3.0V (both inputs)
0.75
1.5
2.0
mA
IS
Power Supply Current
VIN = 0.0V (both inputs)
0.05
0.25
0.30
mA
Notes:
1.
Exceeding the absolute maximum rating may damage the device.
2.
The device is not guaranteed to function outside its operating rating.
3.
Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
4.
Specification for packaged product only.
July 2011
4
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Test Circuit
Figure 1a. Inverting Driver Switching Time
Figure 1b. Non-Inverting Driver Switching Time
July 2011
5
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Typical Characteristics
1.0
12
V IN = 3V
0.7
0.6
0.5
0.4
0.3
0.2
V IN = 0V
0.1
CL=1.8nF
10
8
CL=1nF
6
CL=0.47nF
4
CL=0nF
2
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
0
0.0
4
6
8
10
12
14
16
18
35
30
25
6
8
10
12
14
16
18
SUPPLY VOLTAGE (V)
Input Pin Current (IIN)
vs. Supply Voltage
Input Pin Threshold Voltage
vs. Supply Voltage
15
20
4
VIN =VS
20
15
VIN =5V
10
5
OUTPUT VOLTAGE (mV)
1.8
INPUT THRESHOLD (V)
35
25
1.8
INPUT RISING
1.7
1.6
1.5
1.4
INPUT FALLING
1.3
1.2
1.1
0
12
14
16
18
6
8
10
12
14
16
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Output Resistance
vs. Supply Voltage
Peak Output Current
vs. Supply Voltage
18
PEAK CURRENT (A)
4.0
3.5
3.0
SOURCE
2.5
SINK
6
8
10
12
14
16
SUPPLY VOLTAGE (V)
July 2011
18
20
20
18
20
IOUT=100μA
1.4
V S-V OH
1.2
1.0
0.8
0.6
V OL
0.4
4
6
8
10
12
14
16
Output Rise/Fall Time
vs. Supply Voltage
CL=1.8nF
22
OUTPUT CLAMPED AT 5V
4.0
20
SOURCE
tR
18
3.5
16
3.0
2.5
2.0
1.5
14
12
10
tF
8
SINK
6
1.0
4
2
0
0.0
4
18
SUPPLY VOLTAGE (V)
0.5
1.5
16
24
4.5
4.5
14
1.6
20
5.0
5.0
12
0.0
4
20
10
0.2
1.0
10
8
Output Voltage
vs. Supply Voltage
2.0
30
6
SUPPLY VOLTAGE (V)
1.9
2.0
CL=3.3nF
10
2.0
8
CL=4.7nF
20
0
4
20
SUPPLY VOLTAGE (V)
6
CL=10nF
40
40
4
fs=100kHz
45
5
tR/tF(ns)
SUPPLY CURRENT (mA)
0.8
CURRENT (nA)
50
fs=100kHz
0.9
RDSON (Ω)
Supply Current (IS)
vs. Supply Voltage
Supply Current (IS)
vs. Supply Voltage
Supply Current (IS)
vs. Supply Voltage
4
6
8
10
12
14
16
SUPPLY VOLTAGE (V)
6
18
20
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (V)
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Typical Characteristics (Continued)
110
INVERTING DRIVER
CL=1.8nF
90
55
50
t D2
45
80
70
60
40
50
35
40
t D1
30
tD2
t D1
6
8
10
12
14
16
18
20
85
80
75
70
65
60
4
6
8
SUPPLY VOLTAGE (V)
10
12
14
16
18
20
4
0.06
12VS
0.05
5VS
0.04
0.03
0.02
1.6
20VS
5.5
12VS
5.0
1.4
5V S
1.2
1.0
0.8
0.6
0.4
0.2
0.01
-50
-25
0
25
50
75
100
125
-25
0
TEMPERATURE (°C)
4.0
V IN =100kHz
3.5
CL=0nF
3.0
2.0
1.5
1.0
25
50
75
100
125
5V S
INPUT PIN CURRENT (nA)
12VS
0
25
50
75
100
TEMPERATURE (°C)
July 2011
-25
125
150
0
25
50
75
100
125
150
TEMPERATURE (°C)
Input Pin Current (IIN)
vs. Temperature
80
VIN =VS
160
20V S
140
12VS
120
100
5VS
80
60
40
20
0
-25
5VS
-50
150
180
CL = 1.8nF
-50
12VS
2.5
200
V IN = 100kHz
20
4.5
Input Pin Current (IIN)
vs. Temperature
20VS
18
20VS
TEMPERATURE (°C)
Supply Current (IS)
vs. Temperature
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
16
0.0
-50
150
14
0.5
0.0
0.00
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
20VS
12
6.0
VIN =VS
1.8
0.08
10
Supply Current (IS)
vs. Temperature
2.0
0.07
8
SUPPLY VOLTAGE (V)
Supply Current (IS)
vs. Temperature
VIN = 0V
0.09
6
SUPPLY VOLTAGE (V)
Supply Current (IS)
vs. Temperature
0.10
SUPPLY CURRENT (mA)
90
30
4
CL=1.8nF
INPUT PULSE WIDTH = 50ns
95
INPUT PIN CURRENT (nA)
tD1/tD2 (ns)
60
100
NON-INVERTING DRIVER
CL=1.8nF
100
tD1/tD2 (ns)
65
OUTPUT PULSE WIDTH (ns)
70
SUPPLY CURRENT (mA)
Pulse Stretching
vs. Supply Voltage
Propagation Delay Time
vs. Supply Voltage
Propagation Delay Time
vs. Supply Voltage
70
5VS
V IN =5V
60
12VS
50
20VS
40
30
20
10
0
-50
-25
0
25
50
75
100 125
TEMPERATURE (°C)
7
150
-50
-25
0
25
50
75
100
125
150
TEMPERATURE (°C)
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Typical Characteristics (Continued)
Input Pin Rising Threshold
vs. Temperature
Input Pin Falling Threshold
vs. Temperature
2.0
12VS
1.6
5V S
1.5
1.4
1.3
1.2
1.8
1.5
1.3
1.0
50
75
100
125
5VS
150
-25
50
75
100
125
150
-50
RDSON (Ω)
20VS
0.20
12VS
3.5
20VS
3.0
2.5
1.0
0.5
0.00
0.0
100
125
-25
TEMPERATURE (°C)
CL=1.8nF
0
25
50
75
100
125
-50
150
5V S
CL=1.8nF
5VS
15
12VS
10
0
-25
0
25
50
75
100
TEMPERATURE (°C)
July 2011
125
150
150
5VS
70
60
20VS
40
0
-50
125
50
5
5
100
12VS
10
20VS
75
80
20VS
tD1 (ns)
tF (ns)
15
50
NON-INVERTING DRIVER
CL=1.8nF
90
20
12VS
25
Output tD1Time
vs. Temperature
100
25
25
0
TEMPERATURE (°C)
Output Fall Time
vs. Temperature
30
30
20
-25
TEMPERATURE (°C)
Output Rise Time
vs. Temperature
35
20V S
0.0
-50
150
12VS
2.5
0.5
75
5V S
3.0
0.05
50
150
3.5
1.5
25
125
4.0
1.0
0
100
4.5
4.0
1.5
-25
75
5.0
2.0
0.10
50
5.5
2.0
0.15
25
6.0
5VS
4.5
0.30
0
Output Sink Resistance
vs. Temperature
5.0
12VS
-50
-25
TEMPERATURE (°C)
5.5
0.35
VOL (mV)
25
Output Source Resistance
vs. Temperature
6.0
0.25
0
TEMPERATURE (°C)
5VS
0.40
12VS
5VS
-50
VOL
vs. Temperature
0.45
1.5
0.5
TEMPERATURE (°C)
0.50
20VS
1.0
1.2
1.1
25
12VS
1.4
1.0
0
20VS
1.6
1.1
-25
2.0
1.7
RDSON (Ω)
1.7
VOH (mV)
VIN THRESHOLD (V)
VIN THRESHOLD (V)
1.9
1.8
-50
tR (ns)
2.5
2.0
20VS
1.9
VOH
vs. Temperature
30
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
8
125
150
-50
-25
0
25
50
75
100
125
150
TEMPERATURE (°C)
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Typical Characteristics (Continued)
120
70
5V S
NON-INVERTING DRIVER
CL=1.8nF
110
65
60
tD1 (ns)
90
80
55
5VS
50
20VS
60
12VS
50
25
50
75
100
125
12V S
40
35
35
30
-50
150
-25
0
TEMPERATURE (°C)
5V S
75
70
65
60
55
50
12VS
-50
-25
0
25
50
75
100
125
35
12VS
20VS
40
30
20
10
0
1
2
3
4
5
6
7
C L (nF)
July 2011
8
9
10 11 12
75
100
125
150
20VS
30
25
12VS
25
20
12VS
15
20
15
10
10
5VS
100.0
5VS
5
0
10.0
1000.0
100.0
1000.0
FREQUENCY (kHz)
120
110
110
100
100
90
90
FALL TIME (ns)
RISE TIME (ns)
80
50
35
120
90
25
40
Output Fall Time
vs. Load Capacitance (CL)
5VS
0
0
CL=1.8nF
FREQUENCY (kHz)
110
50
-25
Supply Current (IS)
vs. Switching Frequency
30
0
10.0
150
120
60
-50
TEMPERATURE (°C)
20V S
Output Rise Time
vs. Load Capacitance (CL)
70
150
45
40
TEMPERATURE (°C)
100
125
50
5
20VS
45
40
100
CL=0nF
45
85
80
75
50
CL=1.8nF
INPUT PULSE WIDTH = 50ns
95
90
50
Supply Current (IS)
vs. Switching Frequency
SUPPLY CURRENT (mA)
OUTPUT PULSE WIDTH (ns)
105
100
25
TEMPERATURE (°C)
Pulse Stretching (VOUT1)
vs. Temperature
110
12VS
SUPPLY CURRENT (mA)
0
50
40
tD1 Delay
vs. Load Capacitance (CL)
5VS
80
5VS
80
70
20VS
70
12VS
60
12V S
60
20VS
50
tD1 (ns)
-25
20VS
55
45
30
-50
5VS
INVERTING DRIVER
CL=1.8nF
60
20VS
45
70
Output tD2Time
vs. Temperature
70
INVERTING DRIVER
CL=1.8nF
65
100
tD2 (ns)
Output tD1Time
vs. Temperature
tD2 (ns)
Output tD2Time
vs. Temperature
50
40
40
30
30
20
20
10
10
0
0
0
1
2
3
4
5
6
7
C L (nF)
9
8
9
10 11 12
0
1
2
3
4
5
6
7
8
9
10 11 12
C L (nF)
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Typical Characteristics (Continued)
tD2 Delay
vs. Load Capacitance (CL)
6.0
5VS
110
12VS
180
12VS
160
5V S
4.5
80
12VS
4.0
60
50
20V S
140
3.5
3.0
2.5
30
20
10
0
1
2
3
4
5
6
7
8
9
60
1.0
40
0.5
20
0
-7
10 11 12
-6
-5
-4
-3
-2
-1
0
VIN (V)
C L (nF)
-7
-6
-5
-4
-3
-2
-1
0
VIN (V)
Input Pulse Width
vs. Output Pulse Width
Negative IIN
vs. Negative VIN
0
100
1.5
0.0
0
120
80
2.0
40
20VS
200
5.0
20VS
70
220
5V S
90
IIN (mA)
tD2 (ns)
100
Supply Current (IS)
vs. Negative VIN
5.5
IS (µA)
120
Input Pin Current (IIN)
vs. Negative VIN
1000
VS=12V
-1
tPW_OUTPUT(ns)
IIN (mA)
-2
-3
-4
125°C
-5
100
12VS
-6
4.5VS
-7
25°C
20VS
-8
-7
-6
-5
-4
-3
-2
-1
0
VIN (V)
July 2011
1
2
3
4
5
10
10
100
1000
tPW_INPUT (ns)
10
M9999-072511-A
Micrel, Inc.
MAQ4123/MAQ4124/MAQ4125
Grounding
Both proper bypassing and proper grounding are
necessary for optimum driver operation. Bypassing
capacitance only allows a driver to turn the load on.
Eventually (except in rare circumstances) it is also
necessary to turn the load OFF. This requires attention
to the ground path. Two things other than the driver
affect the rate at which it is possible to turn a load off:
The adequacy of the grounding available for the driver,
and the inductance of the leads from the driver to the
load. The latter will be discussed in a separate section.
The ePad package has an exposed pad under the
package. It's important for good thermal performance
that this pad is connected to a ground plane.
Best practice for a ground path is a well laid out ground
plane. However, this is not always practical, though a
poorly-laid out ground plane can be worse than none.
Attention to the paths taken by return currents, even in a
ground plane, is essential. In general, the leads from the
driver to its load, the driver to the power supply, and the
driver to whatever is driving it should all be as low in
resistance and inductance as possible. Of the three
paths, the ground lead from the driver to the logic driving
it, is most sensitive to resistance or inductance, and
ground current from the load is what is most likely to
cause disruption. Thus, these ground paths should be
arranged so that they never share a land, or do so for as
short a distance as is practical.
To illustrate what can happen, consider the following: the
inductance of a 2cm long land, 1.59mm (0.062") wide on
a PCB with no ground plane is approximately 45nH.
Assuming a di/dt of 0.3A/ns (which will allow a current of
3A to flow after 10ns, and is thus slightly slow for these
purposes) a voltage of 13.5V will develop along this land
in response to our postulated Δi. For a 1cm land,
(approximately 15nH) 4.5V is developed. Either way,
users employing TTL-level input signals to the driver will
find that the response of a driver that has been seriously
degraded by a common ground path for input to and
output from the driver of the given dimensions. Note that
this is before accounting for any resistive drops in the
circuit. The resistive drop in a 1.59mm (0.062") land of
2oz. Copper carrying 3A will be about 4mV/cm (10mV/in)
at DC, and the resistance will increase with frequency as
skin effect comes into play.
The problem is most obvious in inverting drivers where
the input and output currents are in phase so that any
attempt to raise the driver’s input voltage (in order to turn
the driver’s load off) is countered by the voltage
developed on the common ground path as the driver
attempts to do what it was supposed to. It takes very
little common ground path, under these circumstances,
to alter circuit operation drastically.
Application Information
The MAQ4123/24/25 drivers have been specifically
constructed to operate reliably under any practical
circumstances, the following details of usage provide for
better operation of the device.
Supply Bypassing
Charging and discharging large capacitive loads quickly
requires large currents. For example, charging 2000pF
from 0 to 15 volts in 20ns requires a constant current of
1.5A. In practice, the charging current is not constant,
and will usually peak at around 3A. In order to charge
the capacitor, the driver must be capable of drawing this
much current, this quickly, from the system power
supply. In turn, this means that as far as the driver is
concerned, the system power supply, as seen by the
driver, must have very low impedance.
As a practical matter, this means the power supply bus
decoupling capacitance must be much larger than the
driver output load capacitance to achieve optimum
driving speed. Additionally, the bypassing capacitors
must have very low internal inductance and resistance at
all frequencies of interest. High quality X5R or X7R
ceramic capacitors meet these requirements. Two
capacitors may be used to meet the decoupling
requirements. A larger ceramic capacitor in the 1μF to
4.7μF range and a 0.1μF capacitor may be used, as
together the valleys in their two impedance curves allow
adequate performance over a broad enough band to get
the job done. Z5U type ceramic capacitor dielectrics are
not recommended due to the large change in
capacitance over temperature and voltage. The high
pulse current demands of capacitive drivers also mean
that the bypass capacitors must be mounted very close
to the driver in order to prevent the effects of lead
inductance or PCB land inductance from nullifying what
the designer is trying to accomplish. For optimum
results, the sum of the lengths of the leads and the lands
from the capacitor body to the driver body should total
2.5cm or less.
Bypass capacitance, and its close mounting to the driver
serves two purposes. Not only does it allow optimum
performance from the driver, it minimizes the amount of
lead length radiating at high frequency during switching,
(due to the large Δ I) thus minimizing the amount of EMI
later available for system disruption and subsequent
cleanup. It should also be noted that the actual
frequency of the EMI produced by a driver is not the
clock frequency at which it is driven, but is related to the
highest rate of change of current produced during
switching, a frequency generally one or two orders of
magnitude higher, and thus more difficult to filter if you
let it permeate your system. Good bypassing practice is
essential to proper operation of high speed driver ICs.
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Output Lead Inductance
The same descriptions just given for PCB land
inductance apply equally well for the output leads from a
driver to its load, except that commonly the load is
located much further away from the driver than the
driver’s ground bus.
Generally, the best way to treat the output lead
inductance problem, when distances greater than 4cm
(2") are involved, requires treating the output leads as a
transmission line. Unfortunately, as both the output
impedance of the driver and the input impedance of the
MOSFET gate are at least an order of magnitude lower
than the impedance of common coax, using coax is
seldom a cost-effective solution. A twisted pair works
about as well, is generally lower in cost, and allows use
of a wider variety of connectors. The second wire of the
twisted pair should carry common from as close as
possible to the ground pin of the driver directly to the
ground terminal of the load. Do not use a twisted pair
where the second wire in the pair is the output of the
other driver, as this will not provide a complete current
path for either driver. Likewise, do not use a twisted triad
with two outputs and a common return unless both of the
loads to be driver are mounted extremely close to each
other, and you can guarantee that they will never be
switching at the same time.
For output leads on a printed circuit, the general rule is
to make them as short and as wide as possible. The
lands should also be treated as transmission lines: i.e.,
minimize sharp bends, or narrowing in the land, as these
will cause ringing. For a rough estimate, on a 1.59mm
(0.062") thick G-10 PCB a pair of opposing lands each
2.36mm (0.093") wide translates to a characteristic
impedance of about 50Ω; half that width suffices on a
0.787mm (0.031") thick board. For accurate impedance
matching with a MAQ4123/24/25 driver, on a 1.59mm
(0.062") board a land width of 42.75mm (1.683") would
be required, due to the low impedance of the driver and
(usually) its load. This is obviously impractical under
most circumstances. Generally the tradeoff point
between lands and wires comes when lands narrower
than 3.18mm (0.125") would be required on a 1.59mm
(0.062") board.
To obtain minimum delay between the driver and the
load, it is considered best to locate the driver as close as
possible to the load (using adequate bypassing). Using
matching transformers at both ends of a piece of coax,
or several matched lengths of coax between the driver
and the load, works in theory, but is not optimum.
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Driving at Controlled Rates
Occasionally, there are situations where a controlled rise
or fall time (which may be considerably longer than the
normal rise or fall time of the driver’s output) is desired
for a load. In such cases, it is still prudent to employ best
possible practice in terms of bypassing, grounding and
PCB layout, and then reduce the switching speed of the
load (NOT the driver) by adding a non-inductive series
resistor of appropriate value between the output of the
driver and the load. For situations where only the rise or
only fall should be slowed, the resistor can be paralleled
with a fast diode so that switching in the other direction
remains fast. Due to the Schmitt-trigger action of the
driver’s input it is not possible to slow the rate of rise (or
fall) of the driver’s input signal to achieve slowing of the
output.
Input Stage
The input stage of the MAQ4123/24/25 consists of a
single-MOSFET Class A stage with an input capacitance
of ~6pF. This capacitance represents the maximum load
from the driver that will be seen by its controlling logic.
The drain load on the input MOSFET is a current source.
Thus, the quiescent current drawn by the driver varies,
depending upon the logic state of the input.
Following the input stage, there is a buffer stage which
provides hysteresis for the input. This prevents
oscillations when slowly-changing input signals are used
or when noise is present on the input. Input voltage
switching threshold is approximately 1.5V which makes
the driver directly compatible with TTL signals, or with
CMOS powered from any supply voltage between 3V
and 15V.
The input protection circuitry of the MAQ4123/24/25, in
addition to providing ESD protection, also works to
prevent latch-up or logic upset due to ringing or voltage
spiking on the logic input terminal. In most CMOS
devices when the logic input rises above the power
supply terminal, or descends below the ground terminal,
the device can be destroyed or rendered inoperable until
the power supply is cycled OFF and ON. The
MAQ4123/24/25 drivers have been designed to prevent
this. Input voltages excursions as great as 5V below
ground will not alter the operation of the device. Input
excursions above the power supply voltage will result in
the excess voltage being conducted to the power supply
terminal of the IC.
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upon whether the load is capacitive, resistive or
inductive.
Because the excess voltage is simply conducted to the
power terminal, if the input to the driver is left in a high
state when the power supply to the driver is turned off,
currents as high as 30mA can be conducted through the
driver from the input terminal to its power supply
terminal. This may overload the output of whatever is
driving the driver, and may cause other devices that
share the driver’s power supply, as well as the driver, to
operate when they are assumed to be off, but it will not
harm the driver itself. Excessive input voltage will also
slow the driver down, and result in much longer internal
propagation delays within the drivers. TD2, for example,
may increase to several hundred nanoseconds. In
general, while the driver will accept this sort of misuse
without damage, proper termination of the line feeding
the driver so that line spiking and ringing are minimized,
will always result in faster and more reliable operation of
the device, leave less EMI to be filtered elsewhere, be
less stressful to other components in the circuit, and
leave less chance of unintended modes of operation.
Resistive Load Power Dissipation
Dissipation caused by a resistive load can be calculated
as:
PL = I2 RO D
where:
I
= the current drawn by the load
RO = the output resistance of the driver when the
output is high, at the power supply voltage used (see
characteristic curves)
D
= fraction of time the load is conducting (duty
cycle)
Capacitive Load Power Dissipation
Dissipation caused by a capacitive load is simply the
energy placed in, or removed from, the load capacitance
by the driver. The energy stored in a capacitor is
described by the equation:
Power Dissipation
CMOS circuits usually permit the user to ignore power
dissipation. Logic families such as 4000 series and
74Cxxx have outputs which can only source or sink a
few milliamps of current. Even shorting the output of the
device to ground or VCC may not damage the device.
CMOS drivers, on the other hand, are intended to source
or sink several Amps of current. This is necessary in
order to drive large capacitive loads at frequencies into
the megahertz range. Package power dissipation of
driver ICs can easily be exceeded when driving large
loads at high frequencies. Care must therefore be paid
to device dissipation when operating in this domain.
The Supply Current vs. Frequency and Supply Current
vs. Load characteristic curves furnished with this data
sheet aid in estimating power dissipation in the driver.
Operating frequency, power supply voltage, and load all
affect power dissipation.
Given the power dissipation in the device, and the
thermal resistance of the package, junction operating
temperature for any ambient is easy to calculate. For
example, the thermal resistance of the 8-pin ePad SOIC
package, from the datasheet, is 41°C/W. In a 25°C
ambient, then, using a maximum junction temperature of
125°C, this package will dissipate 2.4W.
Accurate power dissipation numbers can be obtained by
summing the three sources of power dissipation in the
device:
•
Load power dissipation (PL)
•
Quiescent power dissipation (PQ)
E = 1/2 C V2
As this energy is lost in the driver each time the load is
charged or discharged, for power dissipation calculations
the 1/2 is removed. This equation also shows that it is
good practice not to place more voltage in the capacitor
than is necessary, as dissipation increases as the
square of the voltage applied to the capacitor. For a
driver with a capacitive load:
PL = f C (VS)2
where:
f = Operating Frequency
C = Load Capacitance
VS = Driver Supply Voltage
• Transition power dissipation (PT)
Calculation of load power dissipation differs depending
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Inductive Load Power Dissipation
For inductive loads the situation is more complicated.
For the part of the cycle in which the driver is actively
forcing current into the inductor, the situation is the same
as it is in the resistive case:
Transition Power Dissipation
Transition power is dissipated in the driver each time its
output changes state, because during the transition, for
a very brief interval, both the N- and P-channel
MOSFETs in the output totem-pole are ON
simultaneously, and a current is conducted through them
from VS to ground. The transition power dissipation is
approximately:
PL1 = I2 RO D
However, in this instance the RO required may be either
the on resistance of the driver when its output is in the
high state, or its on resistance when the driver is in the
low state, depending upon how the inductor is
connected, and this is still only half the story. For the
part of the cycle when the inductor is forcing current
through the driver, dissipation is best described as:
PT = f VS (A × s)
where (A × s) is a time-current factor derived from
Figure 2.
PL2 = I VD (1 – D)
where VD is the forward drop of the clamp diode in the
driver (generally around 0.7V). The two parts of the load
dissipation must be summed in to produce PL:
PL = PL1 + PL2
Quiescent Power Dissipation
Quiescent power dissipation (PQ, as described in the
input section) depends upon whether the input is high or
low. A low input will result in a maximum supply current
of ≤0.3mA (per driver); logic high will result in a
maximum supply current of ≤1mA (per driver). Quiescent
power can therefore be found from:
Figure 2. Crossover Energy Loss
PQ = VS [D IH + (1 – D) IL]
Total power (PD) then, as previously described is just:
where:
PD = PL + PQ +PT
IH
IL
D
VS
= quiescent current with input high
= quiescent current with input low
= fraction of time input is high (duty cycle)
= power supply voltage
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First, IO must be determined:
Examples show the relative magnitude for each term:
EXAMPLE 1: A MAQ4123 operating on a 12V supply
driving two capacitive loads of 3000pF each, operating
at 250kHz, with a duty cycle of 50%, in a maximum
ambient of 60°C.
First calculate capacitive load power loss:
PL = f x C x (VS)
IO = VS / (RO + RLOAD)
Given RO from the characteristic curves then,
IO = 15 / (3.3 + 50)
IO = 0.281A
2
and:
PL = 250,000 x (3 x 10–9 + 3 x 10–9) x 122
= 0.216W
PL = (0.281)2 x 3.3 x 0.67
= 0.175W
Then transition power loss:
PT = f x VS x (A × s)/2
(because only one side is operating)
= (1,000,000 x 15 x 3.3 x 10–9) / 2
= 0.025 W
PT = f x VS x (A × s) = 250,000 × 12 × 2.2 x 10–9
= 0.007W
and:
Then quiescent power loss:
PQ = 15 x [(0.67 x 0.001) + (0.33 x 0.00015) +
(1 x 0.00015)] = 0.013W
PQ = VS x [D x IH + (1 – D) x IL]
= 12 x [(0.5 x 0.002) + (0.5 x 0.0003)]
= 0.014W
then:
PD = 0.175 + 0.025 + 0.013
= 0.213W
Total power dissipation, then, is:
PD = 0.216 + 0.007 + 0.014
= 0.237W
For θJA= 41°C/W, the junction temperature at 40°C
ambient is:
Given that the ePad SOIC package has a θJA of 41°C/W,
this will result in the junction running at:
(0.213W x 41°C/W) + 40°C = 49°C
The actual junction temperature will be somewhat lower
than calculated because the maximum RDS(on) value
used was taken at a TJ of 125°C and the RDS(on) at TJ =
52.8°C lower.
0.237W x 41°C/W = 10°C above ambient, which,
given a maximum ambient temperature of 60°C,
will result in a maximum junction temperature of
70°C.
EXAMPLE 2: A MAQ4124 operating on a 15V input, with
one driver switching a 50Ω resistive load at 1MHz at a
67% duty cycle. The other driver is not switching and its
input is grounded. The maximum ambient temperature is
40°C:
PL = I2 x RO x D
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Definitions
CL = Load capacitance in farads.
D
= Duty cycle expressed as the fraction of time the
input to the driver is high.
f
= Operating frequency of the driver in Hz.
IH
= Power supply current drawn by a driver when
both inputs are high and neither output is
loaded.
IL
= Power supply current drawn by a driver when
both inputs are low and neither output is loaded.
ID
= Output current from a driver in Amps.
PD = Total power dissipated in a driver in watts.
PL = Power dissipated in the driver due to the driver’s
load in Watts.
PQ = Power dissipated in a quiescent driver in watts.
PT = Power dissipated in a driver when the output
changes states (“shoot-through current”) in
Watts.
NOTE: The “shoot-through” current from a dual
transition (once up, once down) for both drivers
is stated in the graph on the following page in
ampere-nanoseconds. This figure must be
multiplied by the number of repetitions per
second (frequency) to find watts.
RO
VS
= Output resistance of a driver in Ωs.
= Power supply voltage to the IC in volts.
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Package Information
8-Pin ePad SOIC (ME)
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Recommended Landing Pattern
8-Pin ePad SOIC (ME)
Red circle indicates Thermal Via. Size should be .015 − 0.17 inches in diameter and it should be connected to GND plane
for maximum thermal performance.
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Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
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© 2011 Micrel, Incorporated.
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