AN-1042 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com ADIS16130 Quick Start Guide and Bias Optimization Tips by Mark Looney 0.4334 [11.0] PHYSICAL MOUNTING AND HANDLING RATE AXIS POSITIVE ROTATION DIRECTION + 0.0240 [0.610] 0.054 [1.37] 0.0394 [1.00] 0.1800 [4.57] 0.0394 [1.00] Figure 3. Suggested Layout and Mechanical Design for the Mating Connector ELECTRICAL HOOKUP Figure 4 provides a basic schematic for connecting the ADIS16130 to a system processor, which serves as the SPI master. Once configured, the ADIS16130 produces data autonomously and continuously updates the output data register(s). This hookup diagram accommodates the power, the ground, four serial signals, a data-ready signal, and the bandwidth reduction capacitor. The data-ready signal typically drives an interrupt service routine in the master processor, which helps optimize data coherency and processor resources. +5V 11 +5V 13 15 08407-001 1 2 Figure 1. ADIS16130 Package Style TIE TOGETHER AND USE ONE CONTROL SIGNAL TO ACTIVATE 15.600 BSC SCLK 4 SDI 14 MOSI 5 SDO 12 6 R0A1 19.800 BSC RDY 7 BANDWIDTH REDUCTION R0A2 2x 0.560 BSC ALIGNMENT HOLES FOR MATING SOCKET VDD SPISELx SCLK 16 9 39.60 BSC CS 8 3 SELF-TEST INPUTS 31.200 BSC 08407-003 0.022± DIA (TYP) NONPLATED 0.022 DIA THRU HOLE (TYP) THRU HOLE 2× NONPLATED THRU HOLE ADIS16130 10 MISO IRQ MASTER PROCESSOR 23 24 GND 17 19 20 21 22 17.520 08407-004 The ADIS16130 comes in a plastic housing that provides four mounting holes accommodating either M2 or 2-56 machine screws. This package enables both connector-up and connectordown mounting approaches. Figure 2 provides a mechanical diagram for a system using the connector-down approach. In comparison, the connector-up approach uses the same hole pattern for the four mounting screws but requires an additional cable/ connector interface for electrical connection. The connector provides a standard, dual-row, 1 mm pitch that offers many options for mating connectors. Figure 3 provides the suggested pad layout and hole pattern for the mating connector, assuming use of a connector from the Samtec CLM-112-02 family. The holes inside of the mounting pads prevent the pins on the ADIS16130 connector from bottoming out, which can cause mechanical stress and bias shifts. 0.019685 [0.5000] (TYP) Figure 4. Electrical Hookup Diagram Table 1. Generic Master Processor Pin Names and Functions 4x 2.500 BSC 5.00 BSC 5.00 BSC Figure 2. Suggested Mounting Hole Locations 08407-002 2.280 Pin Name SPISELx IRQ MOSI MISO SCLK Rev. 0 | Page 1 of 4 Function Slave select Interrupt request Master output, slave input Master input, slave output Serial clock AN-1042 Application Note SPI INTERFACE READING OUTPUT DATA Table 2 provides a list of typical configuration settings that master processors require for SPI communication with the ADIS16130. These settings are normally in control registers. For example, the SPI_BAUD, SPI_CTL, and SPI_FLG registers serve this purpose in the ADSP-BF533 processor family. Refer to the ADIS16130 data sheet for timing information. The data ready (RDY) signal indicates that new, unread data resides in the output registers. To optimize data coherency and processor resources, use this signal to drive an interrupt service routine in the master processor. It will pulse low for approximately 26 μs at a rate of 11.4 kHz, which indicates a new update in either the RATE or TEMP registers. Use the high-to-low transition to trigger action on the interrupt service routine. Read data after this signal pulses low by lowering the chip select line and then shifting (write) 0x48 onto the SDI line. Then, shift (read) the next three bytes in from SDO, which represents the resulting output data. Raise chip select between each 8-bit sequence. Table 2. Generic Master Processor SPI Settings Description ADIS16130 operate as slave. CPOL = 1 (polarity), CHPA = 1 (phase). Bit sequence. Shift register/data length. Placing a command on SDI involves writing to the transmit buffer register (SPI_TDBR in the ADSP-BF533), and acquiring output data from SDO involves reading the receive buffer register (SPI_RDBR in the ADSP-BF533). For many processors, these commands automatically facilitate the clocks and sequencing according to the settings in the control registers. INITIALIZATION The most significant byte is first in the SDO sequence, followed by the next significant, and then the least significant. When 16-bit resolution is in use, only two bytes are output from the SDO during the read sequence. CS SCLK SDO SDI DATA 0x48 SDI 0x01 0x38 Register COM IOP 3 0x28 COM 4 0x0A RATECS 5 0x30 COM 6 7 0x05 0x2A RATECONV COM 8 0x0A TEMPCS 9 0x32 COM 10 0x05 TEMPCONV 11 0x38 COM 12 0x22 MODE 1 Figure 5. Read Sequence Example DATA FORMAT Table 3. Configuration Sequence Step 1 2 DATA RDY Initialize the ADIS16130 by writing each command that is listed in the SDI column of Table 3 to the SDI pin. 1 DATA 08407-005 Processor Setting Master SPI Mode 3 MSB-First Mode 8-Bit Mode Purpose Start a write sequence for IOP. Configure the data-ready signal to pulse low when the RATEDATA and TEMPDATA output registers contain new data. Start a write sequence for the RATECS register. Enable and configure the gyroscope data channel. Start a write sequence for the RATECONV register. Initialize the rate conversion. Start a write sequence for the TEMPCS register. Enable and configure the temperature data channel. Start a write sequence for the TEMPCONV register. Initialize the temperature conversion. Start a write sequence for the MODE register. Establish the data output resolution to 24 bits and start the conversion process with the RATEDATA channel. The ADIS16130 uses the offset binary data format. ⎡ Codes − 2 23 ⎤ ⎡ Codes − 2 23 ⎤ RATE = ⎢ TEMP = + 25°C ⎥ ⎥ ⎢ ⎣ 23,488 ⎦ ⎣ 14,093 ⎦ Table 4. Gyroscope Rate Output Data Format 24-Bit (Codes) 14,260,608 8,623,488 8.388,612 8,388,609 8,388,608 8,388,607 8,388,604 8,153,728 2,516,608 16-Bit (Codes) 55,706 33,686 32,769 32,768 32,767 31,850 9,830 Rate Output +250°/sec +10°/sec +0.00017030°/sec +0.000042575°/sec 0 −0.000042575°/sec −0.00017030°/sec −10°/sec −250°/sec Table 5. Gyroscope Temperature Output Data Format 24-Bit (Codes) 9,516,048 9,234,188 8,402,701 8,388,608 8,036,283 7,472,563 The SDI column lists the hexadecimal code representation of each command. Rev. 0 | Page 2 of 4 16-Bit (Codes) 37,172 36,071 32,823 32,768 31,392 29,189 Rate Output +105°C +85°C +26°C +25°C +0°C −40°C Application Note AN-1042 OPTIMIZING BIAS ACCURACY AND STABILITY Two common sources of error in gyroscope systems are initial bias error and bias change with temperature. Figure 6 provides a simple process diagram for correcting these errors in a digital processor platform. Each ADIS16130 has unique behaviors that require characterization to optimize the correction factors in this process diagram. MASTER PROCESSOR CALIBRATED RATE OUTPUT (RBC) ADIS16130 RATE PRECISE BIAS CORRECTION (PBC) BIAS VS. TEMPERATURE CORRECTION (BTC) TEMPERATURE 1. Attach the ADIS16130 to a fixed platform to prevent any motion during the measurement steps. 2. Apply a stable +5 V linear supply to the ADIS16130. Note that the output bias can shift by 0.0002°/sec for every 1 mV of change in the power supply. 3. Write the initialization commands from Table 3 to the SDI pin. 4. Read TEMP and RATE data at the maximum sample rate of 5.7 kSPS for 10 sec. Average each set of data to produce a temperature estimate (T1) and a bias estimate (B1) associated with this average temperature. 5. Wait 10 minutes for the device to self-heat. 6. Repeat Step 3 to produce new estimates for temperature (T2) and output bias (B2). Then, calculate the bias temperature coefficient (BTC) by using the following equation: 08407-007 –T3 While each application has its own performance criteria, the following procedure provides a basic bias calibration process for getting started: ⎡ B2 − B1 ⎤ BTC = − bias tempco = − ⎢ ⎥ ⎣ T2 − T1 ⎦ Figure 6. First-Order Bias Correction System This calibration process results in the following mathematical relationship for the corrected gyroscope rate output: Using BTC, develop a look-up table for loading the correction factor suitable for the temperature conditions. Table 6 shows an example of correction factors in a table that corrects for a 0.04°/sec/°C bias tempco, using temperature step sizes of 0.02°C. RBC = RATE + PBC + (TEMP − T 3) × BTC where: RBC is the corrected output data. RATE is the ADIS16130 gyroscope output data. TEMP is the ADIS16130 temperature output data. Bias characterization involves measuring the ADIS16130 output while it is in a zero-rotation state. Noise adds random errors to the output measurement and can influence the accuracy of bias measurements. A common approach to addressing noise in the bias measurement is through averaging sequential samples. The Allan variance curves in Figure 7 display a relationship between averaging time and bias accuracy for the ADIS16130. ROOT ALLAN VARIANCE (°/sec) 0.01 µ+σ µ–σ 0.001 1 10 100 08407-006 µ 1000 7. Wait 40 minutes for thermal stability. 8. Read the RATE data at a sample rate of 5.7 kSPS for 150 sec. Average this data together for a precise bias estimate and multiply it by −1 to produce the precise bias correction factor (PBC). 9. Read TEMP (T3). Table 6. Bias Correction Factors, TBIAS = 0.04°/sec per °C Temperature Control (TEMP − T3) +0.12°C +0.10°C +0.08°C +0.06°C +0.04°C +0.02°C 0°C −0.02°C −0.04°C −0.06°C −0.08°C −0.10°C −0.12°C INTEGRATION TIME, (sec) Figure 7. ADIS16130 Allan Variance Curves Rev. 0 | Page 3 of 4 Bias vs. Temperature Correction Factor (TEMP − T3) × BTC −0.0048°/sec −0.0040°/sec −0.0032°/sec −0.0024°/sec −0.0016°/sec −0.0008°/sec 0°/sec +0.0008°/sec +0.0016°/sec +0.0024°/sec +0.0032°/sec +0.0040°/sec +0.0048°/sec AN-1042 Application Note ADDITIONAL TIPS In conclusion, the simple calibration process offered in this application note enables customers to achieve substantial performance gains and helps lay the groundwork for developing more extensive calibration approaches, if necessary. Here are some additional tips that may add value: 1. The 5.7 kSPS sample rate enables filtering of resonant behaviors that can show up around 14.3 kHz. 2. Use a 0.01 μF capacitor across ROA1 and ROA2 to reduce the sensor bandwidth to 50 Hz, which reduces the noise by 50%. The 50 Hz bandwidth also enables the use of slower sample rates. For example, use the RDY signal to drive a 200× counter to reduce the read rate to 230 SPS. 3. The calibration process in this application note takes advantage of the thermal warm-up period in these devices. For better accuracy, use a controlled temperature chamber to hold the device at fixed temperatures while using longer averaging times for each bias point. This provides the opportunity for further performance optimization. 4. If the processor system cannot read both gyroscope and temperature sensor outputs at the rate of 5.7 kSPS, reduce the read rate on the temperature sensor before considering a decrease in the rate measurements. If the maximum rate of temperature change is 1°C/sec, then a sample rate of 100 SPS should be sufficient for detecting 0.02°C changes for updating thermal correction factors. ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN08407-0-8/09(0) Rev. 0 | Page 4 of 4