ZXGD3105N8 SYNCHRONOUS MOSFET CONTROLLER IN SO-8 Description Features ZXGD3105N8 synchronous controller is designed for driving a MOSFET as an ideal rectifier. This is to replace a diode for increasing the power transfer efficiency. Proportional Gate Drive to Minimize Body Diode Conduction Low Standby Power with Quiescent Supply Current <1mA 4.5V Operation Enables Low Voltage Supply 25V VCC Rating Proportional Gate drive control monitors the reverse voltage of the MOSFET such that if body diode conduction occurs a positive voltage is applied to the MOSFET’s Gate Pin. Once the positive voltage is applied to the Gate the MOSFET switches on allowing reverse current flow. The controllers’ output voltage is then proportional to the MOSFET Drain-Source voltage and this is applied to the Gate via the driver. This action minimizes body diode conduction whilst enabling a rapid MOSFET turn-off as the Drain current decays to zero. 100V Drain Voltage Rating Operation up to 500kHz Critical Conduction Mode (CrCM) & Continuous Mode (CCM) Compliant with Eco-Design Directive Totally Lead-Free & Fully RoHS compliant (Notes 1 & 2) Halogen and Antimony free. “Green” Device (Note 3) Qualified to AEC-Q101 Standards for High Reliability Applications Mechanical Data Flyback Converters in: Low Voltage AC- DC Adaptors Set-Top-Box PoE Power Devices Resonant Converters in: Telecoms PSU Laptop Adaptors Computing Power Supplies – ATX and Server PSU Case: SO-8 Case Material: Molded Plastic. “Green” Molding Compound. UL Flammability Classification Rating 94V-0 Moisture Sensitivity: Level 1 per J-STD-020 Terminals: Finish – Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 Weight: 0.074 grams (Approximate) SO-8 Vcc GATE DNC GND BIAS DNC DRAIN REF Top View Pin-Out Ordering Information (Note 4) Product ZXGD3105N8TC Notes: Marking ZXGD3105 Reel Size (inches) 13 Tape Width (mm) 12 Quantity per Reel 2,500 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen and Antimony free,"Green" and Lead-Free. 3. Halogen and Antimony free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. 4. For packaging details, go to our website at http://www.diodes.com/products/packages.html. Marking Information ZXGD 3105 YY WW ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 ZXGD 3105 YY WW = Product Type Marking Code, Line 1 = Product Type Marking Code, Line 2 = Year (ex: 11 = 2011) = Week (01 - 53) 1 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Functional Block Diagram Pin Number Pin Name 1 VCC 2 DNC 3 BIAS 4 DRAIN 5 REF 6 DNC 7 GND 8 GATE ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 Description Power Supply This supply pin should be closely decoupled to ground with a ceramic capacitor. Do Not Connect Leave pin floating. Bias Connect this pin to VCC via RBIAS resistor. Select RBIAS to source 0.54mA into this pin. Refer to Table 1 and 2, in Application Information section. Drain Sense Connect directly to the synchronous MOSFET drain terminal. Reference Connect this pin to VCC via RREF resistor. Select RREF to source 1.02mA into this pin. Refer to Table 1 and 2, in Application Information section. Do Not Connect Leave pin floating. Ground Connect this pin to the synchronous MOSFET source terminal and ground reference point. Gate Drive This pin sinks and sources the ISINK and ISOURCE current to the synchronous MOSFET gate. 2 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Maximum Ratings (@TA = +25°C, unless otherwise specified.) Symbol Value Unit Supply Voltage, Relative to GND Characteristic VCC 25 V Drain Pin Voltage VD -3 to +100 V Gate output Voltage VG -3 to VCC +3 V ISOURCE 4 A Gate Driver Peak Sink Current ISINK 9 A Reference Voltage VREF VCC V mA Gate Driver Peak Source Current Reference Current IREF 25 Bias Voltage VBIAS VCC V Bias Current IBIAS 100 mA Value Unit Thermal Characteristics (@TA = +25°C, unless otherwise specified.) Characteristic Symbol (Note 5) (Note 6) Power Dissipation Linear Derating Factor PD (Note 7) (Note 8) 490 3.92 655 5.24 720 5.76 785 6.28 255 191 173 159 mW mW/°C (Note 5) (Note 6) (Note 7) (Note 8) RθJA Thermal Resistance, Junction to Lead (Note 9) RθJL 55 °C/W Thermal Resistance, Junction to Case (Note 10) RθJC 45 °C/W TJ -40 to +150 TSTG -55 to +150 Thermal Resistance, Junction to Ambient Operating Temperature Range Storage Temperature Range °C/W °C ESD Ratings (Note 11) Characteristic Electrostatic Discharge - Human Body Model Electrostatic Discharge - Machine Model Notes: Symbol Value Unit JEDEC Class ESD HBM ESD MM 4,000 200 V V 3A B 5. For a device surface mounted on minimum recommended pad layout FR4 PCB with high coverage of single sided 1oz copper, in still air conditions; the device is measured when operating in a steady-state condition. 6. Same as Note (5), except pin 1 (VCC) and pin 7 (GND) are both connected to separate 5mm x 5mm 1oz copper heatsinks. 7. Same as Note (6), except both heatsinks are 10mm x 10mm. 8. Same as Note (6), except both heatsinks are 15mm x 15mm. 9. Thermal resistance from junction to solder-point at the end of each lead on Pin 1 (VCC) or Pin 7 (GND). 10. Thermal resistance from junction to top of the case. 11. Refer to JEDEC specification JESD22-A114 and JESD22-A115. ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 3 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Max Power Dissipation (W) Thermal Derating Curve 0.8 15mm x 15mm 0.7 10mm x 10mm 0.6 0.5 5mm x 5mm 0.4 Minimum Layout 0.3 0.2 0.1 0.0 0 20 40 60 80 100 120 140 160 Junction Temperature (°C) Derating Curve Electrical Characteristics (@TA = +25°C, unless otherwise specified.) VCC = 10V; RBIAS = 18kΩ (IBIAS = 0.54mA); RREF = 9.1kΩ (IREF = 1.02mA) Characteristic Symbol Min Typ Max Unit IQ — 1.56 — mA ISOURCE — 1.2 — ISINK — 5 — VT -20 -10 0 VG(off) — 0.2 0.6 5.0 7.8 — 8.0 9.4 — td(rise) — 118 — tr — 77 — td(fall) — 14 — tf — 26 — Test Condition Input Supply Quiescent Current VDRAIN ≥ 0mV Gate Driver Gate Peak Source Current Gate Peak Sink Current A Capacitive Load: CL = 10nF Detector under DC condition Turn-Off Threshold Voltage Gate Output Voltage VG mV VG = 1V VDRAIN ≥ 1V V VDRAIN = -50mV Capacitive Load Only VDRAIN = -100mV Switching Performance Turn-On Propagation Delay Gate Rise Time Turn-Off Propagation Delay Gate Fall Time ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 4 of 14 www.diodes.com nS Capacitive Load: CL = 10nF Rise and Fall Measured 10% to 90% November 2015 © Diodes Incorporated ZXGD3105N8 Typical Electrical Characteristics (@TA = +25°C, unless otherwise specified.) 14 VCC = 15V 12 VCC = 12V 10 VCC = 10V VG Gate Voltage (V) VG Gate Voltage (V) 14 8 6 VCC = 5V 4 2 Capacitive load only 0 -100 -80 -60 -40 -20 VCC = 12V 10 VCC = 10V 8 6 VCC = 5V 4 2 0 -100 0 Capacitive load and 50k pull down resistor -80 -60 -20 VD Drain Voltage (mV) Transfer Characteristic Transfer Characteristic 0 0 VD Drain Voltage (mV) T a = -40°C T a = 25°C 8 T a = 125°C 6 4 VCC = 10V RBIAS=18k RREF=9.1k 2 50k pull down 0 -100 -80 -60 -40 -20 VCC = 10V -5 RBIAS=18k -10 RREF=9.1k -15 50k pull down VG = 1V -20 -25 -30 -50 0 0 VD Drain Voltage (mV) 50 100 150 Temperature (°C) Transfer Characteristic Drain Sense Voltage vs Temperature 180 230 220 210 200 190 180 170 160 150 140 130 T on = td1 + tr VCC = 10V RBIAS=18k RREF=9.1k T off = td2 + tf 45 40 35 30 -50 CL=10nF Supply Current (mA) Switching Time (ns) -40 VD Drain Voltage (mV) 10 VG Gate Voltage (V) VCC = 15V 12 160 RBIAS=18k 140 RREF=9.1k VCC = 15V f=500kHz 120 100 VCC = 12V VCC = 10V 80 60 40 20 VCC = 5V 0 -25 0 25 50 75 100 125 150 0 Temperature (°C) Switching vs Temperature ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 2 4 6 8 10 12 14 16 18 20 22 Capacitance (nF) Supply Current vs Capacitive Load 5 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Typical Electrical Characteristics (Continued) (@TA = +25°C, unless otherwise specified.) 10 10 VG 6 8 VCC=10V VD Voltage (V) Voltage (V) 8 RBIAS=18k RREF=9.1k 4 CL=10nF 2 RL=0R1 VCC=10V 6 RBIAS=18k VG VD RREF=9.1k 4 CL=10nF 2 0 RL=0R1 0 -2 -100 0 100 200 -2 -200 300 -100 0 Time (ns) 100 200 300 Time (ns) Switch On Speed Switch Off Speed Time (ns) T on = td1 + tr 100 VCC=10V T off = td2 + tf RBIAS=18k RREF=9.1k RL=0R1 10 1 10 Gate Drive Current (A) 4 Isource 2 0 -2 -4 -6 VCC=10V RBIAS=18k RREF=9.1k Isink CL=10nF RL=0R1 -8 100 0 200 400 600 Time (ns) Capacitance (nF) Gate Drive Current Switching vs Capacitive Load VCC=10V RBIAS=18k 6 Supply Current (mA) Peak Drive Current (A) 8 -Isink RREF=9.1k RL=0R1 4 Isource 2 0 1 10 CL=100nF 10 100 RBIAS=18k CL=3.3nF CL=1nF RREF=9.1k RL=0R1 1 10 100 1000 10000 100000 Frequency (Hz) Gate Current vs Capacitive Load Document Number DS35101 Rev. 4 - 2 CL=10nF VCC=10V Capacitance (nF) ZXGD3105N8 CL=33nF 100 6 of 14 www.diodes.com Supply Current vs Frequency November 2015 © Diodes Incorporated ZXGD3105N8 Application Information The purpose of the ZXGD3105 is to drive a MOSFET as a low VF Schottky diode replacement in isolated AC-DC converter. When combined with a low RDS(ON) MOSFET, the controller can yield significant power efficiency improvement, whilst maintaining design simplicity and incurring minimal component count. Figure 1 shows the typical configuration of ZXGD3105 for synchronous rectification in a low output voltage flyback converter. A typical circuit configuration of synchronous rectification with ZXGD3105 for use in resonant converter is shown in Figure 2. Two ZXGD3105 together with two synchronous MOSFETs should be used on the secondary side of the center tapped transformer winding. +Vout Rref Transformer + In Rbias REF Cclamp Rclamp DRAIN BIAS Vcc C1 ZXGD3105 GATE GND Rd G Dclamp D S - Vout Synchronous MOSFET PWM controller CCM/CrCM/DCM - In Figure 1 Typical Flyback Application Schematic Vin Transformer Vout Primary Side Controller Cout Cres DRAIN DRAIN Vcc Qsec1 GATE GND ZXGD3105 BIAS Vcc Rb Rb REF Rf BIAS ZXGD3105 GATE REF GND Qsec2 Rf Figure 2 Synchronous Rectification in Resonant Converter Threshold Voltage and Resistor Setting The correct selection of external resistors RREF and RBIAS is important for optimum device operation. RREF and RBIAS supply fixed current into the IREF and IBIAS Pin of the controller. IREF and IBIAS combines to set the turn-off threshold voltage level, VT. In order to set VT to -10mV, the recommended IREF and IBIAS are 1.02mA and 0.54mA respectively. The values for RREF and RBIAS are selected based on the VCC voltage. If the VCC Pin is connected to the power converter’s output, the resistors should be selected based on the nominal converter’s output voltage. Table 1 provides the recommended resistor values for different V CC voltages. Supply, VCC (V) Bias Resistor, RBIAS (kΩ) Reference Resistor, RREF (kΩ) 5 10 12 15 9.6 18 24 30 4.3 9.1 11 15 Table 1 Recommended Resistor Values for Different VCC Voltages ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 7 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Application Information (Continued) Functional Descriptions for Flyback Converter The operation of the device is described step-by-step with reference to the timing diagram in Figure 3. 1. The detector stage monitors the MOSFET Drain-Source voltage. 2. When, due to transformer action, the MOSFET body diode is forced to conduct there is a negative voltage on the Drain Pin due to the body diode forward voltage. 3. As the negative Drain voltage crosses the turn-off threshold voltage (VT), the detector stage outputs a positive voltage with respect to Ground after the turn-on delay time (td(fall)). This voltage is then fed to the MOSFET driver stage and current is sourced out of the Gate Pin. 4. The controller goes into proportional Gate drive control – the Gate output voltage is proportional to the MOSFET on-resistance-induced Drain-Source voltage. Proportional gate drive control ensures that the MOSFET conducts during the majority of the conduction cycle to minimize power loss in the body diode. 5. As the Drain current decays linearly toward zero, proportional gate drive control reduces the Gate voltage so the MOSFET can be turned off rapidly at zero current crossing. The Gate voltage falls to 1V when the Drain-Source voltage crosses the detection threshold voltage to minimize reverse current flow. 6. At zero Drain current, the controller Gate output voltage is pulled low to VG(off) to ensure that the MOSFET is off. MOSFET Drain Voltage VD 1 VT Body Diode Conduction 2 3 90% MOSFET Gate Voltage 4 5 VG 90% 10% 6 10% VG(off) tf tr td(fall) td(rise) MOSFET Drain Current ID 0A Figure 3 Timing Diagram for a Critical Conduction Mode Flyback Converter ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 8 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Application Information (Cont.) Functional Descriptions for Resonant Converter The operation of the ZXGD3105 in resonant converter is described with reference to Figure 4. 1. The detector stage monitors the MOSFET Drain-GND voltage. 2. When the MOSFET body diode is forced to conduct, due to transformer action, there is a negative voltage on the Drain Pin due to the body diode forward voltage. 3. As the negative Drain voltage crosses the threshold voltage (VT), the detector stage outputs a positive voltage with respect to Ground after the turn-on delay time (td(rise)). This voltage is then fed to the MOSFET driver stage and current is sourced out of the Gate pin. 4. The controller goes into proportional Gate drive control. The Gate voltage now varies according to the MOSFET’s Drain-GND voltage. During this phase, the relationship of VG vs. VD is shown by the Transfer Characteristic Graph on Page 5 of this datasheet. As the Drain current decays linearly, the Gate voltage reduces so the MOSFET can be turned off rapidly at zero current crossing. Proportional Gate drive control also ensures that the Gate voltage is supplied to the MOSFET Gate until the Drain current is virtually zero. This eliminates any parasitic diode conduction after the MOSFET switches off. 5. The Gate voltage falls to 1V when the Drain-GND voltage reaches VT. The MOSFET is turned off precisely when the sinusoidal current goes to zero, with little or no reverse current. Threshold voltage (VT) is defined as the Drain voltage VD level, at which the Gate voltage VG is 1V (refer to Electrical Characteristics Table on Page 4). 6. At zero Drain current, the Gate voltage is pulled low to VG(off) to ensure that the MOSFET is off. MOSFET Drain Voltage VD 1 0V VT VT Body Diode Conduction 2 3 90% MOSFET Gate Voltage 4 VG 10% 5 VG = 1V 6 VG(off) tr td(rise) MOSFET Drain Current ID 0A Figure 4 Timing Diagram of Synchronous Rectification in the Resonant Converter ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 9 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Application Information (Cont.) Besides that, Proportional Gate drive control improves the rectifier efficiency even at light to medium load condition by ensuring that the MOSFETs conduct during majority of the conduction cycle as shown in Figure 5a. At reduced load condition, early termination of the Gate drive voltage is likely for digital-level Gate drive due to the low current, which means that the threshold VT is breached. With the early termination of the Gate drive voltage, the MOSFET turns off and the body diode conducts, see Figure 5. This is shown by an increase in Drain-GND voltage for the remaining time of the current waveform. With the current flowing through the body diode there will be an increase in power developed within the MOSFET. The efficiency impact due to early termination of digital-level Gate driver increases with lower RDS(ON) MOSFET and/or higher operating frequency. MOSFET Drain Voltage VD 0V VT Body Diode Conduction MOSFET Gate Voltage VG VG = 1V VG(off) td(rise) MOSFET Drain Current ID 0A Figure 5 Timing Diagram of Synchronous Rectification in the Resonant Converter (a) Proportional Gate Drive MOSFET Drain Voltage VD 0V VT Body Diode Conduction Body Diode Conduction 90% MOSFET Gate Voltage VG 10% tr VG(off) Min Ton td(rise) MOSFET Drain Current ID 0A (b) Digital-Level Gate Drive ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 10 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Application Information (Cont.) Gate Driver The controller is provided with a single-channel, high-current Gate drive output, capable of driving one or more N-channel power MOSFETs. The controller can operate from VCC of 4.5V to drive both standard MOSFETs and logic level MOSFETs. The Gate Pins should be as close to the MOSFET’s gate as possible. A resistor in series with the Gate Pin helps to control the rise time and decrease switching losses due to Gate voltage oscillation. A diode in parallel to the resistor is typically used to maintain fast discharge of the MOSFET’s gate. Figure 6 Typical Connection of the ZXGD3105 to the Synchronous MOSFET Quiescent Current Consumption The quiescent current consumption of the controller is the sum of IREF and IBIAS. For an application that requires ultra-low standby power consumption, IREF and IBIAS can be further reduced by increasing the value of resistor RREF and RBIAS. Bias Current, IBIAS (mA) Ref Current, IREF (mA) Bias Resistor, RBIAS (kΩ) Ref Resistor, RREF (kΩ) Quiescent Current, IQ (mA) 0.25 0.35 0.46 0.50 0.55 0.80 0.61 0.81 0.99 1.00 1.13 1.66 39.2 28.0 21.5 19.6 17.8 12.1 15.4 11.5 9.3 8.9 8.1 5.6 0.86 1.16 1.45 1.50 1.68 2.46 Table 2 Quiescent Current Consumption for Different Resistor Values at VCC = 10V IREF also controls the Gate driver peak sink current whilst IBIAS controls the peak source current. At the default current value of I REF and IBIAS of 1.02mA and 0.54mA, the Gate driver is able to provide 2A source and 6A sink current. The Gate current decreases if IREF and IBIAS are reduced. Care must be taken in reducing the controller quiescent current so that sufficient drive current is still delivered to the MOSFET particularly for high switching frequency application. ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 11 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Application Information (Cont.) Layout Guidelines When laying out the PCB, care must be taken in decoupling the ZXGD3105 closely to VCC and Ground with 1μF low-ESR, low-ESL X7R type ceramic bypass capacitor. If the converter’s output voltage is higher than 20V, a 12V zener diode should be connected from the Bias Pin to GND to clamp the Gate voltage and protect the synchronous MOSFET. Figure 7 shows the Typical Connection Diagram. To transformer winding DRAIN Supply voltage Vcc Rf REF ZXGD3105 GATE BIAS GND Rb 12V GND return Figure 7 Zener Voltage Clamp Arrangement GND is the Ground reference for the internal high voltage amplifier as well as the current return for the Gate driver. So the Ground return loop should be as short as possible. Sufficient PCB copper area should be allocated to the V CC and GND Pin for heat dissipation especially for high switching frequency application. Any stray inductance involved by the load current may cause distortion of the Drain-to-Source voltage waveform, leading to premature turn-off of the synchronous MOSFET. In order to avoid this issue, Drain voltage sensing should be done as physically close to the Drain terminals as possible. The PCB track length between the controller Drain Pin and the MOSFET’s terminal should be kept less than 10mm. MOSFET packages with low internal wire bond inductance are preferred for high switching frequency power conversion to minimize body diode conduction. After the primary MOSFET turns off, its Drain voltage oscillates due to reverse recovery of the snubber diode. These high frequency oscillations are reflected across the transformer to the Drain terminal of the synchronous MOSFET. The synchronous controller senses the Drain voltage ringing, causing its Gate output voltage to oscillate. The synchronous MOSFET cannot be fully enhanced until the Drain voltage stabilizes. In order to prevent this issue, the oscillations on the primary MOSFET can be damped with either a series resistor R D to the snubber diode or an R-C network across the diode (refer to Figure 8). Both methods reduce the oscillations by softening the snubber diode’s reverse recovery characteristic. Figure 8 Primary Side Snubber Network to Reduce Drain Voltage Oscillations ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 12 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 Package Outline Dimensions Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version. 0.254 SO-8 E1 E Gauge Plane Seating Plane A1 L Detail ‘A’ 7°~9° h 45° Detail ‘A’ A2 A A3 b e D SO-8 Dim Min Max A – 1.75 A1 0.10 0.20 A2 1.30 1.50 A3 0.15 0.25 b 0.3 0.5 D 4.85 4.95 E 5.90 6.10 E1 3.85 3.95 e 1.27 Typ h – 0.35 L 0.62 0.82 0° 8° All Dimensions in mm Suggested Pad Layout Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version. SO-8 X Dimensions X Y C1 C2 C1 Value (in mm) 0.60 1.55 5.4 1.27 C2 Y ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 13 of 14 www.diodes.com November 2015 © Diodes Incorporated ZXGD3105N8 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. 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Copyright © 2015, Diodes Incorporated www.diodes.com ZXGD3105N8 Document Number DS35101 Rev. 4 - 2 14 of 14 www.diodes.com November 2015 © Diodes Incorporated