74LVC574A

74LVC574A
OCTAL D-TYPE FLIP-FLOP WITH 3 STATE OUTPUTS
Description
Pin Assignments
The 74LVC574A provides eight edge-triggered D-type flip-flops
featuring 3-state outputs designed specifically for driving highly
capacitive or relatively low-impedance loads. These devices are
particularly suitable for implementing buffer registers, input/output (I/O)
ports, bidirectional bus drivers, and working registers. On the positive
transition of the clock (CLK) input, the Q outputs are set to the logic
NEW PRODUCT
levels set up at the data (D) inputs. A buffered output-enable (OE)
input can be used to place the eight outputs in either a normal logic
state (high or low logic levels) or the high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide
the capability to drive bus lines without interface or pullup components.
OE does not affect internal operations of the latch. Old data can be
retained or new data can be entered while the outputs are in the highimpedance state.
These devices feature inputs and outputs on opposite sides of the
Applications
package that facilitate printed circuit board layout.
•
General Purpose Logic
•
Bus Driving
•
Power Down Signal Isolation
The device is designed for operation with a power supply range of
1.65V to 3.6V. The device is fully specified for partial power down
applications using IOFF.
•
ƒ
Features
•
•
Supply Voltage Range from 1.65V to 3.6V
Sinks or Sources 24mA at VCC = 3V
•
•
CMOS Low Power Consumption
IOFF Supports Partial-Power Down Operation
•
Inputs or Outputs Accept Up to 5.5V
•
Wide Array of Products Such as:
ƒ
PCs, Notebooks, Netbooks, Ultrabooks
Networking Computer Peripherals, Hard Drives, CD/DVD
ROM
ƒ
TV, DVD, DVR, set top box
Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage
Applications
•
•
Schmitt Trigger Action at All Inputs
Typical VOLP (Quiet Output Ground Bounce) less than 0.8V with
VCC = 3.3V and TA = +25°C
•
Typical VOHV (Quiet Output Dynamic VOH) greater than 2.0V
with VCC = 3.3V and TA = +25°C
•
•
•
ESD Protection Tested per JESD 22
ƒ
Exceeds 200-V Machine Model (A115)
ƒ
Exceeds 2000-V Human Body Model (A114)
ƒ
Exceeds 1000-V Charged Device Model (C101)
Latch-Up Exceeds 250mA per JESD 78, Class I
All devices are:
ƒ
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
ƒ
Halogen and Antimony Free. “Green” Device (Note 3)
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen and Antimony free,
"Green" and Lead-Free.
3. Halogen and Antimony free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
74LVC574A
Document number: DS35898 Rev. 1 - 2
1 of 11
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July 2014
© Diodes Incorporated
74LVC574A
Ordering Information
74 LVC
Logic Device
NEW PRODUCT
74 : Logic Prefix
Function
574 :
Package
Octal D-Type
Flip-Flop with 3
State Outputs
Part Number
Package
Code
Package
(Note 4 & 5)
74LVC574AT20-13
T20
TSSOP-20
74LVC574AQ20-13
Q20
V-QFN4525-20
Notes:
574A xxx -13
Packing
T20 : TSSOP-20
Q20 : QFN-20
-13 : 13” Tape & Reel
Package
Size
6.4mm X 6.5mm X 1.2mm
0.65 mm lead pitch
2.5mm X 4.5mm X 0.95mm
0.50 mm lead pitch
13” Tape and Reel
Quantity
Part Number Suffix
2500/Tape & Reel
-13
2500/Tape & Reel
-13
4. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
5. V-QFN4525-20 is a JEDEC recognized naming convention that specifies the package thickness category as V and the number 4525 describes the
package as 4.5mm X 2.5mm.
Pin Descriptions
Logic Diagram
Function Table
Pin
Number
Pin
Name
1
OE
Output Enable
OE
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
D1
D2
D3
D4
D5
D6
D7
D8
GND
CLK
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Vcc
Data Input
Data Input
Data Input
Data Input
Data Input
Data Input
Data Input
Data Input
Ground
Clock
Latch Output
Latch Output
Latch Output
Latch Output
Latch Output
Latch Output
Latch Output
Latch Output
Supply Voltage
L
Description
74LVC574A
Document number: DS35898 Rev. 1 - 2
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(Each Latch)
INPUTS
OUTPUT
CLK
D
Q
↑
↑
H
H
L
L
L
L
H
H or L
X
X
X
Q0
Z
July 2014
© Diodes Incorporated
74LVC574A
Absolute Maximum Ratings (Notes 6 & 7)
Symbol
ESD HBM
ESD CDM
ESD MM
Rating
2
1
200
Unit
kV
kV
V
V
Supply Voltage Range
-0.5 to +7.0
VI
Input Voltage Range
-0.5 to +7.0
V
IIK
Input Clamp Current VI < 0V
-20
mA
VCC
NEW PRODUCT
Description
Human Body Model ESD Protection
Charged Device Model ESD Protection
Machine Model ESD Protection
IOK
Output Clamp Current VO < 0V
-50
mA
IO
Continuous Output Current -0.5V < VO VCC +0.5V
±50
mA
ICC
Continuous Current Through VCC
100
mA
IGND
Continuous Current Through GND
-100
mA
Operating Junction Temperature
-40 to +150
°C
TSTG
Storage Temperature
-65 to +150
°C
PTOT
Total Power Dissipation
500
mW
TJ
Notes:
6. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device
operation should be within recommend values.
7. Forcing the maximum allowed voltage could cause a condition exceeding the maximum current or conversely forcing the maximum current could
cause a condition exceeding the maximum voltage. The ratings of both current and voltage must be maintained within the controlled range.
Recommended Operating Conditions (Note 8)
Symbol
VCC
Parameter
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH
IOL
Conditions
Operating
Data Retention Only
—
High-Level Output Current
Low-Level Output Current
Min
1.65
1.5
Max
3.6
—
Unit
V
V
0
5.5
V
—
0
VCC
V
VCC = 1.65V
—
-4
VCC = 2.3V
—
-8
VCC = 2.7V
—
-12
VCC = 3.0V
—
-24
VCC = 1.65V
—
4
VCC = 2.3V
—
8
VCC = 2.7V
—
12
VCC = 3.0V
—
24
mA
mA
∆t/∆V
Input Transition Rise or Fall Rate
—
10
ns/V
TA
Operating Free-Air Temperature
-40
+125
°C
Note:
8. Unused inputs should be held at VCC or Ground.
74LVC574A
Document number: DS35898 Rev. 1 - 2
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© Diodes Incorporated
74LVC574A
Electrical Characteristics
NEW PRODUCT
Symbol
Parameter
VIH
High-Level Input
Voltage
VIL
Low-Level Input
Voltage
VOH
VOL
IOFF
II
IOZ
ICC
∆ICC
Ci
Test Conditions
1.65V to 1.95V
2.3V to 2.7V
3.0V to 3.6V
High-Level
Output Voltage
Low-Level Output
Voltage
Power Down
Leakage Current
Input Current
Control Pins
Z-State Current
including Input
Current
I/O Pins
Supply Current
VCC
TA = -40°C to +85°C
Min
Max
—
VCC X 0.65
1.7
2
TA = -40°C to +125°C
Min
Max
—
—
VCC X 0.65
1.7
2
VCC X 0.35
0.7
0.8
—
—
Unit
—
—
—
V
1.65V to 1.95V
—
2.3V to 2.7V
3.0V to 3.6V
—
—
IOH = -50μA
1.65V to 3.6V
VCC -0.2
—
VCC -0.3
—
IOH = -4mA
1.65V
1.2
—
1.05
—
IOH = -8mA
2.3V
1.7
—
1.65
—
IOH = -12mA
2.7V
3.0V
2.2
2.4
—
—
2.05
2.48
—
—
IOH = -24mA
3.0V
2.3
—
2.0
—
IOL = 100μA
1.65V to 3.6V
—
0.2
—
0.3
IOL = 4mA
1.65V
—
0.45
—
0.65
IOL = 8mA
2.3V
—
0.60
—
0.80
IOL = 12mA
2.7V
—
0.40
—
0.60
IOL = 24mA
3.0V
—
0.55
—
0.80
VI or VO = 0 or 5.5V
0V
—
±10
—
20
μA
VI = GND or 5.5V
0 to 3.6V
—
±5
—
±20
μA
VI = GND or 5.5V
VO = 0 to 5.5V
3.6V
—
±5
—
±20
µA
—
VCC X 0.35
0.7
0.8
V
V
V
VI = GND or VCC, IO = 0
3.6V
—
10
—
40
μA
Additional Supply
Current
One Input at VCC -0.6V IO = 0A
2.7V to 3.6V
—
500
—
5000
μA
Input
Capacitance
Control Pins
I/O Pins
74LVC574A
Document number: DS35898 Rev. 1 - 2
VI = GND or VCC
0V to 3.6V
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4.0 typical
5.5 typical
4.0 typical
5.5 typical
pF
July 2014
© Diodes Incorporated
74LVC574A
Switching Characteristics
NEW PRODUCT
Symbol
Parameter
Test
Conditions
fMAX
Maximum
Frequency
Figure 1
tW
Pulse Width
CLK
Figure 1
tSU
Set-up Time DN
to CLK
Figure 1
tH
Hold Time
DN to CLK
Figure 1
tPD
Propagation
Delay
CLK to QN
tEN
tDIS
tDIS
tsk(0)
Enable Time
OE to QN
Disable Time
OE to QN
Disable Time
OE to QN
Figure 1
Figure 1
Figure 1
Figure 1
Output Skew
Time
TA = +25°C
VCC
1.8V ± 0.15V
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
1.8V ± 0.15
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
Min
35
50
80
100
5.0
4.0
3.3
3.0
4.0
3.0
2.0
2.0
3.0
2.0
1.5
1.5
1.0
1.0
1.0
1.5
1.0
1.0
1.0
1.7
1.0
1.0
1.0
1.7
1.0
1.0
1.0
1.7
Typ
40
60
100
125
2.5
2.0
1.7
1.5
2.0
1.5
1.0
1.0
1.5
1.0
1.0
1.0
6.0
3.9
4.2
3.8
7.8
4.0
4.4
4.1
7.8
4.0
4.4
4.1
7.8
4.0
4.4
4.1
3.3V ± 0.3V
Max
15.1
8.8
8.1
7.1
16.5
9.0
8.3
7.3
16.5
9.0
8.3
7.3
16.5
9.0
8.3
7.3
TA = -40°C to
+85°C
Min
Max
35
50
80
100
5.0
4.0
3.3
3.0
4.0
3.0
2.0
2.0
3.0
2.0
1.5
1.5
1.0
15.7
1.0
9.0
1.0
9.4
1.5
7.6
1.0
17.0
1.0
9.5
1.0
8.5
1.7
7.5
1.0
17.0
1.0
9.5
1.0
8.5
1.7
7.5
1.0
17.0
1.0
9.5
1.0
8.5
1.7
7.5
1.0
TA = -40°C to
+125°C
Min
Max
30
45
64
80
5.5
4.5
3.5
3.5
4.5
3.5
2.5
2.5
3.5
2.5
2.0
2.0
1.0
16.9
1.0
10.5
1.0
10.0
1.5
8.1
1.0
18.4
1.0
10.5
1.0
10.0
1.7
9.0
1.0
18.4
1.0
10.5
1.0
10.0
1.7
9.0
1.0
18.4
1.0
10.5
1.0
10.0
1.7
9.0
1.5
Unit
Mhz
ns
ns
ns
ns
ns
ns
ns
ns
Operating Characteristics
TA = +25°C
Symbol
Cpd
Parameter
Power dissipation
capacitance per gate
74LVC574A
Document number: DS35898 Rev. 1 - 2
Test Conditions
F = 10 MHz
VCC
1.8V ± 0.15V
2.5V ± 0.2V
3.3V ± 0.3V
5 of 11
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Typ
Unit
9.9
10.2
10.6
pF
July 2014
© Diodes Incorporated
74LVC574A
Package Characteristics
Symbol
θJA
θJC
NEW PRODUCT
θJA
θJC
Note:
Parameter
Thermal Resistance
Junction-to-Ambient
Thermal Resistance
Junction-to-Case
Thermal Resistance
Junction-to-Ambient
Thermal Resistance
Junction-to-Case
Package
Test Conditions
Min
Typ
Max
Unit
TSSOP-20
(Note 9)
—
74
—
°C/W
TSSOP-20
(Note 9)
—
15
—
°C/W
V-QFN4525-20
(Note 9)
—
67
—
°C/W
V-QFN4525-20
(Note 9)
—
20
—
°C/W
9. Test conditions for TSSOP-20 and V-QFN4525-20: Devices mounted on 4 layer FR-4 substrate PC board, 2oz copper, with minimum recommended
pad layout per JESD 51-7.
74LVC574A
Document number: DS35898 Rev. 1 - 2
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© Diodes Incorporated
74LVC574A
Parameter Measurement Information
RL S1
From Output
Under Test
C
RL
L
(see Note A)
NEW PRODUCT
VLOAD
Open
GND
Inputs
VCC
VM
VLOAD
CL
≤ 2ns
VCC/2
2 x VCC
≤ 2ns
VCC/2
2 x VCC
2.7V
≤ 2.5ns
1.5V
2.7V
≤ 2.5ns
1.5V
VI
tr/tf
1.8V ± 0.15V
VCC
2.5V ± 0.2V
VCC
2.7V
3.3V ± 0.3V
RL
V∆
30pF
1KΩ
0.15V
30pF
500Ω
0.15V
6V
50pF
500Ω
0.3V
6V
50pF
500Ω
0.3V
Voltage Waveform Pulse Duration
Voltage Waveform Enable and Disable Times
Low and High Level Enabling
Voltage Waveform Propagation Delay Times
Inverting and Non Inverting Outputs
Notes:
A. Includes test lead and test apparatus capacitance.
B. All pulses are supplied at pulse repetition rate ≤ 10 MHz.
C. Inputs are measured separately one transition per measurement.
D. tPLZ and tPHZ are the same as tdis.
E. tPZL and tPZH are the same as tEN0
F. tPLH and tPHL are the same as tPD.
Figure 1 Load Circuit and Voltage Waveforms
74LVC574A
Document number: DS35898 Rev. 1 - 2
7 of 11
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© Diodes Incorporated
74LVC574A
Marking Information
(1)
TSSOP20
NEW PRODUCT
74LVC574A
Part Number
74LVC574AT20
(2)
Package
TSSOP-20
QFN-20 (V-QFN4525-20)
74LVC574A
Part Number
74LVC574AQ20
74LVC574A
Document number: DS35898 Rev. 1 - 2
Package
V-QFN4525-20
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74LVC574A
Package Outline Dimensions
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version.
(1)
TSSOP-20
D
NEW PRODUCT
θ2
E1
E
0.25
Gauge Plane
θ3
PIN 1
ID MARK
Seating Plane
θ1
e
L
DETAIL
L1
A2
b
(2)
A
TSSOP-20
Dim
Min
Max
Typ
A
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
6.40
6.60
6.50
E
6.20
6.60
6.40
E1
4.30
4.50
4.40
e
0.65 BSC
L
0.45
0.75
0.60
L1
1.0 REF
0°
8°
θ1
10°
14°
12°
θ2
10°
14°
12°
θ3
All Dimensions in mm
A1
QFN-20 (V-QFN4525-20)
1
A
3
A
A
e
n
a
l
P
g
n
i
t
a
e
S
D
I
1
#
n
i
P
︶
D
︵
e
x
4
1
Z
︵ ︶
E
2
E
2
D
x
0
2
L
︵
Document number: DS35898 Rev. 1 - 2
︵
x
0
2
74LVC574A
b
x
4
Z
︵ ︶
︶
V-QFN4525-20
Dim
Min
Max
Typ
A
0.75
0.85
0.80
A1
0.00
0.05
0.02
A3
0.15
b
0.18
0.30
0.23
D
4.45
4.55
4.50
D2
2.85
3.15
3.00
E
2.45
2.55
2.50
E2
0.85
1.15
1.00
e
0.50BSC
L
0.30
0.50
0.40
Z
0.385
Z1
0.885
All Dimensions in mm
︶
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74LVC574A
Suggested Pad Layout
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
(1)
TSSOP-20
X (20x)
NEW PRODUCT
C
Y1
Dimensions
C
X
X1
Y
Y1
Y2
Y2
Y (20x)
Value (in mm)
0.650
0.420
6.270
1.789
4.160
7.720
X1
(2)
QFN-20 (V-QFN4525-20)
4
X
3
X
1
X
2
X
3
Y
1
Y
2
Y
Y
Document number: DS35898 Rev. 1 - 2
Value (in mm)
0.500
0.330
0.600
3.200
3.830
4.800
0.600
1.200
0.830
2.800
C
X
74LVC574A
Dimensions
C
X
X1
X2
X3
X4
Y
Y1
Y2
Y3
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© Diodes Incorporated
74LVC574A
IMPORTANT NOTICE
NEW PRODUCT
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated
website, harmless against all damages.
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales
channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.
Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings
noted herein may also be covered by one or more United States, international or foreign trademarks.
This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.
LIFE SUPPORT
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and
any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or
systems.
Copyright © 2014, Diodes Incorporated
www.diodes.com
74LVC574A
Document number: DS35898 Rev. 1 - 2
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