ADP1828 Vin 2.25-2.75 Vout 1V @ 12 A

Preliminary Technical Data
ADP1828 Reference Design
FCDC 00107
FEATURES
A high density and cost-effective solution for low voltage DC-DC power conversion
Input Voltage Range: 2.25 V – 2.75 V
Output Voltage: 1 V
Output Current: 12 A
Ripple 20 mV ppk
Transient step ±5%, 50% max load
ADP1828 DESCRIPTION
This ADP1828 reference design uses 2.25 V to 2.75 V for the input voltage, with a separate 3.3 V bias rail. The output
voltage and current is:
•
VOUT1 = 1.0 V with a maximum output current of 12 A,
Design criteria require no tracking or sequencing. The ripple and transient assumptions are 20 mV peak to peak voltage
ripple and 5% deviation due to 50% instantaneous load step respectively. The nominal switching frequency is fixed at
300 kHz.
Rev. 0
Reference designs are as supplied “as is” and without warranties of any kind, express,
implied, or statutory including, but not limited to, any implied warranty of
merchantability or fitness for a particular purpose. No license is granted by implication or
otherwise under any patents or other intellectual property by application or use of
reference designs. Information furnished by Analog Devices is believed to be accurate
and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for
any infringements of patents or other rights of third parties that may result from its use.
Analog Devices reserves the right to change devices or specifications at any time without
notice. Trademarks and registered trademarks are the property of their respective
owners. Reference designs are not authorized to be used in life support devices or
systems.
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Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
Preliminary Technical Data
FCDC 00107
TABLE OF COTENTS
Features....................................................................................................................................................................................................... 1
ADP1828 Description .............................................................................................................................................................................. 1
Revision History........................................................................................................................................................................................ 2
ADP1828 General Description ............................................................................................................................................................... 3
Schematic ................................................................................................................................................................................................... 3
Bill of Materials ......................................................................................................................................................................................... 4
Performance............................................................................................................................................................................................... 5
Notes: .......................................................................................................................................................................................................... 6
TABLE OF FIGURES
Figure 1.
Schematic ............................................................................................................................................................................. 3
Figure 2.
Calculated Efficiency.......................................................................................................................................................... 5
Figure 3.
Calculated Gain and Phase Response .............................................................................................................................. 5
REVISION HISTORY
3/12/2008—Revision 0: Initial Version
Rev. 0 | Page 2 of 6
Preliminary Technical Data
FCDC 00107
ADP1828 GENERAL DESCRIPTION
The ADP1828 is a versatile and synchronous PWM voltage mode buck controller. It drives an all N-channel power stage to
regulate an output voltage as low as 0.6 V to 85% of the input voltage and is sized to handle large MOSFETs for point-of-load
regulators. The ADP1828 is ideal for a wide range of high power applications, such as DSP and processor core I/O power, and
general-purpose power in telecommunications, medical imaging, PC, gaming, and industrial applications. It operates from input
bias voltages of 3 V to 18 V with an internal LDO that generates a 5 V output for input bias voltages greater than 5.5 V. The
ADP1828 operates at a pin-selectable, fixed switching frequency of either 300 kHz or 600 kHz, or at any frequency between 300
kHz and 600 kHz with a resistor. The switching frequency can also be synchronized to an external clock up to 2× the part’s
nominal oscillator frequency. The clock output can be used for synchronizing additional ADP1828s (or the ADP1829 controllers),
thus eliminating the need for an external clock source. The ADP1828 includes soft start protection to limit any inrush current
from the input supply during startup, reverse current protection during soft start for a precharged output, as well as a unique
adjustable lossless current-limit scheme utilizing external MOSFET RDSON sensing. For applications requiring power-supply
sequencing, the ADP1828 provides a tracking input that allows the output voltage to track during startup, shutdown, and faults.
The additional supervisory and control features include thermal overload, undervoltage lockout, and power good. The ADP1828
operates over the −40°C to +125°C junction temperature range and is available in a 20-lead QSOP.
SCHEMATIC
CKout
3.3Vbias
Rcklo
Rb0
Rckhi
2.5Vin
Cin1
1
Rfhi
Rflo
FSync
ENin
2.5Vin
2
Rsync
3
Ren1
Ren2
4
Rv5
Cvin
Cv5
Rf1
Rc3
5
6
7
Cc1
Cc3
Rc1 Cc0
8
Freq Clkout
Sync Clkset
EN
BST
IN
DH
Vreg
SW
Gnd
CSL
Com Pgnd
p
FB
DL
TRK
PV
SS
Pgd
19
18
9
Rt1
Rt2
Css
Rt3
Rpg
10
Rbst
QH1
17
Dbst
Cbst
16
15
Ccl
Rcl1
14
L1
Rcl2
13
Rf2
TRKin
Gnd
20
12
QL1
Cdr
11
Gnd
Rvcc
Co1
Co2
PwrGd
Vout
3.3Vbias
Rpv
Figure 1.
Schematic
Rev. 0 | Page 3 of 6
Preliminary Technical Data
FCDC 00107
BILL OF MATERIALS
Table 1. Bill of Materials
Designator
Part Number
Manufacturer
Value
Package
Comment
U1
ADP1828
Analog Devices
QH1
BSC020N03MS
Infineon
PG-TDSON-8
N-Channel MOSFET
QH1, QL1
BSC016N03MS
Infineon
PG-TDSON-8
L1
PA1320.301NL
Pulse
300nH
10.4mm x 8.0mm
N-Channel MOSFET
Power Inductor / DCR = .48mO / Ferrite /
Bead
Cin1
grm32er60j107m
Murata
100uF
1210
Input MLCC / X5R / 6.3V
Co1, Co2
grm32er60j107m
Murata
100uF
1210
Output MLCC / X5R / 6.3V
Cv5, Cpv
C2012X7R1C105K
TDK
1uF
0603
MLCC / X7R / 16V
Rf1
Generic 1%
Vishay
30.1k
0402
Feedback Resistor
Rf2
Generic 1%
Vishay
20.0k
0402
Feedback Resistor
Rc3
Generic 10%
Vishay
287ohms
0402
Compensation Resistor
Cc3
Generic 10%
Vishay
330pF
0402
Compensation Capacitor
Rc1
Generic 10%
Vishay
20.0k
0402
Compensation Resistor
Cc1
Generic 10%
Vishay
470pF
0402
Compensation Capacitor
Cc0
Generic 10%
Vishay
33pF
0402
Compensation Capacitor
Css
Generic 10%
Vishay
10nF
0402
COG or X7R / Soft Start Capacitor
Rpg
Generic 10%
Vishay
100k
0402
POK1 Resistor
Rpv, Rb0
Generic 10%
Vishay
10ohms
0402
Decoupling Resistor
Rcl1
Generic 10%
Vishay
1.40k
0402
Current Limit Resistor
Ccl1
Generic 10%
Vishay
33pF
0402
Current Limit Signal Filter Capacitor
Dbst
BAT54
Any
Cbst
Rt1, Rt2, Rvcc,
Rcl2, Ren2,
Rflow, Rckhi
Rt3, Rbst, Ren1,
Rsync, Rfhigh,
Rcklo, Rv5
Generic 10%
Vishay
QSOP-20L
SOD-323
100nF
0402
NP
0ohms
Rev. 0 | Page 4 of 6
0402
Voltage Mode Controller
Bootstrap Diode
COG or X7R / Boost Capacitor
Preliminary Technical Data
FCDC 00107
PERFORMANCE
Figure 2.
Figure 3.
Calculated Efficiency
Calculated Gain and Phase Response
Rev. 0 | Page 5 of 6
Preliminary Technical Data
FCDC 00107
NOTES:
If a different number, or different type of output capacitors are used on the switching outputs the loop compensation
components may need adjustment.
©2008 Analog Devices, Inc. All rights
reserved. Trademarks and registered
trademarks are the property of their
respective owners.
EB0561
Rev. 0 | Page 6 of 6