20 A Evaluation Board for Step-Down DC-to-DC Controller EVAL-ADP1828HC gaming, and industrial applications. It operates from an input voltage of 3 V to 18 V with an internal LDO that generates a 5 V output for a VIN of 5.5 V to 18 V. EVALUATION BOARD DESCRIPTION This data sheet describes the design, operation, and test results of the 20 A ADP1828 evaluation board. The input range for this evaluation board is 6 V to 18 V, and the output voltage is 1.8 V with a maximum load current of 20 A. For this design, a switching frequency (fSW) of 300 kHz is chosen to achieve a good balance between efficiency and the sizes of the power components. The ADP1828 operates at a pin-selectable, fixed switching frequency of either 300 kHz or 600 kHz, or at any frequency between 300 kHz and 600 kHz if a resistor is used. The frequency can also be synchronized to an external clock up to 2× the switching frequency. The clock output can be used for synchronizing the ADP1828 or another part, such the ADP1829, thus eliminating the need for an external clock source. The ADP1828 includes soft start protection (to limit inrush current from the input supply during startup), reverse current protection during soft start for a precharged output, voltage tracking, power good, as well as an adjustable lossless current-limit scheme utilizing external MOSFET sensing. The ADP1828 is offered in a 20-lead QSOP package. ADP1828 DEVICE DESCRIPTION The ADP1828 is a synchronous PWM voltage mode buck controller. It drives an all N-channel power stage to regulate an output voltage as low as 0.6 V to 85% of the input voltage and is sized to handle large MOSFETs for point-of-load regulators. The ADP1828 is ideal for a wide range of high power applications, such as DSP and processor core I/O power, as well as generalpurpose power in telecommunications, medical imaging, PC, DIGITAL PICTURE OF THE BOARD DISK DRIVE POWER CONNECTOR VIN TERMINAL GND TERMINAL ACTIVE AREA GND TERMINAL ADP1828 HIGH-SIDE MOSFET LOW-SIDE MOSFETS 06903-001 VOUT TERMIINAL Figure 1. Rev. 0 Evaluation boards are only intended for device evaluation and not for production purposes. Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under any patents or other intellectual property by application or use of evaluation boards. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Analog Devices reserves the right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Evaluation boards are not authorized to be used in life support devices or systems. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. EVAL-ADP1828HC TABLE OF CONTENTS Evaluation Board Description......................................................... 1 Switching Noise and Overshoot Reduction...............................4 ADP1828 Device Description......................................................... 1 Compensation Design ..................................................................4 Digital Picture of the Board ............................................................ 1 Test Results .........................................................................................5 Revision History ............................................................................... 2 Evaluation Board Operating Instructions..................................7 Component Design .......................................................................... 3 Evaluation Board Schematic ............................................................9 Inductor Selection ........................................................................ 3 Evaluation Board Layout ............................................................... 10 Input Capacitor............................................................................. 3 Ordering Information.................................................................... 11 Output Capacitor Selection......................................................... 3 Bill of Materials........................................................................... 11 MOSFET Selection....................................................................... 3 Ordering Guide .......................................................................... 12 Soft Start ........................................................................................ 4 ESD Caution................................................................................ 12 Current Limit ................................................................................ 4 REVISION HISTORY 8/07—Revision 0: Initial Version Rev. 0 | Page 2 of 12 EVAL-ADP1828HC COMPONENT DESIGN For information in selecting power components and calculating component values, see the ADP1828 data sheet. INDUCTOR SELECTION For this design, a 0.82 μH inductor with a 27 A saturation current rating (744355182 from Würth Elektronik Group) is selected. This is a compact flat-wire inductor with a ferrite core, which offers high performance in terms of low RDC and low core loss. INPUT CAPACITOR For input voltages up to 18 V and a load up to 20 A, 35 V multilayer ceramic capacitors (MLCCs) can be used. However, the 35 V MLCCs are expensive and many of them are needed. An alternative solution is to use the inexpensive aluminum electrolytic capacitors, but they are fairly large and bulky and have large ESR at low temperatures. Another alternative is to use the OS-CON™ polymer capacitors from Sanyo or the equivalent from another manufacturer because such capacitors offer a relative small size, low ESR, and high current ripple rating. For this design, if the input voltage is 18 V and the inductor is 0.82 μH, the inductor current ripple is calculated to be about 6.6 A. The current rating of the input capacitors must be greater than 6.6 A. Two OS-CON capacitors, 20SP180M (180 μF/20 V, each with 4.28 A ripple rating), connected in parallel provides an effective ripple rating of 8.56 A and satisfies this requirement. OUTPUT CAPACITOR SELECTION The output voltage ripple can be approximated as follows: ΔVOUT = ΔI L ⎛ 1 ESR 2 + ⎜⎜ ⎝ 8 f SW C OUT 2 ⎞ ⎟ + (4 f SW ESL) 2 ⎟ ⎠ (1) where: ΔVOUT is the output ripple voltage. ΔIL is the inductor ripple current. ESR is the equivalent series resistance of the output capacitor. ESL is the equivalent series inductance of the output capacitor. MLCCs can be used in this design. However, for a 20 A step load, a large bulk capacitance (approximately 1000 μF) is required to suppress the current ripple. Using ten 100 μF MLCCs is an expensive solution. An alternative solution is to use the aluminum electrolytic OS-CON polymer or the POSCAP™ polymer capacitors. Because of the small footprint, low height, and low ESR of POSCAP capacitors, they have been selected for the output capacitors in this design. A minimum capacitance at the output is needed to achieve a fast load-step response and reasonable overshoot voltage. The minimum capacitance can be calculated as C OUT,min1 = ΔI LOAD 2 L 2VO UT ΔVup (2) C OUT,min2 = ΔI LOAD 2 L 2(V IN − VO UT ) ΔVdown (3) where: ΔILOAD is the step load. ΔVup is the output voltage overshoot when the load is stepped down. ΔVdown is the output voltage overshoot when the load is stepped up. VIN is the input voltage. COUT,min1 is the minimum capacitance according to the overshoot voltage ΔVup. COUT,min2 is the minimum capacitance according to the overshoot voltage ΔVdown. Select an output capacitance that is greater than both COUT, min1 and COUT, min2. Two 1000 μF POSCAP capacitors, 2R5TPD1000M5 (100 μF/2.5 V with 5 mΩ and 6 A current ripple rating), and one 47 μF MLCC have been chosen for the output to satisfy a 20 A step load. These two POSCAP capacitors connected in parallel yield an effective current ripple rating of 12 A. The POSCAP capacitors suppress the large current ripples, and the 47 μF MLCC suppresses the high frequency ripples. MOSFET SELECTION In general, select the high-side MOSFET with fast rise and fall times and with low input capacitance. The fast rise and fall times are especially important for circuits with low duty cycles because switching loss is high. Select the low-side MOSFET with low RDSON. Switching speed is not critical because there is no switching loss in the low-side MOSFET. A small amount of power is lost in the body diode of the low-side MOSFET during the dead time. For this design, the duty cycle range is from 10% to 30% (VIN = 6 V to 18 V); therefore, finding a high-side MOSFET with fast switching and low input capacitance and a low-side MOSFET with low RDSON is critical. The BSC080N03LS from Infineon Technologies in the PG-TDSON-8, or Super-SO8 (comparable to the PowerPAK® SO-8 from Vishay Silliconix), package offers high performance in terms of fast rise and fall times (3 ns), low input capacitance (1.2 nF), and low RDSON (12 mΩ at VGS = 4.5 V), making it a great selection for the high-side MOSFET in this 20 A application. As for the low-side MOSFETs, two BSC030N03LS from Infineon Technologies connected in parallel are adequate to handle the power dissipation. The BSC030N03LS has a low RDSON of 4.7 mΩ at a VGS of 4.5 V. Power MOSFETs in DPAK packages can also be used. Although DPAK has low thermal resistance, it has higher parasitic inductance than the PowerPAK, which may cause excessive ringing at the SW node and contribute to lower efficiency at heavy loads. Rev. 0 | Page 3 of 12 EVAL-ADP1828HC SOFT START The soft start period is given by the following equation: (4) where: CSS is the soft start capacitance in microfarads. tSS is the soft start period in seconds. SWITCHING NOISE AND OVERSHOOT REDUCTION A CSS of 150 nF, which yields a 19 ms soft start period, is chosen for this design. CURRENT LIMIT The external current-limit resistor can be calculated by the following equation: RCL ΔI L ⎞ ⎛I ⎜ LIMIT + ⎟RDSON − 38 mV 2 ⎠ ⎝ = 42 μA An RC snubber can be added between SW and PGND to reduce noise and ringing at the SW node and at the drains of the external MOSFETs. In this design, an RC snubber is added with an RSNUB of 3.01 Ω and a CSNUB of 1.2 nF. Gate resistors can be added to reduce overshoot voltage at the drains of the MOSFETs. For more information, see the ADP1828 data sheet. COMPENSATION DESIGN (5) where: ILIMIT is the output limit current. ΔIL is the ripple current in the inductor. RDSON is the on resistance of the low-side MOSFET. −38 mV is the CSL threshold voltage. Type III compensation is used in this design because each of the output POSCAP capacitors has a low ESR of 5 mΩ. For information on calculating the compensation component values, refer to the ADP1828 data sheet. CHF RFF VOUT ΔI L = VOUT (1 − D) f SW × L RZ CI RTOP RBOT ΔIL can be approximated by CFF FB EA COMP INTERNAL VREF (6) 06903-002 C SS = 8.015 × t SS the actual current limit can vary by more than 50% from part to part over the temperature range. For more information on this topic or if accurate current-limit sensing is needed, see the ADP1828 data sheet. Figure 2. Type III Compensation where: D is the duty cycle. L is the inductance of the inductor. The compensation values for this evaluation board have been optimized as follows: In this design, RDSON of the MOSFET BSC030N03LS is 4.7 mΩ at a VGS of 4.5 V. Two BSC030N03LS MOSFETs in parallel yields an effective RDSON of 2.35 mΩ. Because L is chosen to be 0.82 μH, ΔIL is calculated to be 6.6 A with a VIN of 18 V. If ILIMIT is set to 25 A, RCL is calculated to be 1.33 kΩ. Keep in mind that the RDSON of the MOSFET can vary by more than 25% from part to part, and by more than 50% over the temperature range; therefore, RFF = 7.5 kΩ CFF = 680 pF RZ = 20 kΩ CI = 5.6 nF CHF = 33 pF RTOP = 20 kΩ RBOT = 10 kΩ Rev. 0 | Page 4 of 12 EVAL-ADP1828HC TEST RESULTS T T SW VOUT (AC-COUPLED) 1 1 INPUT RIPPLE STEP LOAD (5A TO 20A) 2 OUTPUT RIPPLE CH2 5.00V M 1.00µs A CH1 6.40V BW 4 06903-003 CH1 10.0V CH3 50.0mV CH1 100mV M 200µs A CH4 8.20A CH4 5.00A Ω Figure 3. Output Ripple, VIN = 12 V, Load = 22 A Figure 6. Load Transient, VIN = 12 V, Load = 5 A to 20 A T 90 300kHz VIN = 5V TO 9V 600kHz 80 VIN = 12V VOUT = 1.8V TA = 25°C 70 60 50 VOUT (AC-COUPLED) 1 40 2 4 6 8 10 12 LOAD (A) 14 16 18 20 CH1 2.00V CH3 50.0mV Figure 4. Efficiency vs. Load Current BW M 4.00ms A CH1 6.08V 06903-007 0 06903-004 30 3 Figure 7. Line Transient, VIN = 5 V to 9 V, No Load T T DH DH 1 1 FB DL 2 SS VIN = 0V TO 3V 4 2 VREG CH1 5.00V CH3 200mV CH2 200mV CH4 2.00V M 4.00ms A CH4 1.12V CH1 10.0V CH2 5.00V CH4 2.00AΩ M 1.00µs A CH1 3.60V Figure 8. Inductor Current Waveform, VIN = 12 V, No Load Figure 5. Soft Start into Precharged Load Rev. 0 | Page 5 of 12 06903-008 INDUCTOR CURRENT 4 06903-005 EFFICIENCY (%) BW 06903-006 3 EVAL-ADP1828HC 1.814 T 1.812 EN 1 1.810 V OUT (V) 1.808 VOUT 1.806 2 1.804 3 SS 1.802 0 5 10 15 20 25 LOAD (A) 1.8046 1.8044 1.8040 1.8038 1.8036 1.8034 LOAD = 15A 10 12 14 16 VIN (V) 18 20 06903-010 VOUT (V) 1.8042 8 CH2 1.00V M 4.00ms A CH1 Figure 11. Soft Start, VIN = 12 V Figure 9. Load Regulation, VIN = 12 V 1.8032 CH1 5.00V CH3 1.00V Figure 10. Line Regulation Rev. 0 | Page 6 of 12 3.000V 06903-011 1.798 06903-009 1.800 EVAL-ADP1828HC EVALUATION BOARD OPERATING INSTRUCTIONS 1. 2. 3. 4. 5. 6. 7. Connect Jumper JP3 to the on position to enable the ADP1828. Do not connect Jumper J7 (VIN to VREG). Connect Jumper JP2 (FREQ) to the 300 kHz position. Connect Jumper J11 (SYNC) to GND (that is, if SYNC is not used). If SYNC is used, connect SYNC to an external clock or CLKOUT from another ADP1828. Connect Jumper JP1 (CLKSET) to high, which sets CLKOUT to 2× the internal oscillator frequency and in phase with the oscillator, or to low, which sets CLKOUT to 1× the oscillator frequency and 180o out of phase. Connect the positive terminal of the input power supply to the input terminal, J8. Connect the load to the VOUT terminal, J13. Table 1. Jumper Descriptions Jumper JP1 Description CLKSET. Clock set input. Function CLKSET = high sets CLKOUT to 2 × fOSC CLKSET = low sets CLKOUT to 1 × fOSC VREG: fSW = 600 kHz GND: fSW = 300 kHz EN = on enables ADP1828 EN = off disables ADP1828 Short VREG to VIN when VIN is less than 5.5 V JP2 Frequency selection. Connect to VREG for fSW = 600 kHz. JP3 EN. Connect to the on position to enable the ADP1828. J7 VREG to VIN. Do not connect this jumper when VIN is more than 5.5 V. J11 SYNC. Connect SYNC to GND if the SYNC function is not used. If SYNC is used, connect SYNC to an external clock or to the CLKOUT from another ADP1828. Synchronization J9 12 V supply from the disk drive connector. Short this jumper if the 12 V input supply comes from the disk drive connector. Do not short J9 and J10 at the same time. 12 V supply from disk drive J10 5 V supply from the disk drive connector. Short this jumper if the 5 V input supply comes from the disk drive connector. Do not short J9 and J10 at the same time. 5 V supply from disk drive Table 2. Evaluation Board Operating Conditions Parameter VIN VOUT fSW Maximum Step Load Condition Input range 10 V to 18 V. VOUT = 1.8 V at 20 A. Switching frequency is set to 300 kHz. 0 A to 20 A. This design can handle a 0 A to 20 A step load at the output. Table 3. Temperature of the Power Components 1, 2 ADP1828 61°C 1 2 Inductor (Würth Elektronik, 744355182) 65°C High-Side MOSFET (Infineon Technologies, BSC080N03LS) 87°C Low-Side MOSFETs (Infineon Technologies, 2 × BSC030N03LS) 76°C After the evaluation board ran for 30 minutes at a 20 A load, the surface temperatures of the power components were measured with an infrared thermometer. VIN = 12 V, TA = 25°C Rev. 0 | Page 7 of 12 EVAL-ADP1828HC Table 4. Miscellaneous Information Parameter Switching Frequency, fSW Power MOSFETs: PG-TDSON-8 (Super-SO8) or PowerPAK SO-8 Inductor VREG and VIN Snubber Circuit Gate Resistors Capacitor C22 Voltage Divider Comment The switching frequency, fSW, is set to 300 kHz (Jumper JP2) on the evaluation board. If a different fSW is desired, the compensation and the power components need to be recalculated. If a fSW other than 300 kHz or 600 kHz is desired, a resistor, R13, can be soldered onto the PCB to select any frequency between 300 kHz and 600 kHz. The footprint for the power MOSFETs is laid out to fit both the PowerPAK SO-8 and the standard SO-8 package. The board is laid out to fit two MOSFETs for the top side and two for the bottom side. Only one high-side MOSFET is fitted on the evaluation board. The footprint for the inductor is laid out to fit inductors smaller or larger than the onboard inductor. For input voltages less than 5.5 V, the user can connect Jumper J7 by shorting VREG to VIN. A snubber RC circuit, RSNUB and CSNUB, is laid out on the evaluation board to help reduce switching noise and ringing at the SW node. The user can remove this RC snubber or try different RC values for a particular application. Note that the RC snubber dissipates power and slightly reduces the overall efficiency, generally in the range of 0.1% to 0.5%. The dummy 0 Ω gate resistors, R2, R3, R14, and R15, are provided on the evaluation board for reducing overshoot voltage at the drains of the external MOSFETs. The user can change these 0 Ω resistors to different values (generally in the range of 1 Ω to 5 Ω) to achieve the desired reduction in overshoot voltage. Keep in mind that the gate resistor dissipates power and slightly reduces the overall efficiency. A ceramic capacitor, C22, is placed very close to the drain of the high-side MOSFET. This capacitor, typically 0.1 μF to 1 μF, helps reduce input impedance during high frequency transients. C22 is not assembled on the evaluation board. The user can add this capacitor if needed for a particular application. If a different output voltage other than 1.8 V is desired, the user needs to change the voltage feedback divider, R7 and R8, and rework the compensation component values as well as possibly the input and output capacitances. Table 5. Suggestions of Power Components for Other Configurations VIN Range 6 V to 18 V VOUT Range 1.2 V to 5 V Output Current 8 A to 13 A 6 V to 18 V 1.2 V to 5 V 13 A to 22 A 6 V to 18 V 1.2 V to 5 V 22 A to 27 A Inductor 1 μH 4 HC7-1R0-R 0.82 μH 5 744355182 0.47 μH5 744355147 High-Side MOSFETs 1 BSC080N03LS Low-Side MOSFETs 1 BSC030N03LS Input Capacitors 2 2 × 20SP180M BSC080N03LS 2× BSC030N03LS 2 × 20SP180M 2× BSC080N03LS 2× BSC030N03LS 3 × 20SP180M 1 MOSFETS are from Infineon Technologies. Input capacitors are the OS-CON type from Sanyo. 3 Output capacitors are the POSCAP type from Sanyo. 4 From Coiltronics. 5 From Würth Elektronik Group. 2 Rev. 0 | Page 8 of 12 Output Capacitors 3 2R5TPD1000M5 + 22 μF/6.3 V/X5R 2× 2R5TPD1000M5 + 47 μF/6.3 V/X5R 3× 2R5TPD1000M5 + 47 μF/6.3 V/X5R Rev. 0 | Page 9 of 12 C8 680 pF R11 7.5 k R8 20K C7 33pF R7 10K SGN D R10 20K C6 5.6nF R9 100k TRK TP1 GND J11 100 K R4 SGN D SYNC TP10 VREG Figure 12. ADP1828 20 A Evaluation Board Schematic C9 1.0u F SGN D VREG SGN D R13 R6 100 K ADP 1828 GND C19 1.0u F D1 JP2 JUM P ER- 3 TP3 PGOO D 20 19 18 17 16 15 14 13 12 11 600kHZ FREQ 300kHZ CL KOUT CL KSET BST DH SW CSL PGND DL PV PGOO D JP3 JUM P ER- 3 FREQ SYNC EN IN V REG GND COM P FB TRK SS U1 C2 150n F SS TP9 1 2 3 4 5 6 7 8 9 10 ON EN OFF C10 0.1uF OPEN J7 JP1 TP2 CL KOUT GND C20 C1 0.47uF TP5 BST HI TP6 DH JUM P ER- 3 SGN D CL KSET LOW 0 0 R15 R3 TP8 SW J10 GND L1 0.8 2uH Q2 (not fitted ) R16 3.01 ohm C17 Q4(BSC030N03LS ) 1.2n F Q1(BSC080N03LS ) GND Q3(BSC030N03LS ) 1.33K R1 SGN D R17 (not fitted) DL TP7 0 R2 0 R14 1 GND 2 GND 3 5V 4 12V J9 + C4 + C5 C12 + + C13 180UF 20V 47UF 6.3V C18 + C14 + C15 + C21 C16 C22 GND TP 2 1 1 1 C24 Vout TP 1 gnd C23 1 Note: Vout TP 1 and Vout TP GND 2 are for scope probe connection when taking ripple measurment. The test points are directly connected to the pads of C3, to ensure cleanest measurment. gnd C3 C11 + 180UF 20V 100 0UF 2.5V VIN 100 0UF 2.5V TP11 SYNC not fitted TP4 FB J14 J13 J12 J8 GND VOUT=1.8 V GND VIN= 6V- 18V 06903-012 P1 MOL EX-15244441 EVAL-ADP1828HC EVALUATION BOARD SCHEMATIC EVAL-ADP1828HC Figure 16. Third Layer (GND Layer) Figure 14. Top Layer 06903-017 06903-014 Figure 13. Silkscreen Layer 06903-016 06903-013 EVALUATION BOARD LAYOUT 06903-015 Figure 17. Bottom Layer Figure 15. Second Layer Rev. 0 | Page 10 of 12 EVAL-ADP1828HC ORDERING INFORMATION BILL OF MATERIALS Table 6. Component Listing Item 1 Qty 2 Designator C11, C12 Description Capacitor, OS-CON, 180 μF, 20 V, 4.28 A Manufacturer Sanyo Part No. 20SP180M 2 2 C4, C5 Capacitor, POSCAP, 1000 μF, 2.5 V, 6 A, 5 mΩ Sanyo 2R5TPD1000M5 3 1 C3 Capacitor, ceramic, 47 μF, 6.3 V, X5R, 1206 Murata GRM31CR60J476ME19 4 1 C1 Capacitor, ceramic, 0.47 μF, 10 V, X5R, 0603 5 1 C10 Capacitor, ceramic, 0.1 μF, 6.3 V, X5R, 0603 Taiyo Yuden Murata Vishay LMK107BJ474MA-T GRM188R61A474KA61 VJ0603Y104MXQ 6 4 Resistor (dummy), 0 Ω, 1/10 W, 1%, 0603 Vishay CRCW06030R00F 7 1 R2, R3, R14, R15 R8 Resistor, 20 kΩ, 1/10 W, 1%, 0603 Vishay CRCW06032002F 8 1 R7 Resistor, 10 kΩ, 1/10 W, 1%, 0603 Vishay CRCW06031002F 9 1 R11 Resistor, 7.5 kΩ, 1/10 W, 1%, 0603 Vishay CRCW06037501F 10 1 R10 Resistor, 20 kΩ, 1/10 W, 1%, 0603 Vishay CRCW06032002F 11 3 R4, R6, R9 Resistor, 100 kΩ, 1/10 W, 1%, 0603 Vishay CRCW06031003F 13 1 R16 Resistor, 3.01 Ω, 0805 (snubber) Vishay CRCW08053R01F 14 1 R1 Resistor, 1.33 kΩ, 1/10 W, 1%, 0603 (current-limit resistor) Vishay CRCW06031331F 15 1 C2 Capacitor, ceramic, 150 nF, 16 V, X7R, 0603 Vishay VJ0603Y154KXJA 16 1 C8 Capacitor, ceramic, 680 pF, 0603 Vishay VJ0603Y681KXXA 17 1 C7 Capacitor, ceramic, 33 pF, 0603 Vishay VJ0603A330KXXA 18 1 C6 Capacitor, ceramic, 5.6 nF, 0603 Vishay VJ0603Y562KXXA 19 2 C9, C19 Capacitor, ceramic, 1.0 μF, 10 V, X5R, 0603 21 1 C17 Capacitor, ceramic, 1.2 nF, 0805 (snubber) Taiyo Yuden Murata Vishay LMK107BJ105MK-T GRM185R61A105KE36 VJ0805Y122KXXA 22 1 L1 Inductor 0.82 μH, 27 A, 0.9 mΩ, HCA series Würth Elektronik Group Vishay 744355182 BSC080N03LS 23 1 D1 Schottky diode, 30 V, VF = 0.5 V @ 30 mA, SOD323 24 1 Q1 Transistor, N-MOSFET, 30 V, Super-SO8, 12 mΩ @ 4.5 V, 30 A 25 2 Q3, Q4 Transistor, N-MOSFET, 30 V, Super-SO8, 4.7 mΩ @ 4.5 V, 30 A 26 1 P1 Disk drive power connector Infineon Technologies Infineon Technologies Molex Inc. 27 3 JP1, JP2, JP3 3-terminal jumpers, 0.1" spacing Any 28 1 J11 2-terminal jumper, 0.1" spacing Any 29 13 TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP10, TP11, VOUT TP 1, GND TP 2 Test points for VREG, SW, DH, DL, TRK, SS, PGOOD, BST, FB, SYNC, CLKOUT, GND, VOUT Any 40 mil (1 mm) through hole 30 1 U1 DUT, 20-lead QSOP Analog Devices ADP1828 Rev. 0 | Page 11 of 12 BAT54WS BSC030N03LS 15244441 EVAL-ADP1828HC ORDERING GUIDE Model ADP1828HC-EVALZ1 1 ESD CAUTION Description Evaluation Board Z = RoHS Compliant Part. ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. EB06903-0-8/07(0) Rev. 0 | Page 12 of 12