PD - 95468A
IRF4104PbF
IRF4104SPbF
IRF4104LPbF
Features
l
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
HEXFET® Power MOSFET
D
VDSS = 40V
RDS(on) = 5.5mΩ
G
Description
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features combine
to make this design an extremely efficient and
reliable device for use in a wide variety of
applications.
Absolute Maximum Ratings
ID = 75A
S
D2Pak
IRF4104SPbF
TO-220AB
IRF4104PbF
Parameter
TO-262
IRF4104LPbF
Max.
Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
120
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package limited)
Pulsed Drain Current
IDM
75
470
PD @TC = 25°C Power Dissipation
140
W
Linear Derating Factor
VGS
Gate-to-Source Voltage
EAS (Thermally limited) Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
EAS (Tested )
0.95
± 20
W/°C
V
120
mJ
84
c
d
c
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
TJ
Operating Junction and
TSTG
Storage Temperature Range
-55 to + 175
°C
Mounting Torque, 6-32 or M3 screw
i
Parameter
RθJC
Junction-to-Case
RθCS
Case-to-Sink, Flat Greased Surface
RθJA
Junction-to-Ambient
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Junction-to-Ambient (PCB Mount)
A
mJ
Thermal Resistance
i
220
See Fig.12a, 12b, 15, 16
g
Soldering Temperature, for 10 seconds
RθJA
h
A
i
j
300 (1.6mm from case )
y
y
10 lbf in (1.1N m)
Typ.
Max.
Units
–––
1.05
°C/W
0.50
–––
–––
62
–––
40
1
07/23/10
IRF4104S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ
RDS(on)
Min. Typ. Max. Units
40
–––
–––
Breakdown Voltage Temp. Coefficient
–––
0.032
–––
Static Drain-to-Source On-Resistance
–––
4.3
5.5
VGS(th)
Gate Threshold Voltage
2.0
–––
4.0
gfs
IDSS
Forward Transconductance
IGSS
V
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 75A
e
V
VDS = VGS, ID = 250µA
VDS = 10V, ID = 75A
63
–––
–––
V
–––
–––
20
µA
–––
–––
250
Gate-to-Source Forward Leakage
–––
–––
200
Drain-to-Source Leakage Current
Conditions
VGS = 0V, ID = 250µA
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
Gate-to-Source Reverse Leakage
–––
–––
-200
Qg
Total Gate Charge
–––
68
100
Qgs
Gate-to-Source Charge
–––
21
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
27
–––
VGS = 10V
td(on)
Turn-On Delay Time
–––
16
–––
VDD = 20V
tr
Rise Time
–––
130
–––
td(off)
Turn-Off Delay Time
–––
38
–––
tf
Fall Time
–––
77
–––
LD
Internal Drain Inductance
–––
4.5
–––
ID = 75A
nC
VDS = 32V
e
ID = 75A
ns
RG = 6.8 Ω
VGS = 10V
e
Between lead,
nH
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
Ciss
Input Capacitance
–––
3000
–––
and center of die contact
VGS = 0V
Coss
Output Capacitance
–––
660
–––
Crss
Reverse Transfer Capacitance
–––
380
–––
Coss
Output Capacitance
–––
2160
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
560
–––
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
–––
850
–––
VGS = 0V, VDS = 0V to 32V
VDS = 25V
pF
ƒ = 1.0MHz
f
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
75
ISM
(Body Diode)
Pulsed Source Current
–––
–––
470
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.3
trr
Reverse Recovery Time
–––
23
35
ns
Qrr
Reverse Recovery Charge
–––
6.8
10
nC
ton
Forward Turn-On Time
2
c
Conditions
MOSFET symbol
A
V
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 75A, VGS = 0V
TJ = 25°C, IF = 75A, VDD = 20V
di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRF4104S/LPbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
10
4.5V
1
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
20µs PULSE WIDTH
Tj = 25°C
0.1
4.5V
10
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
20µs PULSE WIDTH
Tj = 175°C
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
120
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current ( A)
VGS
T J = 25°C
T J = 175°C
100
10
VDS = 15V
20µs PULSE WIDTH
1
4
6
8
10
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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T J = 25°C
100
80
60
TJ = 175°C
40
20
VDS = 10V
380µs PULSE WIDTH
0
12
0
20
40
60
80
100
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
Vs. Drain Current
3
IRF4104S/LPbF
5000
VGS, Gate-to-Source Voltage (V)
4000
C, Capacitance (pF)
20
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Ciss
3000
2000
Coss
1000
Crss
ID= 75A
VDS= 32V
VDS= 20V
16
12
8
4
0
0
1
10
0
100
1000.0
ID, Drain-to-Source Current (A)
10000
100.0
T J = 175°C
10.0
T J = 25°C
1.0
VGS = 0V
0.1
0.2
0.6
1.0
1.4
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
60
80
100
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
ISD, Reverse Drain Current (A)
40
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
4
20
1000
100
100µsec
10
1
1.8
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
0
1
10msec
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF4104S/LPbF
120
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
LIMITED BY PACKAGE
ID , Drain Current (A)
100
80
60
40
20
0
25
50
75
100
125
150
ID = 75A
VGS = 10V
1.5
1.0
0.5
175
-60 -40 -20
T C , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.05
0.1
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τ2
Ci= τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
R3
R3
τ3
τC
τ
τ3
Ri (°C/W) τi (sec)
0.371
0.000272
0.337
0.001375
0.337
0.018713
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF4104S/LPbF
DRIVER
L
VDS
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
500
15V
TOP
400
BOTTOM
ID
11A
16A
75A
300
200
100
0
25
50
75
100
125
150
175
Starting T J, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
4.0
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
10 V
ID = 250µA
3.0
2.0
1.0
-75 -50 -25
VGS
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRF4104S/LPbF
Avalanche Current (A)
1000
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
0.05
10
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
140
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 75A
EAR , Avalanche Energy (mJ)
120
100
80
60
40
20
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRF4104S/LPbF
D.U.T
Driver Gate Drive
+
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
*
RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRF4104S/LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 2000
IN T HE AS S EMBLY LINE "C"
Note: "P" in as s embly line pos ition
indicates "Lead - Free"
INT ERNAT IONAL
RECT IFIER
LOGO
AS S EMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 0 = 2000
WEEK 19
LINE C
TO-220AB package is not recommended for Surface Mount Application
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/datasheets/data/auirf4104.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRF4104S/LPbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
T HIS IS AN IRF530S WITH
LOT CODE 8024
ASSEMBLED ON WW 02, 2000
IN THE ASS EMBLY LINE "L"
INT ERNAT IONAL
RECT IF IER
LOGO
ASSE MBLY
LOT CODE
PART NUMBER
F 530S
DAT E CODE
YE AR 0 = 2000
WEE K 02
LINE L
OR
INT ERNAT IONAL
RECT IF IER
LOGO
ASSE MBLY
LOT CODE
PART NUMBER
F 530S
DAT E CODE
P = DESIGNATES LEAD - F REE
PRODUCT (OPT IONAL)
YE AR 0 = 2000
WEEK 02
A = ASS EMBLY SITE CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/datasheets/data/auirf4104.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRF4104S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE : T HIS IS AN IRL3103L
LOT CODE 1789
AS SEMBLED ON WW 19, 1997
IN T HE ASSEMBLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-F ree"
INT E RNAT IONAL
RECT IFIER
LOGO
ASSE MBLY
LOT CODE
PART NUMBER
DAT E CODE
YE AR 7 = 1997
WEEK 19
LINE C
OR
INTE RNAT IONAL
RECT IFIER
LOGO
ASSE MBLY
LOT CODE
PART NUMBE R
DAT E CODE
P = DE SIGNAT ES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
WEEK 19
A = ASSEMBLY SITE CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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11
IRF4104S/LPbF
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Notes:
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
max. junction temperature. (See fig. 11).
avalanche performance.
Limited by TJmax, starting TJ = 25°C, L = 0.04mH This value determined from sample failure population. 100%
RG = 25Ω, IAS = 75A, VGS =10V. Part not
tested to this value in production.
recommended for use above this value.
This is only applied to TO-220AB pakcage.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
This is applied to D2Pak, when mounted on 1" square PCB (FR Coss eff. is a fixed capacitance that gives the
4 or G-10 Material). For recommended footprint and soldering
same charging time as Coss while VDS is rising
techniques refer to application note #AN-994.
from 0 to 80% VDSS .
Repetitive rating; pulse width limited by
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/2010
12
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