PD - 95956A
IRLR3705ZPbF
IRLU3705ZPbF
Features
l
l
l
l
l
l
l
Logic Level
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
HEXFET® Power MOSFET
D
VDSS = 55V
RDS(on) = 8.0mΩ
G
Description
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features combine
to make this design an extremely efficient and
reliable device for use in a wide variety of applications.
ID = 42A
S
I-Pak
D-Pak
IRLR3705ZPbF IRLU3705ZPbF
Absolute Maximum Ratings
Parameter
Max.
I D @ T C = 25°C Continuous Drain Current, V GS @ 10V (Silicon Limited)
I D @ T C = 100°C Continuous Drain Current, V GS @ 10V
I D @ T C = 25°C
I DM
63
Continuous Drain Current, V GS @ 10V (Package Limited)
Pulsed Drain Current
c
V GS
d
E AS (Thermally limited) Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
E AS (Tested )
c
I AR
Avalanche Current
E AR
TJ
Repetitive Avalanche Energy
T STG
Storage Temperature Range
360
h
Parameter
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
j
A
°C
Mounting Torque, 6-32 or M3 screw
R θJA
mJ
-55 to + 175
300 (1.6mm from case )
y
ij
y
10 lbf in (1.1N m)
Thermal Resistance
R θJA
110
mJ
Soldering Temperature, for 10 seconds
j
W
W/°C
V
190
Operating Junction and
Junction-to-Case
130
0.88
± 16
See Fig.12a, 12b, 15, 16
g
R θJC
A
42
P D @T C = 25°C Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Units
89
Typ.
Max.
–––
1.14
–––
40
–––
110
Units
°C/W
HEXFET® is a registered trademark of International Rectifier.
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1
10/01/10
IRLR/U3705ZPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ
RDS(on)
Min. Typ. Max. Units
V
Conditions
55
–––
–––
VGS = 0V, ID = 250µA
Breakdown Voltage Temp. Coefficient
–––
0.053
–––
V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
–––
6.5
8.0
mΩ VGS = 10V, ID = 42A
–––
–––
11
VGS = 5.0V, ID
–––
–––
12
VGS = 4.5V, ID
e
= 34A e
= 21A e
VGS(th)
Gate Threshold Voltage
1.0
–––
3.0
V
gfs
Forward Transconductance
89
–––
–––
S
VDS = 25V, ID = 42A
µA
VDS = 55V, VGS = 0V
IDSS
–––
–––
20
–––
–––
250
Gate-to-Source Forward Leakage
–––
–––
200
Gate-to-Source Reverse Leakage
–––
–––
-200
Qg
Total Gate Charge
–––
44
66
Qgs
Gate-to-Source Charge
–––
13
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
22
–––
VGS = 5.0V
td(on)
Turn-On Delay Time
–––
17
–––
VDD = 28V
tr
Rise Time
–––
150
–––
td(off)
Turn-Off Delay Time
–––
33
–––
tf
Fall Time
–––
70
–––
VGS = 5.0V
LD
Internal Drain Inductance
–––
4.5
–––
Between lead,
LS
Internal Source Inductance
–––
7.5
–––
IGSS
Drain-to-Source Leakage Current
VDS = VGS, ID = 250µA
VDS = 55V, VGS = 0V, TJ = 125°C
nA
VGS = 16V
VGS = -16V
ID = 42A
nC
VDS = 44V
e
ID = 42A
ns
nH
RG = 4.2 Ω
e
D
6mm (0.25in.)
G
from package
S
and center of die contact
Ciss
Input Capacitance
–––
2900
–––
VGS = 0V
Coss
Output Capacitance
–––
420
–––
VDS = 25V
Crss
Reverse Transfer Capacitance
–––
230
–––
Coss
Output Capacitance
–––
1550
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
320
–––
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
–––
500
–––
VGS = 0V, VDS = 0V to 44V
pF
ƒ = 1.0MHz
f
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
–––
–––
42
ISM
(Body Diode)
Pulsed Source Current
–––
–––
360
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.3
V
p-n junction diode.
TJ = 25°C, IS = 42A, VGS = 0V
trr
Reverse Recovery Time
–––
21
42
ns
TJ = 25°C, IF = 42A, VDD = 28V
Qrr
Reverse Recovery Charge
–––
14
28
nC
di/dt = 100A/µs
ton
Forward Turn-On Time
2
c
MOSFET symbol
A
showing the
integral reverse
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRLR/U3705ZPbF
1000
100
BOTTOM
TOP
10
2.8V
≤ 60µs PULSE WIDTH
Tj = 25°C
ID, Drain-to-Source Current (A)
TOP
ID, Drain-to-Source Current (A)
1000
VGS
12V
10V
8.0V
5.0V
4.5V
3.5V
3.0V
2.8V
BOTTOM
2.8V
10
≤ 60µs PULSE WIDTH
Tj = 175°C
1
1
0.1
1
10
100
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
100
TJ = 25°C
TJ = 175°C
100.0
10.0
VDS = 15V
≤ 60µs PULSE WIDTH
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current(Α)
100
VGS
12V
10V
8.0V
5.0V
4.5V
3.5V
3.0V
2.8V
TJ = 25°C
80
60
TJ = 175°C
40
20
VDS = 8.0V
380µs PULSE WIDTH
1.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0 10.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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0
0
10
20
30
40
50
60
70
80
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
vs. Drain Current
3
IRLR/U3705ZPbF
5000
VGS, Gate-to-Source Voltage (V)
4000
C, Capacitance (pF)
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Ciss
3000
2000
1000
Coss
VDS = 44V
VDS= 28V
VDS= 11V
10
8
6
4
2
Crss
0
0
1
ID= 42A
10
0
100
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000.0
TJ = 175°C
10.0
TJ = 25°C
1.0
VGS = 0V
0.6
0.8
1.0
1.2
1.4
1.6
1.8
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
80
100
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100
100µsec
10
1msec
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
DC
0.1
0.1
0.4
60
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
0.2
40
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
100.0
20
2.0
1
10
100
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRLR/U3705ZPbF
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.5
LIMITED BY PACKAGE
ID , Drain Current (A)
80
60
40
20
0
25
50
75
100
125
150
ID = 42A
VGS = 10V
2.0
1.5
1.0
0.5
175
-60 -40 -20 0
TC , Case Temperature (°C)
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
vs. Temperature
Fig 9. Maximum Drain Current vs.
Case Temperature
Thermal Response ( ZthJC )
10
1
D = 0.50
0.20
0.10
0.1
τJ
0.05
0.02
0.01
R1
R1
τJ
τ1
R2
R2
τC
τ2
τ1
τ2
τ
Ri (°C/W) τi (sec)
0.6984 0.000465
0.4415
0.004358
Ci= τi/Ri
Ci i/Ri
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
DRIVER
L
VDS
D.U.T
RG
20V
VGS
+
V
- DD
IAS
tp
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
IRLR/U3705ZPbF
500
I D
5.3A
7.0A
BOTTOM 42A
TOP
400
300
200
100
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
2.5
VG
Charge
Fig 13a. Basic Gate Charge Waveform
L
DUT
0
1K
VGS(th) Gate threshold Voltage (V)
10 V
ID = 250µA
ID = 150µA
ID = 50µA
2.0
1.5
1.0
0.5
VCC
0.0
-75 -50 -25
0
25
50
75
100 125 150 175
TJ , Temperature ( °C )
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage vs. Temperature
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IRLR/U3705ZPbF
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
0.05
0.10
10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
120
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 42A
100
80
60
40
20
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRLR/U3705ZPbF
D.U.T
Driver Gate Drive
+
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
*
RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRLR/U3705ZPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120
WIT H AS SEMBLY
LOT CODE 1234
AS SEMBLED ON WW 16, 2001
IN T HE ASS EMBLY LINE "A"
PART NUMBER
INT ERNAT IONAL
RECT IFIER
LOGO
Note: "P" in assembly line position
indicates "Lead-Free"
IRF R120
116A
12
34
ASS EMBLY
LOT CODE
DAT E CODE
YEAR 1 = 2001
WEEK 16
LINE A
"P" in assembly line position indicates
"Lead-Free" qualification to the consumer-level
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRF R120
12
ASS EMBLY
LOT CODE
34
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
P = DES IGNAT ES LEAD-FREE
PRODUCT QUALIFIED T O T HE
CONSUMER LEVEL (OPT IONAL)
YEAR 1 = 2001
WEEK 16
A = AS SEMBLY SIT E CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRLR/U3705ZPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE : T HIS IS AN IRF U120
WIT H ASS EMBLY
LOT CODE 5678
ASS EMBLED ON WW 19, 2001
IN T HE AS SEMBLY LINE "A"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRF U120
119A
56
78
ASS EMBLY
LOT CODE
Note: "P" in as s embly line pos ition
indicates Lead-Free"
DAT E CODE
YEAR 1 = 2001
WEE K 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBE R
IRFU120
56
ASS EMBLY
LOT CODE
78
DAT E CODE
P = DES IGNAT E S LEAD-F REE
PRODUCT (OPT IONAL)
YEAR 1 = 2001
WEE K 19
A = ASSEMBLY S ITE CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRLR/U3705ZPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.12mH
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
RG = 25Ω, IAS = 42A, VGS =10V. Part not
avalanche performance.
recommended for use above this value.
This value determined from sample failure population. 100%
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
tested to this value in production.
When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
Rθ is measured at TJ approximately 90°C
Repetitive rating; pulse width limited by
Data and specifications subject to change without notice.
This product has been designed for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.10/2010
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11