IRLZ34N Data Sheet (226 KB, EN)

PD - 94830
IRLZ34NPbF
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Logic-Level Gate Drive
Advanced Process Technology
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Lead-Free
HEXFET® Power MOSFET
D
VDSS = 55V
RDS(on) = 0.035Ω
G
ID = 30A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ‚
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
30
21
110
68
0.45
±16
110
16
6.8
5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Min.
Typ.
Max.
Units
––––
––––
––––
––––
0.50
––––
2.2
––––
62
°C/W
11/11/03
IRLZ34NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
–––
–––
–––
–––
1.0
11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.065
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
8.9
100
21
29
Max. Units
Conditions
–––
V
V GS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.035
V GS = 10V, ID = 16A „
0.046
Ω
V GS = 5.0V, ID = 16A „
0.060
V GS = 4.0V, ID = 14A „
2.0
V
V DS = V GS, ID = 250µA
–––
S
V DS = 25V, ID = 16A
25
V DS = 55V, VGS = 0V
µA
250
V DS = 44V, VGS = 0V, TJ = 150°C
100
V GS = 16V
nA
-100
V GS = -16V
25
ID = 16A
5.2
nC V DS = 44V
14
V GS = 5.0V, See Fig. 6 and 13 „
–––
V DD = 28V
–––
ID = 16A
ns
–––
RG = 6.5Ω, VGS = 5.0V
–––
RD = 1.8Ω, See Fig. 10 „
Between lead,
4.5 –––
6mm (0.25in.)
nH
from package
7.5 –––
and center of die contact
880 –––
V GS = 0V
220 –––
pF
V DS = 25V
94 –––
ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
IS
I SM
VSD
t rr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
MOSFET symbol
––– ––– 30
showing the
A
G
integral reverse
––– ––– 110
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 16A, VGS = 0V „
––– 76 110
ns
TJ = 25°C, IF = 16A
––– 190 290
nC
di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ VDD = 25V, starting TJ = 25°C, L = 610µH
RG = 25Ω, IAS = 16A. (See Figure 12)
ƒ ISD ≤ 16A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
D
S
IRLZ34NPbF
1000
1000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
2.5V
1
20µs PULSE WIDTH
T J = 25°C
0.1
0.1
1
10
100
10
2.5V
1
A
100
3.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
1
V DS = 25V
20µs PULSE WIDTH
3
4
5
6
7
8
9
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
10
A
100
Fig 2. Typical Output Characteristics
1000
2
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
0.1
20µs PULSE WIDTH
T J = 175°C
0.1
0.1
VDS , Drain-to-Source Voltage (V)
100
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
TOP
10
A
I D = 27A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRLZ34NPbF
1400
VGS , Gate-to-Source Voltage (V)
1200
C, Capacitance (pF)
15
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
Ciss C oss = C ds + C gd
1000
800
Coss
600
400
Crss
200
0
1
10
100
I D = 16A
V DS = 44V
V DS = 28V
12
9
6
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
VDS , Drain-to-Source Voltage (V)
8
12
16
20
24
28
32
A
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
4
100
TJ = 175°C
TJ = 25°C
10
100
10µs
100µs
10
1ms
VGS = 0V
1
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.0
TC = 25°C
TJ = 175°C
Single Pulse
1
1
10ms
10
A
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRLZ34NPbF
40
VDS
I D , Drain Current (A)
V GS
D.U.T.
RG
30
RD
+
-V DD
5.0V
20
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
10
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.01
0.00001
0.02
0.01
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
0.1
L
VDS
D.U.T.
RG
+
V
- DD
IAS
5.0 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
EAS , Single Pulse Avalanche Energy (mJ)
IRLZ34NPbF
250
TOP
BOTTOM
200
ID
6.6A
11A
16A
150
100
50
0
VDD = 25V
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
tp
VDD
VDS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
.2µF
12V
.3µF
5.0 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
A
175
IRLZ34NPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRLZ34NPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- EMITTER
3- SOURCE
4 - DRAIN
HEXFET
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
LOT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/