AND8172/D Understanding the Noise Issue Out of Inductor Based DC-DC Converter Prepared by: Michael Bairanzade ON Semiconductor http://onsemi.com APPLICATION NOTE Abstract NCP5007/NCP5005 Basic Analysis Portable applications, such as cellular phones and hand-held computers, have sensitive electronic functions, making any electromagnetic noise a real issue. Even a low power converter can generate noise during transients since the converters operate in the megahertz range. The high frequency switching can interact with the parasitic circuit elements to create uncontrolled noise. In addition, the associated voltage spikes might be difficult to filter out, a detailed analysis of the converter operation being necessary to properly design the system. Of course, the mechanical layout is a key parameter to minimize the EMI perturbation. The main purpose of this document is to clarify the source of such a noise, and assess the risk of system's EMI pollution. The NCP5007 device, together with a PWM based structure, will be used as vehicles to perform the associated engineering test in a real application, but the same may apply to other Boost converters, such as the NCP5005. The NCP5007/NCP5005 are dc-dc converters dedicated to the supply of High Efficiency White LEDs used as an LCD back light or photo flash light source. Generally speaking, with a typical 3.8 V Vf drop during normal operation, these LEDs are not capable to operate from a standard 3.6 V battery pack. A boost circuit must be provided to raise the voltage up to the bias called by such a diode. Moreover, these LEDs are commonly connected in series to get a constant current through the diodes, assuring smooth and consistent light across the LCD panel. The basic application, depicted in Figure 1, drives the back light of a standard LCD display, the command bit EN being provided by an external CPU or other digital controller. Vbat U1 Vbat GND 2 1 C1 5 4.7 mF L1 NCP5007 EN GND 22 mH 3 Pulse D1 GND Vout 4 FB MBR0530 C2 1.0 mF R1 D5 D4 D3 D2 GND GND 47 W LWT67C LWT67C LWT67C LWT67C Figure 1. Typical Back Light Application © Semiconductor Components Industries, LLC, 2008 February, 2008 - Rev. 1 1 Publication Order Number: AND8172/D AND8172/D With a 10 W sense resistor, the dc current through the LEDs is 20 mA with a "10% tolerance over the temperature range. The output voltage will be 19 V ( typical) and the 1.0 mF capacitor must be sized accordingly. Using ceramic type X5R is mandatory for both C1 and C2. The EN signal (Enable, pin 3 ) is useful to power ON/OFF the diodes, the chip providing a constant current to the LEDs when EN = Vbat. On the other hand, the EN signal can also be used to control the brightness of the back light by means of a PWM signal applied to pin 3. Basically, the chip operates with two cycles in a PFM mode: Cycle #1: the energy is stored into the inductor Cycle #2: the energy is dumped to the load Of course, from a practical standpoint, the inductor must be sized to cope with the peak current present in the circuit to avoid saturation of the core. On top of that, the ferrite material shall be capable to operate at high frequency (>1.0 MHz) to minimize the Foucault's losses developed during the cycles. The waveforms captured on the NCP5007 Demo Board, V3.10, show two voltage spikes VSPK#1 and VSPK#2 across the output voltage (Figure 2). The VSPK#1 signal is synchronized with the positive going slope of the output voltage, the VSPK#2 signal being synchronized with the negative slope of the same voltage. Both of these signals come on top of the voltage ripple. Generally speaking, such spikes will be named “noise'', but we do not know what is the energy content and what could be the influence of the electrical environment. At this point, let us consider the switching operation only since there are no spikes outside the transients as demonstrated by the waveforms. Figure 2. NCP5007 Normal Operation http://onsemi.com 2 AND8172/D The silicon chip is connected to the external world by means of bonding wires attached to the internal pads. The bonding wires have finite inductance and stray capacitance. In addition, the internal overvoltage protection circuits and PCB trace leads contribute to such parasitic elements. The simplified PSPICE model (Figure 3), includes the parasitic inductances associated with the NCP5007 internal L1 1 bonding, and the stray capacitance between the output pin and ground. The load is built with the White LED LWT67C model (courtesy: OSRAM GmbH) with a 1.0 mF reservoir capacitor in parallel. The inductor includes the ESR and stray capacitance developed by the wiring. The ESR of the printed circuit tracks and wiring is neglected as it is not a first order importance, unless the layout is really poor. R1 2 22 mH 1.2 R C4 Stray Capacitance Schottky Stray Capacitance C1 5 pF 140 pF V1 + 3.6 V - NCP5007 Chip L2 1 D4 2 10 nH Cdg 3 NMOS 2 Cgs Pad M1 1 MBR030 D1 LW_5413-TYP Cds C3 15 pF C2 1 mF 2 D2 LW_5413-TYP D3 LW_5413-TYP L3 10 nH Pad Parasitic Inductance Stray Capacitance Figure 3. PSPICE Output Circuit Model http://onsemi.com 3 AND8172/D SPIKE VSPK#1 The period T is derived from: Assuming the system operates in steady state, let us consider the noise VSPK#1. The current flowing into the NMOS is abruptly switched off and the voltage rises (according to the Lenz's law) until the Schottky diode is forward biased. The inductor current will be diverted to the load when the output voltage will be higher than Vout + Vf. During the positive going of the output voltage slope, the stray capacitances and the parasitic inductances create an LC network, yielding an oscillation as the NMOS device is switched off. According to the MBR0530 data sheet, the intrinsic stray capacitance varies from 170 pF (when Vr = 0 V) to 40 pF when Vr = 12 V. Let us consider Vr = 10 V since Vout = S Vf*LED, then: F+ 1 2 * P * ǸLC F+ 1 + 178MHz 2 * P * Ǹ20 * 10-9 * 40 * 10-12 1 T+1+ + 5.6ns. F 178 * 106 (eq. 2) This value is well within the signal given Figure 4, captured during the test performed with the NCP5007 demo board. Of course, the frequency varies along the output voltage slope since all the semiconductor based capacitance varies as the voltage varies across the junctions. Beside the voltage effect, one must consider the level of energy radiated by such a spike. In this application, the energy is transferred from the parasitic inductance to the stray capacitance, as depicted by the waveforms (oscillations). Consequently, we can calculate the amount of energy stored into the parasitic inductor: Ej + 1 * L * I2 2 (eq. 1) (eq. 3) Ej + 1 * 20 * 10-9 * 0.062 + 36pJ 2 Such level of energy is extremely low and will not pollute the environment. Note: The dI/dt of the NCP5007 internal NMOS is 10 mA/ns, a very fast transient. Figure 4. NCP5007 Output Voltage Noise at NMOS Turn Off http://onsemi.com 4 AND8172/D SPIKE VSPK#2 This energy is partially dissipated into the ohmic resistance, partially into the RDS(on) of the internal NMOS device (1.7 W typical for the NCP5007), yielding a 1000 mVpp spike as depicted in Figure 5. Although visible, a 5.7 nJ amount of energy is likely too low to pollute the environment of the power device. Moreover, the energy is not radiated by an external inductance element, but is limited to the parasitic structures only, thus less prone to trouble the rest of the application. The spike is developed during the negative going slope of the output voltage, when the current transfer to the load is completed and the NMOS switch turns on (Figure 5). At this point, the voltage across the Schottky diode reverses and the same parasitic structures are activated, yielding the oscillation depicted by the top trace (Figure 5). The energy is now transferred from the charged stray capacitance to the parasitic inductor, yielding the oscillations. Assuming the total stray capacitance is 80 pF (NCP5007 pad, PCB, Schottky), we get: Ej + 1 * C * V2 2 (V + sumofthewhiteLEDVf) (C + totalstraycapacitance, firstorderonly) Ej + 1 * 80 * 10-12 * 122 + 5.7nJ (eq. 4) 2 Figure 5. NCP5007 Output Voltage Noise at NMOS Turn On http://onsemi.com 5 AND8172/D Discontinuous Mode of Operation Analysis diode as a minimum parasitic capacitance since the reverse voltage is maximum), the frequency is 6.2 MHz, yielding a 161 ns period. The calculated values are well within the evaluation tests carried out with a PWM based white LED driver used as a reference (Figure 6, top trace). At this point, one can derive the level of energy radiated during this period: When a chip operates in a fully discontinuous mode, a large peak current takes place in the inductor as depicted in Figure 6. The PWM mode is prone to such a discontinuous cycle. The output voltage is largely different, in comparison with the NCP5007, as one expects from a discontinuous mode of operation. The main consequence is the large oscillations developed when the transfer of the current between the inductor and the load is completed. Of course, internal circuit can be implemented to avoid such oscillation (so-called ring killer), but all ICs might not have such features. The oscillations are no longer the only consequence of the Schottky diode, but come from the main inductor (22 mH) associated with the stray capacitances. Assuming we have a 30 pF stray capacitance (the Schottky Ej + 1 * L * I2 (I = level of the current during the oscillation 2 first order only) 1 Ej + * 22 * 10-6 * 0.042 + 4.4nJ (eq. 5) 2 Although such a level is low, is it generated by the main inductor and this element is prone to radiate most of this energy out of the core, unless a shielding magnetic core is used. Figure 6. Typical PWM Normal Operation http://onsemi.com 6 AND8172/D 1.7 W, compared to 0.5 W for the PWM chip. The consequence is twofold: 1. With a lower RDS(on), the PWM based chip has probably larger Cdg, Cgs and Cds capacitances, thus slower dI/dt. Consequently, slower dI/dt minimizes the effect of the parasitic inductance. 2. Similarly, lower RDS(on) generates lower voltage spike for the same amount of energy transferred from the stray capacitance. A detailed view of the PWM based chip output voltage shows a non-negligible spike when the inductor current hits the maximum peak value (Figure 7). Basically, this is the same mechanism as the one depicted for the NCP5007 application, and a similar voltage spike is developed with 800 mVpp amplitude. Leaving aside the structure, the main difference between the PWM mode and the NCP5007 from a power device standpoint, is the RDS(on) of the internal NMOS. We have Figure 7. PWM Chip Output Voltage Noise as the NMOS is Switched Off http://onsemi.com 7 AND8172/D SPECTRUM ANALYSIS It is clear that, although the apparent voltage spikes are higher for the NCP5007, the net result, in terms of real noise, is much better for the NCP5007 in comparison with the PWM circuit as depicted by the records. In order to better analyze the spikes coming from the chips, the noise return to battery has been measured and recorded (Figure 10). The spectral density, mathematical integration of the two curves, yields 0.826 mVrms for the NCP5007, and 238 mVrms for the PWM based chip, both over the 100 kHz to 30 MHz bandwidth. Once again, the behavior of the NCP5007 is far better than the PWM based white LED driver, particularly in the 100 kHz to 1.0 MHz frequency band. The waveforms captured by an oscilloscope are very useful to evaluate the behavior of a given product, but they don't give information about the EMI performance. At this point, a spectrum analyzer is necessary to characterize the device over the considered bandwidth. The spectrum analysis has been performed with the same demo board, the antenna being located 10 mm above the inductor. Although the tests have not been performed in a shielded cage, the results provide a good understanding of the situation in terms of EMI. The waveforms are provided in Figures 8 and 9. Figure 8. NCP5007 Spectrum Analysis (Unit: dB mV): Relative EMI http://onsemi.com 8 AND8172/D Figure 9. PWM Circuit Spectrum Analysis http://onsemi.com 9 AND8172/D Figure 10. Reflected Noise to Battery CONCLUSION Figures 8 and 9, demonstrates the excellent EMI behavior of the NCP5007 with much lower noise, in comparison with the PWM based white LED driver operation. The same comment applies for the reflected noise to battery. The waveforms are very useful to fully characterize the system, but it is of prime importance to identify and quantify the risks, in terms of noise and reliability, of the voltage spikes when a detailed analysis is requested. Since it is not possible to reduce the parasitic inductance to zero (using the micro bump technique could improve but not reduce the inductance to zero nH), and since fast dI/dt is necessary to lower the switching losses into the chip, spikes voltage might exist. However, it is mandatory to consider the behavior of the power device in the real environment, keeping into account all the parasitic effects. The spectrum analysis, provided in http://onsemi.com 10 AND8172/D PSPICE SIMULATIONS Using a lower RDS(on) yields the expected lower spike and a low stray capacitance diode provides a much lower noise during the transients, as expected. The circuit has been simulated prior to run the analysis in the laboratory. The same schematic (Figure 11) has been used to evaluate the configurations. Vbat 2 Vbat L1 22 mH + 3.6 V 1 - C1 5 pF R1 1.5 R 1 L5 1 nH D1 R2 2 0.1 R MBR030 2 2 L2 10 nH L4 20 nH 1 1 2 3 M1 NMOS IC = 0 V 1 mF C4 C5 20 pF D6 LW_5413-TYP 1 V1 = 0 V V2 = 5.0 V TD = 10 ns TR = 10 ns TF = 10 ns PW = 1.0 ms PER = 3.0 ms + - D7 LW_5413-TYP V2 2 D5 LW_5413-TYP L3 10 nH 1 Figure 11. PSPICE Schematic Diagram http://onsemi.com 11 AND8172/D The parasitic elements are based on the existing package and silicon designs. The value of the stray capacitance ( C5) depends, besides the internal structure, upon the PCB layout. Test Conditions 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. Temperature Oscilloscope Voltage Probes Current Probe Input Power Supply Input Power Supply Bias Output Load Output DC Current Inductor Spectrum Analyzer Spectrum Analyzer EMI probe HF probe :Room, +20°C :Tektronix, TDA754/D, operating in the DPO mode :Tektronix P6139A :Tektronix TCP202 :Tektronix PS2520G :3.60 V :3 White LED :NCP5007 = 10 mA, PWM based chip = 18 mA (Rsense = 22 W) :22 mH :ROHDE & SCHWARZ, FSIQ 7 :HP4195A :HP11941A :HP41800A ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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