NCP5007 Compact Backlight LED Boost Driver The NCP5007 is a high efficiency boost converter operating in a current control loop, based on a PFM mode, to drive White LEDs. The current mode regulation allows a uniform brightness of the LEDs. The chip has been optimized for small ceramic capacitors and is capable of supplying up to 1.0 W output power. http://onsemi.com Features • • • • • • • • • • • • Inductor Based Converter brings High Efficiency Constant Output Current Regulation 2.7 to 5.5 V Input Voltage Range Vout to 22 V Output Compliance Allows up to 5 LEDs to be Driven in Series which Provides Automatic LED Current Matching Built−in Output Overvoltage Protection 0.3 A Standby Quiescent Current Includes Dimming Function (PWM) Enable Function Driven Directly from Low Battery Voltage Source Thermal Shutdown Protection All Pins are Fully ESD Protected Low EMI Radiation Lead−Free Package Typical Applications • LED Display Back Light Control • High Efficiency Step Up Converter MARKING DIAGRAM 5 TSOP−5 (SOT23−5, SCR59−5) DCLYW SN SUFFIX 1 CASE 483 5 1 DCL = Device Code Y = Year W = Work Week PIN CONNECTIONS FB 1 GND 2 EN 3 5 Vbat 4 Vout (Top View) Vbat Vbat U1 3 Vbat EN ORDERING INFORMATION C1 5 4.7 F GND L1 22 H GND 2 1 Vout GND MBR0530 D5 D4 Shipping TSOP−5 3000 Tape & Reel D1 4 FB D6 Package *G suffix indicates a Pb−free. C2 1.0 F NCP5007 R1 Device NCP5007SNT1G* D3 D2 GND GND 5.6 Figure 1. Typical Application Semiconductor Components Industries, LLC, 2003 September, 2003 − Rev. 1 1 Publication Order Number: NCP5007/D NCP5007 Thermal Shutdown Current Sense Vbat Vsense EN 5 Vbat 4 Vout 2 GND 3 100 k CONTROLLER Q1 GND FB 1 300 k − + GND +200 mV Band Gap Figure 2. Block Diagram http://onsemi.com 2 NCP5007 PIN FUNCTION DESCRIPTION Pin Symbol Type Description 1 FB ANALOG INPUT This pin provides the output current range adjustment by means of a sense resistor connected to the analog control or with a PWM control. The dimming function can be achieved by applying a PWM voltage technique to this pin (see Figure 29). The current output tolerance depends upon the accuracy of this resistor. Using a 5% metal film resistor, or better, yields good output current accuracy. Note: A built−in comparator switches OFF the DC/DC converter if the voltage sensed across this pin and ground is higher than 700 mV typical. 2 GND POWER This pin is the system ground for the NCP5007 and carries both the power and the analog signals. High quality ground must be provided to avoid spikes and/or uncontrolled operation. Care must be observed to avoid high−density current flow in a limited PCB copper track so a robust ground plane connection is recommended. 3 EN DIGITAL INPUT This is an Active−High logic input which enables the boost converter. The built−in pulldown resistor disables the device when the EN pin is left open. Note the logic switching level of this input has been optimized to allow it to be driven from standard or 1.8 V CMOS logic levels. The LED brightness can be controlled by applying a pulse width modulated signal to the enable pin (see Figure 30). 4 Vout POWER This pin is the power side of the external inductor and must be connected to the external Schottky diode. It provides the output current to the load. Since the boost converter operates in a current loop mode, the output voltage can range up to +22 V but shall not exceed this limit. However, if the voltage on this pin is higher than the OVP threshold (Over Voltage Protection) the device enters a shutdown mode. To restart the chip, one must either apply a low to high logic signal to the EN pin, or switch off the Vbat supply. A capacitor must be used on Vout to avoid false triggering of the OVP (Overvoltage Protect) circuit. This capacitor filters the noise created by the fast switching transients. In order to limit the inrush current and still have acceptable start up time the capacitor value should range between 1.0 F and 8.2 F max. To achieve high efficiency this capacitor should be ceramic (ESR 100 m). Care must be observed to avoid EMI through the PCB copper tracks connected to this pin. 5 Vbat POWER The external voltage supply is connected to this pin. A high quality reservoir capacitor must be connected across pin 5 and Ground to achieve the specified output voltage parameters. A 4.7 F/6.3 V, low ESR capacitor must be connected as close as possible across pin 5 and ground pin 2. The X5R or X7R ceramic MURATA types are recommended. The return side of the external inductor shall be connected to this pin. Typical application will use a 22 H, size 1210, to handle the 10 to 100 mA output current range. When the desired output current is above 20 mA, the inductor shall have an ESR 1.5 to achieve good efficiency over the Vbat range. The output current tolerance can be improved by using a larger inductor value. http://onsemi.com 3 NCP5007 MAXIMUM RATINGS Symbol Value Unit Power Supply Rating Vbat 6.0 V Output Power Supply Voltage Compliance Vout 28 V Digital Input Voltage Digital Input Current EN −0.3 Vin Vbat +0.3 1.0 V mA 2.0 200 kV V PD RJA 160 250 mW °C/W Operating Ambient Temperature Range TA −25 to +85 °C Operating Junction Temperature Range TJ −25 to +125 °C TJmax +150 °C Tstg −65 to +150 °C ESD Capability (Note 2) Human Body Model (HBM) Machine Model (MM) VESD TSOP5 Package Power Dissipation @ TA = +85°C (Note 3) Thermal Resistance, Junction−to−Air Maximum Junction Temperature Storage Temperature Range 1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum−rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 2. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) 2.0 kV per JEDEC standard: JESD22−A114 Machine Model (MM) 200 V per JEDEC standard: JESD22−A115 3. The maximum package power dissipation limit must not be exceeded. 4. Latch−up current maximum rating: 100 mA per JEDEC standard: JESD78. 5. Moisture Sensivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A. POWER SUPPLY SECTION (Typical values are referenced to Ta = +25°C, Min & Max values are referenced −25°C to +85°C ambient temperature, unless otherwise noted.) Pin Symbol Min Typ Max Unit Power Supply 4 Vbat 2.7 − 5.5 V Output Load Voltage Compliance 5 Vout 22 24.5 − V Continuous DC Current in the Load @ Vout = 3 LED, L = 22 H, ESR < 1.5 , Vbat = 3.6 V 5 Iout 50 − − mA Standby Current @ Iout = 0 mA, EN = L, Vbat = 3.6 V 4 Istdb − 0.45 − A Standby Current @ Iout = 0 mA, EN = L, Vbat = 5.5 V 4 Istdb − 1.0 3.0 A Inductor Discharging Time @ Vbat = 3.6 V, L = 22 H, 3 LED, Iout = 10 mA 4 Toffmax − 320 − ns Thermal Shutdown Protection − TSD − 160 − °C Thermal Shutdown Protection Hysteresis − TSDH − 30 − °C Rating http://onsemi.com 4 NCP5007 ANALOG SECTION (Typical values are referenced to Ta = +25°C, Min & Max values are referenced −25°C to +85°C ambient temperature, unless otherwise noted.) Rating Pin Symbol Min Typ Max Unit High Level Input Voltage Low Level Input Voltage 1 EN 1.3 − − − − 0.4 V EN Pull Down Resistor 1 REN − 100 − k Feedback Voltage Threshold 4 FB 170 200 230 mV Output Current Stabilizes @ 5% time delay following a DC/DC start−up @ Vbat = 3.6 V, L = 22 H, Iout = 20 mA 5 Ioutdly − 100 − s Internal Switch ON Resistor @ Tamb = +25°C 5 QRDSON − 1.7 − 6. The overall tolerance depends upon the accuracy of the external resistor. THEORY OF OPERATION The DC/DC converter is designed to supply a constant current to the external load, the circuit being powered from a standard battery supply. Since the regulation is made by means of a current loop, the output voltage will vary depending upon the dynamic impedance presented by the load. Considering a high intensity LED, the output voltage can range from a low of 6.4 V (two LED in series biased with a low current), up to 22 V, the maximum the chip can sustain continuously. The basic DC/DC structure is depicted in Figure 3. With a 22 V operating voltage capability, the power device Q1 can accommodate a high voltage source without any leakage current degradation. Vbat L1 22 H Vdsense POR 4 D1 Vds GND C2 RESET LOGIC CONTROL Vdsense GND + − D4 ZERO_CROSSING D5 1.0 F TIME_OUT D3 D2 Q1 R1 − V(Ipeak) 1 + R2 xR C2 Vref GND Figure 3. Basic DC/DC Converter Structure http://onsemi.com 5 GND Vs NCP5007 flip−flop resets, the NMOS is deactivated and the current is dumped into the load. Since the timing is application dependent, the internal timer limits the Toff cycle to 320 ns (typical), making sure the system operates in a continuous mode to maximize the energy transfer. Basically, the chip operates with two cycles: Cycle #1 : time t1, the energy is stored into the inductor Cycle #2 : time t2, the energy is dumped to the load The POR signal sets the flip−flop and the first cycle takes place. When the current hits the peak value, defined by the error amplifier associated with the loop regulation, the First Start−Up Normal Operation Ipeak IL Iv t1 0 mA t2 t Ids 0 mA t Io 0 mA t Figure 4. Basic DC/DC Operation Based on the data sheet, the current flowing into the inductor is bounded by two limits: • Ipeak Value: Internally fixed to 350 mA typical • Iv Value: Limited by the fixed Toff time built in the chip (320 ns typical) The system operates in a continuous mode as depicted in Figure 4 and t1 & t2 times can be derived from basic equations. (Note: The equations are for theoretical analysis only, they do not include the losses.) Of course, from a practical stand point, the inductor must be sized to cope with the peak current present in the circuit to avoid saturation of the core. On top of that, the ferrite material shall be capable to operate at high frequency (1.0 MHz) to minimize the Foucault’s losses developed during the cycles. The operating frequency can be derived from the electrical parameters. Let V = Vo − Vbat, rearranging Equation 1: E L * di dt ton dI * L E (eq. 1) Since toff is nearly constant (according to the 320 ns typical time), the dI is constant for a given load and inductance value. Rearranging Equation 5 yields: Let E = Vbat, then: t1 (Ip Iv) * L Vbat (Ip Iv) * L t2 Vo Vbat (eq. 2) ton (eq. 3) ton t2 * (Vo Vbat) I L 320e 9 * (22 3.0) 276 mA 22e 6 V*dt L *L E (eq. 6) Let E = Vbat, and Vopk = output peak voltage, then: Since t2 = 320 ns typical and Vo = 22 V maximum, then (assuming a typical Vbat = 3.0 V): Imax (eq. 5) (Vopk Vbat) * dt Vbat (eq. 7) Finally, the operating frequency is: (eq. 4) F 1 ton toff (eq. 8) The output power supplied by the NCP5007 is limited to one watt: Figure 5 shows the maximum power that can be delivered by the chip as a function of the input voltage. http://onsemi.com 6 NCP5007 400 1200 3 LED 1000 350 2 LED Ipeak (mA) 4 LED 5 LED 300 250 400 200 200 Pout = f(Vbat) @ Rsense = 2.0 0 150 2 3 4 5 2 6 3 4 Vbat (V) 5 6 Vbat (V) Test conditions: 5 LEDs in series, steady state operation Figure 5. Maximum Output Power as a Function of the Battery Supply Voltage Figure 6. Typical Inductor Peak Current as a Function of Vbat Voltage 120 2 LED 100 3 LED 80 Iout (mA) Pout (mW) 800 600 L = 22µH Rsense = 10 TA = +25°C 4 LED 60 5 LED 40 20 0 2.5 3.0 3.5 4.0 Vbat (V) 4.5 5.0 5.5 Test conditions: L = 22 H, Rsense = 2.0 , Tamb = +25°C Figure 7. Maximum Output Current as a Function of Vbat http://onsemi.com 7 NCP5007 Output Current Range Set−Up The current regulation is achieved by means of an external sense resistor connected in series with the LED string. Vbat L1 22 H FB 1 D1 Load Vout 4 Q1 CONTROLLER GND R1 x GND Figure 8. Output Current Feedback The current flowing through the LED creates a voltage drop across the sense resistor R1. The voltage drop is constantly monitored internally, and maximum peak current allowed in the inductor is set accordingly in order to keep constant this voltage drop (and thus the current flowing through the LED). For example, should one need a 10 mA output current, the sense resistor should be sized according to the following equation: R1 Feedback Threshold 200 mV 20 Iout 10 mA A standard 5% tolerance resistor, 22 SMD device, yields 9.09 mA, good enough to fulfill the back light demand. The typical application schematic diagram is provided in Figure 9. Vbat U1 3 Pulse EN Vbat C1 5 4.7 F L1 22 H GND 2 1 Vout GND MBR0530 NCP5007 D6 22 LED D5 D4 GND D1 4 FB R1 (eq. 9) D3 C2 1.0 F D2 GND GND LED LED LED Figure 9. Basic Schematic Diagram http://onsemi.com 8 LED NCP5007 Output Load Drive The Schottky diode D1, associated with capacitor C2 (see Figure 9), provides a rectification and filtering function. When a pulse−operating mode is required: • A PWM mode control can be used to adjust the output current range by means of a resistor and a capacitor connected across FB pin. On the other hand, the Schottky diode can be removed and replaced by at least one LED diode, keeping in mind such LED shall sustain the large pulsed peak current during the operation. In order to take advantage of the built−in Boost capabilities, one shall operate the NCP5007 in the continuous output current mode. Such a mode is achieved by using and external reservoir capacitor (see Table 1) across the LED. At this point, the peak current flowing into the LED diodes shall be within the maximum ratings specified for these devices. Of course, pulsed operation can be achieved, thanks to the EN signal pin 3, to force high current into the LED when necessary. TYPICAL OPERATING CHARACTERISTICS 100 100 4 LED/4 mA 90 80 5 LED/4 mA EFFICIENCY (%) EFFICIENCY (%) 80 70 4 LED/10 mA 90 3 LED/4 mA 2 LED/4 mA 60 50 40 30 70 40 30 20 10 3.50 4.00 4.50 5.00 0 2.50 5.50 3.00 3.50 Vbat (V) 90 80 80 5 LED/15 mA EFFICIENCY (%) EFFICIENCY (%) 100 90 60 2 LED/15 mA 4 LED/15 mA 50 40 30 70 60 10 4.00 4.50 5.00 3 LED/20 mA 4 LED/20 mA 0 2.50 5.50 5 LED/20 mA 2 LED/20 mA 30 20 3.50 5.50 40 10 3.00 5.00 50 20 0 2.50 4.50 Figure 11. Overall Efficiency vs. Power Supply − Iout = 10 mA, L = 22 H 3 LED/15 mA 70 4.00 Vbat (V) Figure 10. Overall Efficiency vs. Power Supply − Iout = 4.0 mA, L = 22 H 100 3 LED/10 mA 50 10 3.00 5 LED/10 mA 60 20 0 2.50 2 LED/10 mA 3.00 3.50 4.00 4.50 5.00 5.50 Vbat (V) Vbat (V) Figure 12. Overall Efficiency vs. Power Supply − Iout = 15 mA, L = 22 H Figure 13. Overall Efficiency vs. Power Supply − Iout = 20 mA, L = 22 H http://onsemi.com 9 NCP5007 TYPICAL OPERATING CHARACTERISTICS (All curve conditions: L = 22 H, Cin = 4.7 F, Cout = 1.0 F, Typical curve @ Ta = +25°C) 100 30 2 LED/40 mA 90 25 70 5 LED/40 mA 4 LED/40 mA 60 IOUT = 20 mA Nom 20 IOUT (mA) EFFICIENCY (%) 80 3 LED/40 mA 50 40 15 10 30 20 IOUT = 10 mA Nom L = 22 H TA = 25°C 5 10 0 2.50 3.00 3.50 4.00 Vbat (V) 4.50 5.00 0 2.5 5.50 3.0 3.5 4.0 4.5 Figure 14. Overall Efficiency vs. Power Supply − Iout = 40 mA, L = 22 H 25 IOUT = 20 mA Nom IOUT = 20 mA Nom 20 IOUT (mA) 20 IOUT (mA) 5.5 Figure 15. Current Variation vs. Power Supply with 3 Series LED’s 25 15 10 15 10 IOUT = 10 mA Nom IOUT = 10 mA Nom 5 5 L = 22 H TA = 25°C 0 2.5 3.0 3.5 4.0 4.5 0 2.5 5.5 5.0 L = 22 H TA = 25°C 3.5 3.0 VBAT (V) 4.5 5.0 5.5 Figure 17. Current Variation vs. Power Supply with 5 Series LED’s 205 5 204 FEEDBACK VARIATION (%) 4 203 202 Vbat = 3.1 V thru 5.5 V 201 200 199 198 197 196 195 −40 4.0 VBAT (V) Figure 16. Current Variation vs. Power Supply with 4 Series LED’s FEEDBACK VOLTAGE (mV) 5.0 VBAT (V) 3 2 1 Vbat = 3.1V thru 5.5V 0 −1 −2 −3 −4 −20 0 20 40 60 80 −5 −40 100 −20 0 20 40 60 80 TEMPERATURE (°C) TEMPERATURE (°C) Figure 18. Feedback Voltage Stability Figure 19. Feedback Voltage Variation http://onsemi.com 10 100 NCP5007 TYPICAL OPERATING CHARACTERISTICS (All curve conditions: L = 22 H, Cin = 4.7 F, Cout = 1.0 F, Typical curve @ Ta = +25°C) 2.5 1.4 −40°C thru 125°C 1.2 2 LED 2.0 F (mHz) 0.8 0.6 1.5 3 LED 4 LED 1.0 0.4 5 LED 0.5 0.2 0.0 2.7 3.3 3.9 4.5 5.1 0 2.5 5.5 3.0 3.5 4.0 4.5 5.0 Vbat, BATTERY VOLTAGE (V) Vbat (V) Figure 20. Standby Current Figure 21. Typical Operating Frequency 26 OVER VOLTAGE PROTECTION (V) IStby (µA) 1.0 25 Vbat = 3.6V Vbat = 2.7V Vbat = 5.5V 24 23 22 −40 −20 0 20 40 60 80 100 TEMPERATURE(°C) Figure 22. Overvoltage Protection http://onsemi.com 11 120 130 5.5 NCP5007 TYPICAL OPERATING WAVEFORMS Vout Inductor Current Conditions: Vbat = 3.6 V, Lout = 22 H, 5 LED, Iout = 15 mA Figure 23. Typical Power Up Response Vout Inductor Current Conditions: Vbat = 3.6 V, Lout = 22 H, 5 LED, Iout = 15 mA Figure 24. Typical Start Up Inductor Current and Output Voltage http://onsemi.com 12 NCP5007 TYPICAL OPERATING WAVEFORMS Inductor Current Conditions: Vbat = 3.6 V, Lout = 22 H, 5 LED, Iout = 15 mA Figure 25. Typical Inductor Current Vout Ripple 50 mV/div Inductor Current Conditions: Vbat = 3.6 V, Lout = 22 H, 5 LED, Iout = 15 mA Figure 26. Typical Output Voltage Ripple http://onsemi.com 13 NCP5007 TYPICAL OPERATING WAVEFORMS Output Voltage Inductor Current Test Conditions: L = 22 H, Iout = 15 mA, Vbat = 3.6 V, Ambient Temperature, LED = 5 Figure 27. Typical Output Peak Voltage http://onsemi.com 14 NCP5007 TYPICAL APPLICATIONS CIRCUITS Standard Feedback The standard feedback provides constant current to the LEDs, independently of the Vbat supply and number of LEDs in series. Figure 28 depicts a typical application to supply 13 mA to the load. Vbat Vbat U1 3 C1 EN Vbat 5 4.7 F L1 22 H GND 2 1 GND GND D1 Vout 4 FB MBR0530 NCP5007 C2 1.0 F R1 D6 D5 D4 D3 D2 15 LED LED LED LED LED GND GND Figure 28. Basic DC Current Mode Operation with Analog Feedback PWM Operation Although the pulsed mode will provide a good dimming function, it will yield high switching transients which are difficult to filter out in the control loop. As such this first approach is not recommended. The output current depends upon the duty cycle of the signal presented to the node pin 1: this is very similar to the digital control shown in Figure 30. The average mode yields a noise−free operation since the converter operates continuously, together with a very good dimming function. The cost is an extra resistor and one extra capacitor, both being low cost parts. The analog feedback pin 1 provides a way to dim the LED by means of an external PWM signal as depicted in Figure 29. Taking advantage of the high internal impedance presented by the FB pin, one can set up a simple R/C network to accommodate such a dimming function. Two modes of operation can be considered: • Pulsed mode, with no filtering • Averaged mode with filtering capacitor http://onsemi.com 15 NCP5007 Vbat Vbat U1 3 C1 EN 5 Vbat 4.7 F L1 22 H Average Network 2 GND R2 R3 150 k 10 k 1 PWM GND D1 Vout 4 FB MBR0530 NCP5007 C3 100 nF GND C2 1.0 F R4 5.6 k GND GND R1 D6 D5 D4 D3 D2 10 LED LED LED LED LED GND Sense Resistor NOTE: RC filter R2 and C3 is optional (see text) Figure 29. Basic DC Current Mode Operation with PWM Control compromise. The time constant can now be calculated based on a 400 mV offset voltage at the C3/R2/R3 node to force zero current to the LED. Assuming the PWM signal comes from a standard gate powered by a 3.0 V supply, running at 5.0 kHz, then full dimming of the LED can be achieved with a 95% span of the Duty Cycle signal. To implement such a function, lets consider the feedback input as an operational amplifier with a high impedance input (reference schematic Figure 29). The analog loop will keep going to balance the current flowing through the sense resistor R1 until the feedback voltage is 200 mV. An extra resistor (R4) isolates the FB node from low resistance to ground, making possible to add an external voltage to this pin. The time constant R2/C3 generates the voltage across C3, added to the node pin 1, while R2/R3/R4/R1/C3 create the discharge time constant. In order to minimize the pick up noise at FB node, the resistors shall have relative medium value, preferably well below 1.0 M. Consequently, let R2 = 150 k, R3 = 10 k and R4 = 5.6 k. In addition, the feedback delay to control the luminosity of the LED shall be acceptable by the user, 10 ms or less being a good Digital Control An alternative method of controlling the luminosity of the LEDs is to apply a PWM signal to the EN pin (see Figure 30). The output current depends upon the Duty Cycle, but care must be observed as the DC/DC converter is continuously pulsed ON/OFF and noise is likely to be generated. Vbat U1 3 Pulse EN Vbat C1 5 4.7 F L1 22 H GND 2 1 GND GND D1 Vout 4 FB MBR0530 NCP5007 R1 GND D6 C2 1.0 F D5 D4 D3 D2 GND 5.6 NOTE: Pulse width and frequency depends upon the application constraints. Figure 30. Typical Semi−Pulsed Mode of Operation http://onsemi.com 16 NCP5007 Typical LEDs Load Mapping Since the output power is battery limited (see Figure 5), one can arrange the LEDs in a variety of different configurations. Powering ten LEDs can be achieved by a series/parallel combination as depicted in Figure 31. 50 mA 75 mA D1 LED D5 LED D2 LED D6 LED D3 LED D7 LED D4 LED D8 LED 7.0 V (Typ.) Load 14 V (Typ.) Load D1 LED D3 LED D5 LED D7 LED D9 LED D2 LED D4 LED D6 LED D8 LED D10 LED Sense Resistor R1 2.7 GND 60 mA R1 3.9 Load 10.5 V (Typ.) Sense Resistor GND Test conditions: Vbat = 3.6 V Lout = 22 H Cout = 1.0 F D1 LED D4 LED D7 LED D10 LED D13 LED D2 LED D5 LED D8 LED D11 LED D14 LED D3 LED D6 LED D9 LED D12 LED D15 LED Sense Resistor R1 3.3 GND Figure 31. Examples of Possible LED Arrangements http://onsemi.com 17 NCP5007 ON Semiconductor provides a demo board to evaluate the performance of the NCP5007. The schematic for that demo board is illustrated in Figure 32. TP3 Vbat Vbat C1 Vbat 4.7 F/10 V S2 3 2 1 SELECT GND GND S1 3 3 2 1 MANUAL EN R3 Vbat 5 10 k 2 GND S3 D1 Vout 3 2 1 R2 10 k TP1 Vout L1 22 H GND BRIGHTNESS JP1 ISense U1 R5 1 4 MBR0530 FB C3 0R NCP5007 MODULATION J3 GND Jumper = 0 R1 TP2 FB 150 k GND J2 Vbat 2 1 Z1 GND PWR J1 1 2 R4 5.6 k C2 100 nF Vbat R10 D6 D5 D4 D3 D2 10 R LED LED LED LED LED GND Figure 32. NCP5007 Demo Board Schematic Diagram http://onsemi.com 18 NCP5007 Table 1. Recommended External Parts Part Manufacturer Description Part Number 30 V Low Vf Schottky Diode ON Semiconductor SOD−123 (1.6 x 3.2 mm) MBR0530T1 20 V Low Vf Schottky Diode ON Semiconductor SOD−323 (1.25 x 2.5 mm) NSR0320MW2T1 20 V Low Vf Schottky Diode ON Semiconductor SOD−563 (1.6 x 1.6 mm) NSR0320XV6T1 Ceramic Cap. 1.0 F/16 V MURATA GRM42−X7R GRM42−6X7R−105K16 Ceramic Cap. 4.7 F/6.3 V MURATA GRM40−X5R GRM40−X5R−475K6.3 Inductor 22 H CoilCraft 1008PS−Shielded 1008PS−223MC Inductor 22 H CoilCraft Power Wafer LPQ4812−223KXC Figure 33. NCP5007 Demo Board PCB: Top Layer Figure 34. NCP5007 Demo Board Top Silkscreen http://onsemi.com 19 NCP5007 FIGURES INDEX Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 23: Figure 24: Figure 25: Figure 26: Figure 27: Figure 28: Figure 29: Figure 30: Figure 31: Figure 32: Figure 33: Figure 34: Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Basic DC/DC Converter Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Basic DC/DC Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Maximum Output Power as a Function of the Battery Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Typical Inductor Peak Current as a Function of Vbat Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Maximum Output Current as a Function of Vbat . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Output Current Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Basic Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Overall Efficiency vs. Power Supply − Iout = 4.0 mA, L = 22 H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Overall Efficiency vs. Power Supply − Iout = 10 mA, L = 22 H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Overall Efficiency vs. Power Supply − Iout = 15 mA, L = 22 H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Overall Efficiency vs. Power Supply − Iout = 20 mA, L = 22 H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Overall Efficiency vs. Power Supply − Iout = 40 mA, L = 22 H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Feedback Voltage Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Feedback Voltage Variation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Standby Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical Operating Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical Power Up Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Typical Start Up Inductor Current and Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Typical Inductor Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Typical Output Voltage Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Typical Output Peak Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Basic DC Current Mode Operation with Analog Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Basic DC Current Mode Operation with PWM Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Typical Semi−Pulsed Mode of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Examples of Possible LED Arrangements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 NCP5007 Demo Board Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 NCP5007 Demo Board PCB: Top Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 NCP5007 Demo Board Top Silkscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 NOTE CAPTIONS INDEX Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Maximum Ratings are those values beyond which damage to the device may occur . . . . . . . . . . . . . . . . . . . . This device series contains ESD protection and exceeds the following tests . . . . . . . . . . . . . . . . . . . . . . . . . . . The maximum package power dissipation limit must not be exceeded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Latch−up current maximum rating: 100 mA per JEDEC standard: JESD78 . . . . . . . . . . . . . . . . . . . . . . . . . Moisture Sensivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A . . . . . . . . . . . . . . . . . . . . . . . . . . The overall tolerance depends upon the accuracy of the external resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ABBREVIATIONS EN FB POR Enable Feed Back Power On Reset: Internal pulse to reset the chip when the power supply is applied http://onsemi.com 20 4 4 4 4 4 5 NCP5007 PACKAGE DIMENSIONS TSOP−5 SN SUFFIX CASE 483−02 ISSUE C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D S 5 4 1 2 3 B L G A J C 0.05 (0.002) H M K http://onsemi.com 21 MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040 J 0.10 0.26 0.0040 0.0102 K 0.20 0.60 0.0079 0.0236 L 1.25 1.55 0.0493 0.0610 M 0_ 10 _ 0_ 10 _ S 2.50 3.00 0.0985 0.1181 NCP5007 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 22 For additional information, please contact your local Sales Representative. NCP5007/D