L4949, NCV4949 100 mA, 5.0 V, Low Dropout Voltage Regulator with Reset and Sense The L4949 is a monolithic integrated 5.0 V voltage regulator with a very low dropout and additional functions such as reset and an uncommitted voltage sense comparator. It is designed for supplying microcontroller/microprocessor controlled systems particularly in automotive applications. http://onsemi.com MARKING DIAGRAMS 8 Features • • • • • • • • • • • • Operating DC Supply Voltage Range 5.0 V to 28 V Transient Supply Voltage Up to 40 V Extremely Low Quiescent Current in Standby Mode High Precision Output Voltage 5.0 V ±1% Output Current Capability Up to 100 mA Very Low Dropout Voltage Less Than 0.4 V Reset Circuit Sensing The Output Voltage Programmable Reset Pulse Delay Voltage Sense Comparator Thermal Shutdown and Short Circuit Protections NCV Prefix for Automotive and Other Applications Requiring Site and Change Control These are Pb−Free Devices PDIP−8 N SUFFIX CASE 626 8 1 1 8 SOIC−8 D SUFFIX CASE 751 8 1 1 SOIC−8 EP PD SUFFIX CASE 751AC 8 1 Supply Voltage (VCC) Preregulator 6.0 V 1 20 A WL, L YY, Y WW, W G or G 2.0 mA Reset 6 + - Regulator Sense Input (Si) 2.0 V 7 2 + 1.23 Vref L4949DW AWLYYWWG 1 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Device PIN CONNECTIONS Sense Output (So) Reset Vs V4949 ALYWG G 1 1 SOIC−20W DW SUFFIX CASE 751D CT 4 L4949 ALYWD G 8 20 Output Voltage (Vout) VZ 3 8 L4949N AWL YYWWG 1.23 V VCC 1 8 Vout Si 2 7 So VZ 3 6 Reset CT 4 5 GND Sense 5 GND (Top View) Figure 1. Representative Block Diagram ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. © Semiconductor Components Industries, LLC, 2008 November, 2008 − Rev. 12 1 Publication Order Number: L4949/D L4949, NCV4949 ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VCC 28 V VCC TR 40 V Output Current Iout Internally Limited − Output Voltage DC Operating Supply Voltage Transient Supply Voltage (t < 1.0 s) Vout 20 V Sense Input Current ISI ±1.0 mA Sense Input Voltage VSI VCC − Output Voltages Reset Output Sense Output VReset VSO 20 20 Output Currents Reset Output Sense Output IReset ISO 5.0 5.0 Preregulator Output Voltage VZ 7.0 V Preregulator Output Current IZ 5.0 mA ESD Protection at any pin Human Body Model Machine Model − − 2000 400 V mA V Thermal Resistance, Junction−to−Air P Suffix, DIP−8 Plastic Package, Case 626 D Suffix, SOIC−8 Plastic Package, Case 751 PD Suffix, SOIC−8 EP Plastic Package, Case 751AC (Note 1) D Suffix, SOIC−20 Plastic Package, Case 751D °C/W RqJA 100 200 85 80 Operating Junction Temperature Range TJ −40 to +150 °C Storage Temperature Range Tstg −65 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Soldered to a 200 mm2 1 oz. copper−clad FR−4 board. ELECTRICAL CHARACTERISTICS (VCC = 14 V, −40°C < TA < 125°C, unless otherwise specified.) Characteristic Symbol Min Typ Max Unit Output Voltage (TA = 25°C, Iout = 1.0 mA) Vout 4.95 5.0 5.05 V Output Voltage (6.0 V < VCC < 28 V, 1.0 mA < Iout < 50 mA) Vout 4.9 5.0 5.1 V Output Voltage (VCC = 35 V, t < 1.0 s, 1.0 mA < Iout < 50 mA) Vout 4.9 5.0 5.1 V Dropout Voltage Iout = 10 mA Iout = 50 mA Iout = 100 mA Vdrop − − − 0.1 0.2 0.3 0.25 0.40 0.50 VIO − 0.2 0.4 V Line Regulation (6.0 V < VCC < 28 V, Iout = 1.0 mA) Regline − 1.0 20 mV Load Regulation (1.0 mA < Iout < 100 mA) Regload − 8.0 30 mV 105 − 200 100 400 − Input to Output Voltage Difference in Undervoltage Condition (VCC = 4.0 V, Iout = 35 mA) V Current Limit Vout = 4.5 V Vout = 0 V ILim Quiescent Current (Iout = 0.3 mA, TA < 100°C) IQSE − 150 260 mA IQ − − 5.0 mA Quiescent Current (Iout = 100 mA) http://onsemi.com 2 mA L4949, NCV4949 ELECTRICAL CHARACTERISTICS (continued) (VCC = 14 V, −40°C < TA < 125°C, unless otherwise specified.) Characteristic Symbol Min Typ Max Unit VResth − Vout − 0.5 − V 50 50 100 − 200 300 RESET Reset Threshold Voltage Reset Threshold Hysteresis @ TA = 25°C @ TA = −40 to +125°C VResth,hys mV Reset Pulse Delay (CT = 100 nF, tR ≥ 100 ms) tResD 55 100 180 ms Reset Reaction Time (CT = 100 nF) tResR − 5.0 30 ms Reset Output Low Voltage (RReset = 10 kW to Vout, VCC ≥ 3.0 V) VResL − − 0.4 V Reset Output High Leakage Current (VReset = 5.0 V) IResH − − 1.0 mA Delay Comparator Threshold VCTth − 2.0 − V VCTth, hys − 100 − mV VSOth 1.16 1.23 1.35 V VSOth,hys 20 100 200 mV Sense Output Low Voltage (VSI ≤ 1.16 V, VCC ≥ 3.0 V, RSO = 10 kW to Vout) VSOL − − 0.4 V Sense Output Leakage (VSO = 5.0 V, VSI ≥ 1.5 V) ISOH − − 1.0 mA ISI −1.0 0.1 1.0 mA VZ − 6.3 − V Delay Comparator Threshold Hysteresis SENSE Sense Low Threshold (VSI Decreasing = 1.5 V to 1.0 V) Sense Threshold Hysteresis Sense Input Current PREREGULATOR Preregulator Output Voltage (IZ = 10 mA) PIN FUNCTION DESCRIPTION Pin SOIC−8, PDIP−8 Pin SOIC−8 EP Pin SOIC−20W Symbol 1 1 19 VCC 2 2 20 Si Input of Sense Comparator 3 3 1 VZ Output of Preregulator 4 4 2 CT Reset Delay Capacitor 5 5 4 − 7, 14 − 17 GND Ground 6 6 10 Reset Output of Reset Comparator 7 7 11 SO Output of Sense Comparator 8 8 12 Vout Main Regulator Output − − 3, 8, 9, 13, 18 NC No Connect − EPAD − EPAD http://onsemi.com 3 Description Supply Voltage Connect to Ground potential or leave unconnected L4949, NCV4949 TYPICAL CHARACTERIZATION CURVES 60.0 0.5 Unstable Region Vin = 13.5 V Cout = 10 mF Stable Region Vin = 13.5 V Cout = 10 mF 0.4 40.0 ESR (W) ESR (W) 50.0 30.0 0.3 0.2 20.0 0.1 10.0 Stable Region 0 0 10 20 30 40 50 60 70 Unstable Region 80 90 0 100 0 10 20 30 OUTPUT CURRENT (mA) 60 70 80 90 100 6.0 TJ = 25°C VCC = 14 V Iout = 1.0 mA Vout , OUTPUT VOLTAGE (V) Vout , OUTPUT VOLTAGE (V) 5.04 5.02 5.0 4.98 4.96 -40 -20 0 20 40 60 80 100 5.0 4.0 RL = 5.0 k RL = 100 W 3.0 2.0 1.0 0 120 0 1.0 2.0 TJ, JUNCTION TEMPERATURE (°C) 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 VCC, SUPPLY VOLTAGE (V) Figure 4. Output Voltage versus Junction Temperature Figure 5. Output Voltage versus Supply Voltage 0.40 250 TJ = 25°C Vdrop , DROPOUT VOLTAGE (mV) Vdrop , DROPOUT VOLTAGE (mV) 50 Figure 3. ESR Stability Border Vs. Output Current (Very Low ESR) Figure 2. ESR Stability Border Vs. Output Current (Full ESR Range) 200 150 100 50 0 40 OUTPUT CURRENT (mA) 0.1 1.0 10 Iout = 50 mA 0.20 Iout = 10 mA 0.10 0 -40 100 Iout = 100 mA 0.30 -20 0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (°C) Iout, OUTPUT CURRENT (mA) Figure 6. Dropout Voltage versus Output Current Figure 7. Dropout Voltage versus Junction Temperature http://onsemi.com 4 120 L4949, NCV4949 TYPICAL CHARACTERIZATION CURVES (continued) 3.0 VCC = 14 V TJ = 25°C 2.5 IQ, QUIESCENT CURRENT (mA) IQ, QUIESCENT CURRENT (mA) 3.0 2.0 1.5 1.0 0.5 0 0.1 1.0 10 2.0 RL = 100 W 1.5 1.0 0.5 0 100 TJ = 25°C 2.5 RL = 5.0 k 0 5.0 10 Iout, OUTPUT CURRENT (mA) VReset , RESET THRESHOLD VOLTAGE (V) 6.0 VReset , RESET OUTPUT (V) TJ = 25°C 5.0 Resistor 10 k from Reset Output to 5.0 V 3.0 2.0 1.0 0 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 30 4.8 4.9 5.0 4.66 Upper Threshold 4.62 4.58 4.54 4.5 Lower Threshold 4.46 4.42 -40 -20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) Figure 10. Reset Output versus Regulator Output Voltage Figure 11. Reset Thresholds versus Junction Temperature 1.4 5.0 TJ = 25°C 4.0 Resistor 10 k from Sense Output to 5.0 V VSI, SENSE INPUT VOLTAGE (V) 6.0 VSO , SENSE OUTPUT VOLTAGE (V) 25 4.7 Vout, OUTPUT VOLTAGE (V) 3.0 20 Figure 9. Quiescent Current versus Supply Voltage Figure 8. Quiescent Current versus Output Current 4.0 15 VCC, SUPPLY VOLTAGE (V) 2.0 1.0 1.38 1.36 1.34 Upper Threshold 1.32 1.3 1.28 1.26 Lower Threshold 1.24 1.22 0 1.0 1.05 1.1 1.15 1.2 1.25 1.3 1.35 1.4 1.45 1.2 -40 1.5 -20 0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (°C) VSI, SENSE INPUT VOLTAGE (V) Figure 12. Sense Output versus Sense Input Voltage Figure 13. Sense Thresholds versus Junction Temperature http://onsemi.com 5 120 L4949, NCV4949 APPLICATION INFORMATION Supply Voltage Transient less than 8.0 V supply transients of more than 0.4 V/ms can cause a reset signal perturbation. To improve the transient behavior for supply voltages less than 8.0 V a capacitor at Pin 3 can be used. A capacitor at Pin 3 (C3 ≤ 1.0 mF) also reduces the output noise. High supply voltage transients can cause a reset output signal perturbation. For supply voltages greater than 8.0 V the circuit shows a high immunity of the reset output against supply transients of more than 100 V/ms. For supply voltages Vout C3 VZ (optional) Vbat VCC 3 CO 8 CT 4 Preregulator 6.0 V 1 Cs 2.0 mA Reset 6 10 kW + - Vout 2.0 V Regulator Reset VCC RSO 10 kW So Si 7 2 + 1.23 Vref Sense 5 GND NOTE: 1. For stability: Cs ≥ 1.0 mF, CO ≥ 4.7 mF, ESR < 10 W at 10 kHz 2. Recommended for application: Cs = CO = 10 mF Figure 14. Application Schematic http://onsemi.com 6 1.23 V L4949, NCV4949 OPERATING DESCRIPTION The L4949 is a monolithic integrated low dropout voltage regulator. Several outstanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. It is also suitable in other applications where the included functions are required. The modular approach of this device allows the use of other features and functions independently when required. Vout Vout 5.0 V Voltage Regulator The voltage regulator uses an isolated collector vertical PNP transistor as a regulating element. With this structure, very low dropout voltage at currents up to 100 mA is obtained. The dropout operation of the standby regulator is maintained down to 3.0 V input supply voltage. The output voltage is regulated up to a transient input supply voltage of 35 V. A typical curve showing the standby output voltage as a function of the input supply voltage is shown in Figure 16. The current consumption of the device (quiescent current) is less than 200 mA. To reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled. The quiescent current as a function of the supply input voltage is shown in Figure 17. 0V 2.0 V 5.0 V 35 V VCC Figure 16. Output Voltage versus Supply Voltage IQ, QUIESCENT CURRENT (mA) 3.0 Short Circuit Protection: The maximum output current is internally limited. In case of short circuit, the output current is foldback current limited as described in Figure 15. 2.5 TJ = 25°C 2.0 RL = 100 W 1.5 1.0 0.5 0 0 RL = 5.0 k 5.0 10 15 20 25 30 VCC, SUPPLY VOLTAGE (V) 10 Figure 17. Quiescent Current versus Supply Voltage Vout (V) Preregulator To improve transient immunity a preregulator stabilizes the internal supply voltage to 6.0 V. This internal voltage is present at Pin 3 (VZ). This voltage should not be used as an output because the output capability is very small (≤ 100 mA). This output may be used to improve transient behavior for supply voltages less than 8.0 V. In this case a capacitor (100 nF − 1.0 mF) must be connected between Pin 3 and GND. If this feature is not used Pin 3 must be left open. 5.0 0 20 100 200 Iout (mA) Figure 15. Foldback Characteristic of Vout http://onsemi.com 7 L4949, NCV4949 Reset Circuit Output voltage drops below the reset threshold only marginally longer than the reaction time results in a shorter reset delay time. The nominal reset delay time will be generated for output voltage drops longer than approximately 50 ms. The typical reset output waveforms are shown in Figure 19. The block circuit diagram of the reset circuit is shown in Figure 18. The reset circuit supervises the output voltage. The reset threshold of 4.5 V is defined by the internal reference voltage and standby output divider. The reset pulse delay time tRD, is defined by the charge time of an external capacitor CT: t RD + Vout C x 2.0 V T 2.0 mA Vout1 5.0 V VRT + 0.1 V UKT The reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor CT and is proportional to the value of CT. The reaction time of the reset circuit increases the noise immunity. 3.0 V t tR Reset tRD 1.23 V Vref 22 k 40 V Vin tRD tRR 2.0 mA Switch On Reset Input Drop Dump Output Overload Switch Off Figure 19. Typical Reset Output Waveforms Out CT + - Sense Comparator The sense comparator compares an input signal with an internal voltage reference of typical 1.23 V. The use of an external voltage divider makes this comparator very flexible in the application. It can be used to supervise the input voltage either before or after a protection diode and to provide additional information to the microprocessor such as low voltage warnings. 2.0 V Reg Figure 18. Reset Circuit http://onsemi.com 8 L4949, NCV4949 ORDERING INFORMATION Package Shipping† L4949NG PDIP−8 (Pb−Free) 50 Units / Rail L4949DG SOIC−8 (Pb−Free) 98 Units / Rail L4949DR2G SOIC−8 (Pb−Free) 2500 Units / Tape & Reel NCV4949DG* SOIC−8 (Pb−Free) 98 Units / Rail SOIC−8 EP (Pb−Free) 98 Units / Rail SOIC−8 (Pb−Free) 2500 Units / Tape & Reel NCV4949PDR2G* SOIC−8 EP (Pb−Free) 2500 Units / Tape & Reel NCV4949DWR2G* SOIC−20W (Pb−Free) 1000 Units / Tape & Reel Device NCV4949PDG* Operating Temperature Range TJ = −40°C to +125°C NCV4949DR2G* †For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV4949: Tlow = −40°C, Thigh = +125°C. Guaranteed by design. NCV prefix is for automotive and other applications requiring site and change control. http://onsemi.com 9 L4949, NCV4949 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 626−05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 −B− 1 4 DIM A B C D F G H J K L M N F −A− NOTE 2 L C J −T− MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10_ 0.030 0.040 N SEATING PLANE D M K G H 0.13 (0.005) T A M M B M SOIC−20 WB DW SUFFIX CASE 751D−05 ISSUE G A 20 q X 45 _ E h 1 10 20X B B 0.25 M T A S B S A L H M 10X 0.25 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 18X e A1 SEATING PLANE C T http://onsemi.com 10 DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ L4949, NCV4949 PACKAGE DIMENSIONS SOIC−8 EP PD SUFFIX CASE 751AC−01 ISSUE B 2X D E1 2X 0.10 C D PIN ONE LOCATION DETAIL A D A 8 EXPOSED PAD 5 ÉÉÉ ÉÉÉ ÉÉÉ 1 5 F 8 G E h 2X 4 4 0.20 C e 1 BOTTOM VIEW 8X b 0.25 C A-B D B A 0.10 C A2 8X b1 GAUGE PLANE 0.10 C SEATING PLANE SIDE VIEW A1 ÇÇ ÉÉ ÉÉ ÇÇ ÉÉ ÇÇ c H A A END VIEW TOP VIEW C NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS IN MILLIMETERS (ANGLES IN DEGREES). 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 MM TOTAL IN EXCESS OF THE “b” DIMENSION AT MAXIMUM MATERIAL CONDITION. 4. DATUMS A AND B TO BE DETERMINED AT DATUM PLANE H. 0.10 C A-B L 0.25 (L1) DETAIL A q c1 (b) SECTION A−A SOLDERING FOOTPRINT* 2.72 0.107 1.52 0.060 7.0 0.275 Exposed Pad 4.0 0.155 2.03 0.08 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 DIM A A1 A2 b b1 c c1 D E E1 e L L1 F G h q MILLIMETERS MIN MAX 1.35 1.75 0.00 0.10 1.35 1.65 0.31 0.51 0.28 0.48 0.17 0.25 0.17 0.23 4.90 BSC 6.00 BSC 3.90 BSC 1.27 BSC 0.40 1.27 1.04 REF 2.24 3.20 1.55 2.51 0.25 0.50 0_ 8_ L4949, NCV4949 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AJ −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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