LED Driver IC

Ordering number : ENA1968
LV5216CS
Bi-CMOS IC
LED Driver
http://onsemi.com
Overview
The LV5216CS is 10ch LED driver IC for the cell phones with built-in charge pump circuit.
Features
• LED driver ×10 channels (MAIN, 3-color, 1-color) and charge pump circuit incorporated.
• Each LED driver current value adjusted by serial bus.
• Main LED automatic luminance control with illumination sensor incorporated.
• Usable both the LOG type and the linear type illumination sensor.
• Output level changeover possible for illumination sensor ON/OFF control output.
• Ringing tone and 3-color LEDs synchronization function incorporated.
• Gradation function incorporated (3-color LEDs)
Function
• Charge pump circuit ((One time and automatic switch method of 1.5 times) 5.0V time fixed output 1.5 times)
• LED driver
Main LCD backlight LED driver ×6 with automatic luminance control
LED current 5-bit changeover (0.6 to 19.2mA)
Fade IN / OUT function.
External brightness control function.
MLED5 and MLED6 independently controllable. Full ON possible.
Dim mode 3-bit changeover (0.2mA to 1.6mA)
3-color LEDs driver ×1
LED current 5-bit changeover (0.6 to 19.2mA)
Gradation function
Ringing tone synchronization function (Forced to operate at SCTL: H)
1-color LED driver ×1
LED current 5-bit changeover (0.6 to 19.2mA)
2-fold current mode available
Semiconductor Components Industries, LLC, 2013
August, 2013
81011 SY 20090423-S00002 No.A1968-1/8
LV5216CS
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VCC max
4.5
Maximum pin voltage
V1 max
LED driver, charge pump circuit
V
6
V
Allowable power dissipation
Pd max
* Mounted on a circuit board
Operating temperature
Topr
-30 to +75
°C
Storage temperature
Tstg
-40 to +125
°C
850
mW
* Specified board: 40mm × 50mm × 0.8mm, glass epoxy board. (2S2P (4-layer board))
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Operating Conditions at Ta = 25°C
Parameter
Symbol
Supply voltage 1
VBAT
Supply voltage 2
VDD
Conditions
Ratings
Unit
3.0 to 4.5
V
1.7 to VBAT
V
Electrical Characteristics at Ta = 25°C, VCC = 5.0V
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
Consumption current
Consumption current
ICC1
RESET:L (standby mode)
μA
0
5
0.3
5.0
μA
4
7
mA
ICC2
RESET:H (sleep mode)
ICC3
charge pump: ON
VO1
IO=50mA One time
3.65
V
VO2
IO=50mA 1.5 times
5.0
V
ILM
1.5 times mode VBAT=3.4V >4V
Charge pump block
Output voltage
Resistance current
170
mA
Charge pump change voltage
Threshold voltage
VD1
When you set the voltage of the LED pin and the
0.25
0.35
V
400
500
600
kHz
0.2
0.6
1.7
mA
MAIN current value 19.2mA
Charge pump clock block
Clock frequency
FOSC
LED driver block
Minimum output current value
IMIN1
MAIN LED driver, Serial data=#00, VO=0.5V
IMIN2
3+1-color LED driver, Serial data=#00, VO=0.5V
0.2
0.6
1.7
mA
IMIN3
1-color LED driver, Serial data=#00, VO=0.5V,
0.4
1.2
3.4
mA
mA
2 times current mode
Maximum output current value
IMAX1
MAIN LED driver, Serial data=#FF, VO=0.5V
18.0
19.2
20.4
IMAX2
3+1-color LED driver, Serial data=#FF, VO=0.5V
18.0
19.2
20.4
mA
IMAX3
1-color LED driver, Serial data=#FF, VO=0.5V,
36.0
38.4
40.8
mA
2 times current mode
Non-linearity error
LE
*1
-2
2
LSB
Differential linearity error
DLE
*2
-2
2
LSB
Maximum output current
ΔIL1
MAIN LED driver
-10
%
-10
%
Maximum current setting VO=2 or 0.2V
ΔIL2
3+1-color LED driver
Maximum current setting VO=4 to0.35V
Leakage current
External CTL current
μA
IL1
MAIN LED driver, LED driver: OFF, VO=5V
1
IL2
3+1-color LED driver, LED driver: OFF, VO=5V
1
μA
VEM1
MLED fixed current mode current value,
mA
-0.05
0
0.05
45
50
55
MICTL pin voltage =1.8V, RT2=100kΩ, Serial
MISW: Difference current with turning OFF,
MICTLC:01h
VEM2
MLED fixed current mode current value,
%
MICTL pin voltage =0.98V, RT2=100kΩ, Serial
MISW: Ratio to current value when turning it
OFF, MICTLC:01h
Continued on next page.
No.A1968-2/8
LV5216CS
Continued from preceding page.
Parameter
External CTL current
Symbol
VEM3
Conditions
Ratings
min
typ
0
MLED fixed current mode current value,
Unit
max
0.5
mA
MICTL pin voltage =0V, RT2=100kΩ,
MICTLC: 01h * Operation to erase LED by 0V
impression is NG as for the MICTL pin.
ON resistance for SW mode
FONR
MLED5 and 6: SW mode, IL=-30mA
10
Ω
Illuminance sensor information input circuit (LOG type)
PTD pin thresh voltage 1
VPLG1
Voltage of change PTD pin of 1 in brightness
0.197
0.247
0.297
V
0.752
0.843
0.920
V
VPLGn+1-VPLGn›0 (1≤n≤14)
V
and 2 in brightness,
Serial TAD=0.42V, TAU=0.84 setting
PTD pin thresh voltage 2
VPLG15
Voltage of change PTD pin of 15 in brightness
and 16 in brightness,
Serial TAD=0.42V, TAU=0.84 setting
PTD pin thresh voltage difference 1
ΔVPLG
Difference of voltage of change PTD pin of
change voltage of PTD pin, brightness n+2,
and n+1 in brightness of brightness n+1 and n
in brightness
Illuminance sensor information input circuit (Linear type)
PTD pin thresh voltage 3
VPLN1
Voltage of change PTD pin of 1 in brightness
0.01
0.03
0.05
V
0.84
0.99
1.14
V
VPLNn+1-VPLNn›0 (1≤n≤8)
V
and 2 in brightness,
Serial TAU=0.84 setting
PTD pin thresh voltage 4
VPLN9A
Voltage of change PTD pin of 9 in brightness
and 10 in brightness,
Serial TAU=0.84 setting, PTGSW: open
PTD pin thresh voltage difference 2
ΔVPLNL
Difference of voltage of change PTD pin of
change voltage of PTD pin, brightness n+2,
and n+1 in brightness of brightness n+1 and n
in brightness
PTD pin thresh voltage 5
VPLN8B
Voltage of change PTD pin of 8 in brightness
0.04
0.06
0.08
V
1.08
1.23
1.38
V
VPLNn+1-VPLNn›0 (8≤n≤14)
V
and 9 in brightness,
Serial TAU=0.84 setting, PTGSW: ON
PTD pin thresh voltage 6
VPLN15
Voltage of change PTD pin of 15 in brightness
and 16 in brightness,
Serial TAU=0.84 setting
PTD pin thresh voltage difference 3
ΔVPLNH
Difference of voltage of change PTD pin of
change voltage of PTD pin, brightness n+2,
and n+1 in brightness of brightness n+1 and n
in brightness
Control circuit block
H level 1
VINH1
Input H level Serial
VDD × 0.8
L level 1
VINL1
Input L level Serial
0
H level 2
VINH2
Input H level RESET SCTL
1.5
L level 2
VINL2
Input L level RESET SCTL
0
H output level 1
VHO1
Output H level PTEN IL=1mA
H output level 2
VHO2
L output level 1
VLO1
V
VDD × 0.2
V
V
0.3
V
VBAT - 0.3
V
Output H level PTEN IL=1mA
Serial PTENH:VDD setting
VDD - 0.3
V
Output L level PTEN IL=1mA
0
Serial PTENH:VBAT setting
0.3
V
*1. Non-linearity error: The difference between the actual and ideal current values.
*2. Differential linearity error: The difference between the actual and ideal increment when one low-order bi value is added.
No.A1968-3/8
LV5216CS
Package Dimensions
unit : mm (typ)
3412
SIDE VIEW
BOTTOM VIEW
0.235
TOP VIEW
0.235
0.5
F
E
D
2.97
0.5
C
B
A
2.97
0.55 MAX
6
0.14
SIDE VIEW
5
4
3
2
1
0.27
SANYO : WLP36(2.97X2.97)
Block Diagram & Pin arrangement drawing
VBAT
470pF
PVCC
PGND
1A
2A
1B
2B
OUT
CPTC
(Sensor connection, Linear type)
VBAT or VDD
TEST
VDD
PTEN
VCC
Charge pump 1/1.5 times
SVCC
Sensor
SDA
RT
PTEN
EN
PTD
SCL
Sensor
connetion
Serial
I/F
Autoflash
metering
PTGSW
PTGSW
GND
RESET
PTD
SCTL
GRADIATION
RT
75pF
LEDGND2
IREF
(Sensor connection, LOG type)
VBAT or VDD
CT
LED
driver
OSC
LED
driver
SGND
PTEN
BLED
VCC
GLED
LED driver
Sensor
RT
MLED_F
RLED
EN
PTGSW
GND
PTD
IREF
BLED2
RT2
MICTL
LEDGND1
MLED6
MLED5
MLED4
MLED3
MLED2
MLED1
No.A1968-4/8
LV5216CS
Serial Bus Communication Specifications
1) I2C serial transfer timing conditions
twH
SCL
th1
twL
th2
tbuf
SDA
th1
ts2
ts1
ton
tof
START condition
ts3
Resend start condition
STOP condition
Input waveform condition
Standard mode
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
SCL clock frequency
fsc1
SCL clock frequency
0
-
100
kHz
Data setup time
ts1
SCL setup time relative to the fall of SDA
4.7
-
-
μs
ts2
SDA setup time relative to the rise of SCL
250
-
-
ns
ts3
SCL setup time relative to the rise of SDA
4.0
-
-
μs
th1
SCL hold time relative to the fall of SDA
4.0
-
-
μs
th2
SDA hold time relative to the fall of SCL
0
-
-
μs
twL
SCL pulse width for the L period
4.7
-
-
μs
twH
SCL pulse width for the H period
4.0
-
-
μs
Input waveform
ton
SCL and SDA (input) rise time
-
-
1000
ns
conditions
tof
SCL and SDA (input) fall time
-
-
300
ns
Bus free time
tbuf
Time between STOP condition and START
4.7
-
-
μs
Data hold time
Pulse width
condition
High-speed mode
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
SCL clock frequency
fsc1
SCL clock frequency
0
-
400
kHz
Data setup time
ts1
SCL setup time relative to the fall of SDA
0.6
-
-
μs
ts2
SDA setup time relative to the rise of SCL
100
-
-
ns
ts3
SCL setup time relative to the rise of SDA
0.6
-
-
μs
th1
SCL hold time relative to the fall of SDA
0.6
-
-
μs
th2
SDA hold time relative to the fall of SCL
0
-
-
μs
Pulse width
twL
SCL pulse width for the L period
1.3
-
-
μs
twH
SCL pulse width for the H period
0.6
-
-
μs
Input waveform
ton
SCL and SDA (input) rise time
-
-
300
ns
Data hold time
conditions
tof
SCL and SDA (input) fall time
-
-
300
ns
Bus free time
tbuf
Time between STOP and START conditions
1.3
-
-
μs
No.A1968-5/8
LV5216CS
2) I2C bus transfer method
Start and stop conditions
During data transfer operation using the I2C bus, SDA must basically be kept in constant state while SCL is “H” as
shown below.
SCL
SDA
ts2
th2
When data is not being transferred, both SCL and SDA are set in the “H” state.
When SCL=SDA is “H,” the start condition is established when SDA is changed from “H” to “L,” and access is started.
When SCL is “H,” the stop condition is established when SDA is changed from “L” to “H,” and access is ended.
STOP condition
START condition
SCL
SDA
ts3
th1
Data transfer and acknowledgement response
After the start condition has been established, the data is transferred one byte (8 bits) at a time.
Any number of bytes of data can be transferred continuously.
Each time the 8-bit data is transferred, the ACK signal is sent from the receive side to the send side. The ACK signal is
issued when SDA on the send side is released and SDA on the receive side is set to “L” immediately after fall of the
clock pulse at the SCL eighth bit of data transfer to “L.”
When the next 1-byte transfer is left in the receive state after sending the ACK signal from the receive side, the receive
side releases SDA at the fall of the SCL ninth clock.
In the I2C bus, there is no CE signal. In its place, a 7-bit slave address is assigned to each device, and the first byte of
transfer is assigned to the command (R/W) representing the 7-bit address and subsequent transfer direction. Note that
only write is valid in this IC. The 7-bit address is transferred sequentially starting with MSB, and the eighth bit is set to
“L” which indicates a write.
In the LV5216CS the slave address is specified as "1110100"
Start
M
S
B
Start
M
S
B
Slave address
L
S
B
W
A
C
K
M
S
B
Resister address
L
S
B
A
C
K
M
S
B
Data
L
S
B
A
C
K
Stop
L
S
B
W
A
C
K
M
S
B
Data1
L
S
B
A
C
K
M
S
B
Data2
L
S
B
A
C
K
Stop
SCL
SDA
(WRITE)
SDA
(READ)
Slave address
No.A1968-6/8
LV5216CS
Data transfer writing format
In the first one byte, the slave address and the Write command are allocated, and the following one byte specifies the
register address in the cereal map.
The register address is done after the fourth byte be to do the data transfer to the address specified in the register address
written in the third byte and the 2nd byte, and to continue data after that and the increment is done by the automatic
operation.
As a result, a data continuous sending from a specified address becomes possible.
However, when the address becomes 3fh, the forwarding address of the following byte becomes 00h.
Example of writing data
S
1
1
0
1
1
0
0
A
0
0
0
Slave address
1
1
0
0
0
1
A
A
Data1
Resister address 07h setting
Data writing for Address 07h
R/W=0 writing
A
Data2
S
Data4
A
Data3
Data writing for Address 08h
Data writing for Address 09h
Start condition
P
Master transmission
P
ACK signal
A
Stop condition
A
Data writing for Address 0ah
Slave transmission
Example of reading data
S
1
1
1
0
1
0
0
A
0
0
0
Slave address
0
1
0
1
0
1
A
Sr
1
1
A
0
1
0
0
1
A
R/W=1 writing
Restart
R/W=0 writing
Data1
1
Slave address
Resister address 15h setting
P
Data reading for Address 15h
The end of reading is notified by the thing that ACK is not put out.
S
Start condition
Master transmission
P
Stop condition
Slave transmission
A
Sr
A
A
ACK signal
Restart beginning condition
No.A1968-7/8
LV5216CS
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PS No.A1968-8/8