APPLICATION NOTE LF Antenna Driver ATA5279C – Thermal Considerations and PCB Design Suggestions ATA5279C General To minimize EMC radiation the Atmel® ATA5279C is designed to drive antennas with a sinusoidal waveform. For the same reason the switching edges of the integrated boost transistor are degenerated. The EMC benefit thus results in higher power dissipation and a corresponding increase in the on-chip temperature. Power Balancing at the Driver Interface The total power loss on the chip primarily results from the activated driver stage in addition to the internal boost transistor. In the worst case the highest power dissipation occurs when the supply voltage (VS = 8V) is low and a high antenna impedance is driven by the maximum antenna current (1Ap). Figure 1. Power Balancing of the Driver Interface Power Dissipation by - chip - choke - diode - shunt DC-Input Power AC Output Power to Antenna Adrima Driver Interface ATA5279 In spite of the power dissipation the thermal load can be controlled for typical automotive PEG applications because the device is activated on demand and operates for a short time only. In addition, a temperature sensor monitoring protects the device from becoming damaged in the event of an unusual operation scenario. Nevertheless, the design of hardware and software has to ensure that a thermal shutdown during normal operation never occurs. But in case of an abnormality as well, a cyclic overtemperature shutdown should be avoided to ensure the device achieve maximum longevity. Thus, the designer wants to know in advance the resulting chip temperature with respect to his specific application conditions. This is important for estimating the margin to thermal shutdown when sending the specific LF protocol. 9168D-RKE-05/15 1. Thermal Model of the Device Mounted on PCB Even though the Atmel® ATA5279C is a device for short -term power operation, it has to take in account both the local peak temperature on the silicon area as well the average temperature of the case. A thermal model has been created for the purpose of calculating or simulating on-chip thermal behavior. Figure 1-1. Simplified Thermal Model Chip Level PBoost Cthjc PDriver Cthjc Rthjc Rthjc Heat Slug PCB Level Cthca Rthca Tamb The power dissipation sources PBoost and PDriver are located on different chip areas. Each source is connected to an individual thermal resistance Rthjc with identical value to derive the heat down to the slug level. For the sake of simplicity the thermal capacity Cthjc can be ignored because the resulting time constant (4ms) has only a minor impact compared to that of the device package. The combined power dissipation PBoost + PDriver passes Rthca and is then absorbed by the PCB. Thus, the final heat slug temperature is determined by the total power dissipation multiplied by the thermal resistance Rthca and the operation duty cycle nduty plus the ambient temperature Tamb. How to simulate or calculate the chip temperature according to the thermal model of Figure 1-1 is described in a section below. 1.1 Power Dissipation on Chip Depending on Operating Conditions Power dissipation values shown in the tables below are determined by simulation under various operating conditions based on chip design parameters. The tables demonstrate the dissipation for operating the high-power driver stages of the device. For the selected driver stage AxP it has to be taken into account that power loss is also generated even when sending LF “0” data or remaining in idle mode. This is due to the cross current of the driver stage. The dissipation results from the driver voltage VDS multiplied by the driver cross current IAxP,CC. However, if sending LF “0” data, VDS is defined by regulation, whereas in idle mode VDS is fixed to VS = 12V, the result is IAxP,CC = 68mA or about 0.8W. Table 1-1. Boost Power Dissipation at VS = 12V Boost Dissipation [W] at VS = 12V Carrier On, RC Snubber(1) Antenna Impedance [] Note: 2 1. Antenna Current [mAp] 12.5 15 17 500 0.26 0.36 0.46 600 0.46 0.66 0.86 700 0.77 1.14 1.53 800 1.25 1.89 2.55 900 1.97 3.01 4.70 1000 2.99 5.01 4.44 Additional RC snubber circuitry through a diode for EMC suppression leads to increased power dissipation ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 Table 1-2. Boost Power Dissipation at VS = 9V Boost Dissipation [W] at VS = 8.25V Carrier On, RC Snubber(1) Antenna Impedance [] Note: 1. Table 1-3. Antenna Current [mAp] 12.5 15 17 500 0.45 0.65 0.84 600 0.85 1.24 1.64 700 1.50 2.26 3.08 800 2.55 4.04 6.20 900 4.33 6.28 6.65 1000 5.98 6.36 6.54 Additional RC snubber circuitry through a diode for EMC suppression leads to increased power dissipation Driver Power Dissipation Boost Dissipation [W] at Carrier ON Antenna Impedance [] Table 1-4. Antenna Current [mAp] 12.5 15 17 500 1.79 1.82 1.89 600 2.23 2.35 2.45 700 2.78 2.94 3.08 800 3.37 3.59 3.76 900 4.01 4.29 4.51 1000 4.71 5.05 5.32 Driver Power Dissipation Sending LF “0” Data Boost Dissipation [W] at Carrier Off Sending LF “0” Data Antenna Impedance [] Antenna Current [mAp] Sent Before 12.5 15 17 500 1.46 1.63 1.77 600 1.66 1.86 2.03 700 1.86 2.09 2.28 800 2.05 2.33 2.54 900 2.25 2.56 2.80 1000 2.45 2.79 3.06 Graphical Performance of power dissipation given by Table 1-1 on page 2 to Table 1-4: ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 3 Figure 1-2. Boost Dissipation at Continuous Carrier, VS = 12V Boost Power Dissipation (W) 6 Antenna Impedance 15Ω 5 17Ω 4 12.5Ω 3 2 1 0 500 600 700 800 900 1000 Antenna Current (mAp) Figure 1-3. Boost Dissipation at Continuous Carrier, VS = 8.25V Antenna Impedance 17Ω 15Ω 12.5Ω Boost Power Dissipation (W) 7 6 5 4 3 2 1 0 500 600 700 800 900 1000 Antenna Current (mAp) Driver Power Dissipation (W) Figure 1-4. Driver Dissipation at Continuous Carrier 6.0 Antenna Impedance 5.5 17Ω 15Ω 12.5Ω 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 500 600 700 800 Antenna Current (mAp) 4 ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 900 1000 Figure 1-5. Driver Dissipation Sending LF “0” Data Driver Power Dissipation (W) 3.5 Antenna Impedance 17Ω 3.0 15Ω 12.5Ω 2.5 2.0 1.5 1.0 500 600 700 800 900 1000 Antenna Current (mAp) Note: 1.2 The power limitation and reduction of the boost converter power dissipation in Figure 1-2 on page 4 is caused by reaching the overvoltage switch-off threshold due to high antenna impedance (17). However, at low voltage operation (VS = 8.25V) Figure 1-3 on page 4 the boost converter reaches the current limitation if a 15 or 17 antenna is in use. Thermal Parameters of Device and PCB The junction-case thermal resistance of device is specified by the data sheet with Rthjc = 10k/W. Whereas, the thermal capacity CThjc can be ignored because the related time constant of about 4ms is minor compared to that of a typical PCB. More effort is required to determine the thermal parameters for the specific PCB. Section 4. “Appendix” on page 11 describes how it is measured by using the Atmel® ATAB5279 application board. As a frame of reference, thermal parameters for this board were measured as follows: ● Thermal resistance Rthca = 34K/W ● Thermal time constant hca = 12.5s These values can be used as a guideline reference in advance for thermal simulations. But it can be assumed that no significant lower thermal resistance will be reached based on this target board design. ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 5 2. Calculation of Temperature Rise Based on Equation The equations of the chip temperature calculation below are derived from the simplified thermal model as shown in Figure 1-1 on page 2. t – -------- ca T Heatslug (t) = T amb + n duty R thca P Boost + P Driver 1 – e Equation 1 T Boost (t) = P Boost + R thjc + T Heatslug (t) Equation 2 T Driver (t) = P Driver + R thjc + T Heatslug (t) Equation 3 By means of equations 1-3, the local temperature rise on chip can be calculated in a separate manner for boost and driver area on-chip as well for the average heat-slug temperature. To calculate the average temperature on the heat-slug an operation duty cycle nduty has to be assumed. The example below shows the resulting temperature profile using the application board with antenna operated at 12V supply voltage and maximum antenna current of 1Ap. PBoost PDriver Tamb Rthjc Rthca ca nduty t = 2.99W = 4.71W = 85°C = 10K/W = 34K/W = 12.5s = 0.30 Power dissipation of boost transistor (from Table 1-1 on page 2) Power dissipation of driver stage (from Table 1-2 on page 3) Ambient temperature Thermal resistance junction case of device Thermal resistance case-to-ambient (PCB) Thermal time constant of PCB (Rthca Cthca) Operation duty cycle Time of transmission Temperature (°C) Figure 2-1. Calculated Temperature Profile on Chip 210 200 190 180 170 160 150 140 130 120 110 100 90 80 Maximum Peak Junction Temperature Driver Junction Peak Temperature Boost Junction Peak Temperature Maximum Average Junction Temperature Heat-slug Average Temperature Ambient Temperature 0 5 10 15 20 25 30 Transmission Time (s) Using a formula to calculate the temperature rise has the disadvantage that an average operation duty cycle has to be assumed. The calculation method cannot perform a real temperature profile modulated by sent LF data pattern. Section 3. “Simulation of Temperature Rise Based on Thermal Model” on page 7 describes how a thermal simulation can be performed using a standard PSPICE simulation tool. 6 ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 3. Simulation of Temperature Rise Based on Thermal Model Due to the analogy between thermal and electrical behavior the temperature transients can be simulated by means of a standard PSPICE tool available on the market. In comparison to the calculation method in Section 2. “Calculation of Temperature Rise Based on Equation” on page 6, it offers the advantage that the real temperature profile can be visualized depending on power dissipation of the sent LF pattern. In analogy parameters can be transferred for simulation as follows: Power Dissipation Ambient Temperature Thermal Resistance Thermal Capacitance P [W] [°C] Rth [K/W] Cth [Ws/K] >>> >>> >>> >>> Current Source Voltage Source Resistor Capacitor I [A] V [V] R [] C [F] In accordance with the thermal model in Figure 1-1 on page 2 and the analogy to the electrical parameters a related schematic entry for simulation is carried out in Figure 3-1. Figure 3-1. Schematic Entry for PSPIC Boost Spot Temp. I1-neg I2-neg Driver Spot Temp. P_Boost P_Driver Cthjc1 270μF IC = 0 I1 Rthjc1 10Ω I2 Rthjc2 10Ω Cthjc2 270μF IC = 0 Heat Slug Temperature Probe3-NODE Cthca 367m IC = 0 Rthca 34Ω Ambient Temperature + V1 85°C For the simulation example the thermal parameter and power dissipation values are taken from the calculation example in Section 2. “Calculation of Temperature Rise Based on Equation” on page 6. The thermal capacities are derived from the known time constant and thermal resistance according formula: thjc 4ms -4 Ws C thjc1 = C thjc2 = ----------- = ------------ = 4 10 -------- >>> 400µF R thjc KK ---10 W thca 12.5s Ws C thca = ------------ = ------------ = 0.367 -------- >>> 367mF R thca K K 34 ----W For the specific application the on-chip temperature profile is modulated by the sent LF pattern. In the schematic entry in Figure 3-1 the P_Boost and P-Driver power dissipation are represented by the PWL current sources I1 and I2. The modulating on/off time sequence with related power dissipation values are entered separately from the menu for the I1 and I2 sources. Note: When sending LF “0” data, due to the cross current the driver stage generates power dissipation in any case. It is accounted for with 2.45W in the entry box in Figure 3-3 on page 8 taken from Table 1-4 on page 3. ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 7 Figure 3-2 and Figure 3-3 on page 8 show the entry boxes for I1/I2 current sources of the simulation example. Therefore data pattern are converted in a continuous time sequence based on which the boost and driver power dissipation are modulated in on/off mode. In the example, “Time” is entered in seconds and “Current” in watts. Figure 3-2. Entry Box for I1 Current (Power) Sequence Figure 3-3. Entry Box for I2 Current (Power) Sequence 8 ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 This tool limits the number of time steps which can be entered to 256. So if a data pattern would be entered on bit level (bit width of 128µs), the protocol length is limited to 256 128µs = 32.768ms. In this example data is entered at the bit level because only 32bits are used. In order to reduce the step numbers, longer terms of changing data bits can be summarized to a time duration defining an average of power dissipation corresponding to the logical bit structure. Thus only two time steps are required to indicate the beginning and end of a power dissipation phase. To generate a continuous time sequence an Excel calculation according to the list in Figure 3-4 may be helpful. Figure 3-4. Generation of Bit Time Sequence Using Excel Lists Driver Heat-slug Temperature (°C) Driver Figure 3-5. Temperature Profile on Chip and PCB Depending Power Dissipation and Sent Pattern Continuous LF Data Carrier Continuous Carrier Time (ms) Pause Sent Pattern ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 9 3.1 Simulation Result The simulated profile in Figure 3-5 indicates the fast local temperature rise on driver stage and boost transistor due to the low thermal capacity (time constant (ca = 4ms). In contrast the heat-slug temperature rises much more slowly because the capacity of the PCB is larger (time constantca = 12.5s). Under the mentioned operating conditions in combination with the example protocol pattern, the device stays in safe operation because the maximum driver temperature is 25 degrees below the maximal allowed junction temperature of 150°C. Of course, if such a LF pattern was sent in repeat mode, the average temperature on the heat-slug would increase further. In this case, a thermal shutdown happens if the threshold level (typical 145°C) is exceeded. Under “listed condition” in Figure 3-6 and Figure 3-7 the scenario depicts how long the driver could be activated in continuous mode till the thermal shutdown terminates operation. Operating conditions: PBoost PDriver PDriver Tamb Rthjc Rthca ca = 2.99W = 4.71W = 2.45W = 85°C = 10K/W = 34K/W = 125s Power dissipation of boost transistor at VS = 12V Power dissipation of driver stage at VS = 12V, active Power dissipation of driver stage at VS = 12V, send LF “0” data Ambient temperature Thermal resistance junction case of device Thermal resistance case-to-ambient (PCB) Thermal time constant of PCB (Rthca Cthca) Figure 3-6. Temperature Profile of Chip and PCB with Continuous Power Dissipation 10 ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 Figure 3-7. Close-up View of Figure 3-6 4. Appendix 4.1 How to Determine the Thermal Parameters of the PCB A key aspect of the thermal resistance is the thermal connection from the heat slug underneath the package (QFN44) soldered to the assembly copper plate and the heat sink through vias to the copper plate on the rear. Therefore, it is difficult to calculate in advance the size needed for the copper plate to achieve a given thermal resistance. The copper back plate of this board establishes the electrical ground and also serves as a heat sink. Its dimension is almost equivalent to the board size (80mm65mm). The thermal transportation through the board is achieved by 8 vias with a diameter of 0.3mm as shown in Figure 4-2. Figure 4-1. Assembly of Application Board ATAB5279 Figure 4-2. Heat Sink Ground Connection Plan of the ATAB5279 ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 11 4.2 Arrangement for Measuring the Thermal Parameters on PCB To define the thermal resistance Rthja of the PCB the ESD protection diode at the “NRES” pin is used for temperature detection within the chip. The diode is therefore powered by a DC constant current of 1mA and the resulting voltage drop over temperature is measured. The chip on board is heated by powering the boost transistor body diode by a constant DC current of 2A fed into the “VL” pin. The resulting voltage drop at the body diode detected at the VL pin indicates the dissipated power. The force/sense principle has to be used to obtain accurate measurements. Figure 4-3. Thermal Resistance Measurement on the ATAB5279 Application Board - - + + 2A V X4_1 D1 R1 + C2 L2 VBATT C1 8 to 16V 2 LD1 Q1 GND TP0 L1 X4_2 - - V D2 TP3 3 1mA + C6 + 4 1 1 7 8 44 46 VDS1 VDS2 X5 X1_12 VIF VIF 6 VDS3 Boost Transistor VIF C7 X1_14 PA4 X1_13 PA5 IRQ 41 PA6 MACT 9 X1_8 PA7 BCNT 10 X1_1 PB4/SS X1_5 PB7/SCK X1_2 PB5/MOSI X1_4 PB6/MISO A2P A3P IRQ A4P NRES 40 X1_9 A1P Body Diode S_CS 38 S_CLK 39 MOSI 37 MISO 36 NRES A5P NRES Diode A6P MACT A1N1 BCNT ATA5279 A1N2 QFN48 Package A2N1 S_CS A2N2 U1 A3N1 S_CLK A3N2 A4N1 MOSI A4N2 MISO A5N1 X1_11 A5N2 GND A6N1 A6N2 TP4 3 CINT RINT VSHF1 CINT VSHS AGND1 AGND3 PGND2 RGND AGND2 PGND1 PGND3 2 12 VSHF2 28 31 35 43 45 47 ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 + C4 48 VCC VS OSCO OSCI VL1 VL2 VL3 MCU ATmega 8515 TP1 C3 21 27 42 Antenna Measurement Board X3_1 Ant1 26 A1P 30 A2P 33 A3P TP1 29 A4P RANT(R1) 32 A5P CANT(C1) LANT A6P 34 Ce1 Ce2 Ce3 Ce4 Ce5 Ce6 24 25 Ce7 A1N Ce8 A2N Ce9 A3N 19 20 14 15 Ant6 22 23 Ce10 A4N Ce11 A5N Ce12 A6N 16 17 12 13 11 18 5 TP2 RSH X3_12 How to Determine the Thermal Resistance Rthca on a PCB When heating up the chip in combination with the board using the boost transistor’s body diode, the resulting on-chip temperature can be measured via VF of the NRES diode. The board is thus operated at a constant ambient temperature of 20°C using a climate chamber. However, it must be taken into account that the NRES diode is located at the edge of the chip close to the pin. This means the measured temperature is that of the case rather than of the chip. As a result, the thermal resistance determined here indicates the value of case to ambient (Rthca). The power dissipation on the body diode is given by: (1) PDissB = VFB IFB PDissB = 965mV 2A = 1.93W PDissB VFB IFB Power dissipation of body diode Forward voltage of body diode Forward current of body diode To calibrate the NRES reference diode the board is exposed to a temperature-controlled chamber recording VF (NRES) over temperature. Table 4-1. Temperature Dependency of NRES Diode Forward Voltage Temperature [°C] VF (NRES Diode) at 1mA [mV] 0 828 10 813 20 799 30 786 40 772 50 757 60 743 70 729 80 715 90 700 100 686 Figure 4-4. Temperature Dependency of Diode Voltage 850 Diode Forward Voltage (mV) 4.3 830 810 790 770 750 730 710 690 670 650 0 10 20 30 40 50 60 70 80 90 100 Temperature (°C) ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 13 Using the measurements in Table 4-1 on page 13 the temperature coefficient of the NRES reference diode is calculated as follows: 828 – 686 mV mV TC(NRES) = -------------------------------------- = 1.42 --------K 100K The resulting temperature coefficient TC(NRES) and the actual measured diode voltage are used to calculate the NRES diode temperature. (2) (3) 1 T X = ------- V D0 – V DX TC 1 T X = -------------------------- 799 – 707 mV = 64.78K mV 1.42 --------K TX T0 VD0 VDX Actual temperature rise Initial temperature Diode voltage at initial temperature T0 Diode voltage at actual temperature TX Using the on-chip power dissipation from equation (1) and the delta temperature rise equation (3) the entire thermal resistance of the board including the IC can be calculated according to equation (4). (4) 14 T X K 64.78K Rthja = ------------- = ----------------- = 33.56 ----W P Bdiss 1.93W ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 How to Measure the Thermal Time Constant as well as PCB Capacity Using the arrangement shown in Figure 4-3 on page 12 the chip temperature increase is recorded while the body diode of the boost transistor is heated up. To this end, the DSO oscilloscope measures the forward voltage VF of the NRES diode over time and creates a set of values that can be imported into an Excel spreadsheet. Figure 4-5 and Figure 4-6 show these measurements over time for both chip temperature increase and decrease. Figure 4-5. Increase of Chip Temperature 100 Tend = 87.2°C Temperature (°C) 90 80 70 τ(Tau) = 13.4s at 62.6°C 60 50 40 30 To = 20.8°C 20 0 20 40 60 80 100 120 140 160 180 200 Time (s) Figure 4-6. Decrease of Chip Temperature 100 To = 91.7°C 90 Temperature (°C) 4.4 80 70 60 τ(Tau) = 12.2s at 45.2°C 50 40 Tend = 20°C 30 20 10 0 20 40 60 80 100 120 140 160 180 200 Time (s) According to the physical rules, Tau ( = Rthjca Cthjca) is defined to be 63% of the final value of an exponential function. Since the board and device do have different thermal capacities, the exponential function is not ideal in the first ms range. From a long-term perspective, however, this can be disregarded. In addition, the difference in the resulting -values (see Figure 4-5 and Figure 4-6) is due to measurement inaccuracy. Theoretically it should be the same in both cases. ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 15 5. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. 16 Revision No. History 9168D-RKE-05/15 Put document in the latest template ATA5279C Application Guide [APPLICATION NOTE] 9168D–RKE–05/15 XXXXXX Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2015 Atmel Corporation. / Rev.: 9168D–RKE–05/15 Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. Other terms and product names may be trademarks of others. DISCLAIMER: The information in this document is provided in connection with Atmel products. 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