12 V to 1.45 V, 60 A Three–Phase Synchronous Buck Converter Demonstration Board for Northwood Processor http://onsemi.com DEMONSTRATION NOTE • • • • • Features • 1″ × 4.5″ Footprint • Three–Phase Architecture • Lossless Active Current Sharing • Lossless Adaptive Positioning 5–Bit DAC with 1% Tolerance 200 kHz Constant Frequency Design Hiccup Mode Current Limit Individual Current Limits for Each Phase Adaptable to Intel Voltage Transient Test (VTT) Tool Figure 1. CS5301 Demonstration Board Semiconductor Components Industries, LLC, 2002 January, 2002 – Rev. 1 1 Publication Order Number: CS5301DEMO/D CS5301DEMO/D ATX Connector VID0 VID1 VID2 VID3 VID4 ENABLE Unused ATX On 8 7 6 5 4 3 2 1 Power Supply 1″ × 4.5″ RETURN (Bottom) OUTPUT (Top) Figure 2. Layout MAXIMUM RATINGS (TA = 25°C) Input/Output Name Minimum Maximum Unit 5.0 V Input –0.3 7.0 V 12 V Input –0.3 14 V – Internally Limited A Output Current ELECTRICAL CHARACTERISTICS (TA = 25°C, Still Air, 4.75 V < 5.0 VIN < 5.25 V, 9.0 V < 12 VIN < 13.2 V) Parameter Test Conditions Min Typ Max Unit Output Voltage 3.0 A Load, DAC = 10000 – 1.45 – V Output Voltage 60 A Load, DAC = 10000 – 1.37 – V VOUT Peak Transient Response Step between 0 A and 60 A @ 400 A/µs – 80 – mVPK Output Ripple and Noise 60 A Load – 20 – mVP–P Current Sharing Between Phases Difference between the Phases with Highest and Lowest Current – 1.5 – A Conversion Efficiency from 12 V Supply 1.45 V, 60 A Out – 78 – % 5.0 V Supply Current – – 100 – mA Switching Frequency – – 200 – kHz Enable/Soft Start Time – – 5.0 – ms Overcurrent Threshold – – 65 – A 5.0 V UVLO Start – 4.05 4.6 4.7 V http://onsemi.com 2 CS5301DEMO/D ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C, Still Air, 4.75 V < 5.0 VIN < 5.25 V, 9.0 V < 12 VIN < 13.2 V) Parameter Test Conditions Min Typ Max Unit 5.0 V UVLO Stop – 3.75 4.4 4.65 V 5.0 V UVLO Hysteresis – 100 200 300 mV – 7.0 – V – – ±1.0 % 12 V UVLO Start/Stop 5.0 VIN Supply = 5.0 V VID Codes (VID Code Sets Max Output Voltage; 0 = Connected to VSS, 1 = Open or Pull–Up to 3.3 V) Accuracy (All Codes) Measure VFB = COMP VID4 VID3 VID2 VID1 VID0 1 1 1 1 1 Note 1. 1.064 1.075 1.086 V 1 1 1 1 0 Note 1. 1.089 1.100 1.111 V 1 1 1 0 1 Note 1. 1.114 1.125 1.136 V 1 1 1 0 0 Note 1. 1.139 1.150 1.162 V 1 1 0 1 1 Note 1. 1.163 1.175 1.187 V 1 1 0 1 0 Note 1. 1.188 1.200 1.212 V 1 1 0 0 1 Note 1. 1.213 1.225 1.237 V 1 1 0 0 0 Note 1. 1.238 1.250 1.263 V 1 0 1 1 1 Note 1. 1.262 1.275 1.288 V 1 0 1 1 0 Note 1. 1.287 1.300 1.313 V 1 0 1 0 1 Note 1. 1.312 1.325 1.338 V 1 0 1 0 0 Note 1. 1.337 1.350 1.364 V 1 0 0 1 1 Note 1. 1.361 1.375 1.389 V 1 0 0 1 0 Note 1. 1.386 1.400 1.414 V 1 0 0 0 1 Note 1. 1.411 1.425 1.439 V 1 0 0 0 0 – 1.436 1.450 1.465 V 0 1 1 1 1 – 1.460 1.475 1.490 V 0 1 1 1 0 – 1.485 1.500 1.515 V 0 1 1 0 1 – 1.510 1.525 1.540 V 0 1 1 0 0 – 1.535 1.550 1.566 V 0 1 0 1 1 – 1.559 1.575 1.591 V 0 1 0 1 0 – 1.584 1.600 1.616 V 0 1 0 0 1 – 1.609 1.625 1.641 V 0 1 0 0 0 – 1.634 1.650 1.667 V 0 0 1 1 1 – 1.658 1.675 1.692 V 0 0 1 1 0 – 1.683 1.700 1.717 V 0 0 1 0 1 – 1.708 1.725 1.742 V 0 0 1 0 0 – 1.733 1.750 1.768 V 0 0 0 1 1 – 1.757 1.775 1.793 V 0 0 0 1 0 – 1.782 1.800 1.818 V 0 0 0 0 1 – 1.807 1.825 1.843 V 0 0 0 0 0 – 1.832 1.850 1.869 V Input Threshold VID4, VID3, VID2, VID1, VID0 1.0 1.25 1.5 V Input Pull–Up Resistance VID4, VID3, VID2, VID1, VID0 25 50 100 kΩ 3.15 3.3 3.45 V Pull–Up Voltage – 1. Operation may require a lower (than 12 V) input voltage or a lower switching frequency. http://onsemi.com 3 CS5301DEMO/D CONTROL SWITCH DESCRIPTION S b l Symbol D Description i ti Output Low impedance connection for output voltage. Return Low impedance return for output voltage. SW1 Position 1–4 VID0–VID4. Place switch in the open position for “1.” If VTT tool is used to set the output voltage, place switches 1–4 in open position. SW1 Position 6 ENABLE converter function. This pin grounds the CS5301 COMP pin. Place this switch in the open position to enable the converter. SW1 Position 8 ATX ON function. Place this switch in the closed position to enable the ATX power supply. TEST SIGNAL DESCRIPTION S b l Symbol D Description i ti VCORE Output voltage of power supply. Gate(H)1–3 Gate drive signals for top MOSFETs of phases 1–3. Gate(L)1–3 Gate drive signals for bottom MOSFETs of phases 1–3. SW1–3 Switching nodes of phases 1–3. COMP Output of the error amplifier. PERGD Power good signal, pulled up to 5.0 V. VOUT(BNC) Output voltage of power supply. OPERATING INSTRUCTIONS Input Power low impedance connection for the converter output. The gold plated area on the solder side is a low impedance return connection. ATX Power Supply or separate +5.0 and +12 V supplies. The 12 V supply must be capable of supplying 12 A to power full load. Voltage Transient Test Tool Output Load The PGA–423 socket is intended to accept Intel Voltage Transient Test Tool. The converter will run with any load between 0 A and 60 A. The gold plated area on component side provides a http://onsemi.com 4 5 Figure 3. Circuit Schematic http://onsemi.com VID0 VID1 VID2 VID3 VID4 TP10 PWRGD 10 k R9 open R7 R8 30.1 k C12 10 nF C15 10 nF C14 open R12 30.1 k 1.91 k R6 3.09 k R5 COMP VFB VDRP CS1 CS2 CS3 CSREF PWRGD VID0 VID1 VID2 VID3 VID4 PWRGDS ILIM REF U1 C3 0.1 µF C5 1.0 µF C17 10 nF C10 0.1 µF ROSC VCCL VCCL1 Gate(L)1 GND1 Gate(H)1 VCCH12 Gate(H)2 GND2 Gate(L)2 VCCL2,3 Gate(L)3 GND3 Gate(H)3 VCCH3 LGND R10 1.0 Ω C7 1.0 µF C9 1.0 µF R13 30.1 k C6 1.0 µF C8 0.1 µF 69.8 k R4 D1 BAT54S TP3 GH1 D2 BAT54S Q1–Q6: NTB85N03 or NTB85N03T4 by ON Semiconductor C16 10 nF 10 k R3 C2 1.0 nF TP9 COMP R11 30.1 k C13 10 nF C11 open R2 100 k R1 22.1 k C4 470 pF C1 330 pF +5.0 V ENABLE TP2 +5.0 V R14 20 k TP1 +12 V CS5301 +12 V TP8 GL3 TP5 GH3 TP7 GL2 TP4 GH2 TP6 GL1 300 nH L1 Q6 Q5 Q4 Q3 Q2 Q1 + TP24 SW3 T23 SW2 TP22 SW1 + C18 16SP270M 600 nH TP19 GND TP18 GND TP17 GND TP16 GND TP15 GND TP14 GND TP13 GND TP21 VOUT Return TP20 VCORE C20 16SP270M L4 600 nH L3 600 nH L2 + C19 16SP270M CS5301DEMO/D 6 http://onsemi.com Figure 4. Circuit Schematic (continued) R17 20 k Q8 MMBT2222LT1 10 µF MBZ 1800 µF C69 C36 + 10 µF 10 µF C53 10 µF MBZ 1800 µF C68 C35 10 µF MBZ 1800 µF C67 C34 + R16 20 k 10 µF C52 10 µF MBZ 1800 µF C66 C33 + ENABLE +5.0 V 10 µF C51 +12 V 10 µF MBZ 1800 µF C65 C32 + Q7 MMBT2907LT1 10 µF C50 10 µF C49 10 µF MBZ 1800 µF C64 C31 + VID0 VID1 VID2 10 µF MBZ 1800 µF C63 C30 + R15 10 k 12 11 10 9 5 6 7 8 10 µF C48 10 µF C47 10 µF MBZ 1800 µF C62 C29 + VID3 VID4 10 µF MBZ 1800 µF C61 C28 + 16 15 14 13 ENABLE 10 µF C46 10 µF C45 10 µF MBZ 1800 µF C60 C27 10 µF MBZ 1800 µF C59 C26 10 µF MBZ 1800 µF C58 C25 + 1 2 3 4 S1 SW DIP–8 +12 V 10 µF MBZ 1800 µF C57 C24 + GND 1 GND 2 10 µF C44 10 µF C43 10 µF C42 10 µF C41 10 µF MBZ 1800 µF C56 C23 + 3 +12 V 4 +12 V +5.0 V 10 µF C40 + JP2 Header 2×2 9 10 5 6 7 8 1 2 3 4 10 µF MBZ 1800 µF C55 C22 C21 + +5.0 3.3 3.3 GND +5.0 GND +5.0 GND PWRGD 5.0 VSB +12 10 µF C39 C54 + 19 +5.0 20 –5.0 11 3.3 12 –12 13 GND 14 PSON 15 GND 16 GND 17 GND 18 JP1 Header 10×2_1 C38 + –12 V TP11 –12 V VOUT + 10 µF MBZ 1800 µF C37 + MBZ 1800 µF VID0 VID2 VID1 VID4 VID3 A1 A3 A5 A7 A9 A11 A13 A15 A17 A19 A21 A23 A25 A27 A29 A31 A33 A35 A37 A39 B2 B4 B6 B8 B10 B12 B14 B16 B18 B20 B22 B24 B26 B28 B30 B32 B34 B36 B38 C1 C3 C5 C7 C9 C11 C13 C15 C17 C19 C21 C23 C25 C27 C29 C31 C33 C35 C37 C39 U5 D2 D4 D6 D8 D10 D12 D14 D16 D18 D20 D22 D24 D26 D28 D30 D32 D34 D36 D38 E1 E3 E5 E7 E9 E11 E13 E15 E17 E19 E21 E23 E25 E27 E29 E31 E33 E35 E37 E39 F2 F4 F6 F8 F10 F12 F14 F16 F18 F20 F22 F24 F26 F28 F30 F32 F34 F36 F38 G1 G3 G5 G7 G9 G11 G13 G15 G17 G19 G21 G23 G25 G27 G29 G31 G33 G35 G37 G39 H2 H4 H6 H8 H36 H38 J1 J3 J5 J7 J35 J37 J39 K2 K4 K6 K8 K36 K38 L1 L3 L5 L7 L35 L37 L39 M2 M4 M6 M8 M36 M38 N1 N3 N5 N7 N35 N37 N39 U6 P2 P4 P6 P8 P36 P38 R1 R3 R5 R7 R35 R37 R39 T2 T4 T6 T8 T36 T38 U1 U3 U5 U7 U35 U37 U39 V2 V4 V6 V8 V36 V38 W1 W3 W5 W7 W35 W37 W39 Y2 Y4 Y6 Y8 Y36 Y38 AA1 AA3 AA5 AA7 AA35 AA37 AA39 AB2 AB4 AB6 AB8 AB36 AB38 AC1 AC3 AC5 AC7 AC35 AC37 AC39 AD2 AD4 AD6 AD8 AD36 AD38 AE1 AE3 AE5 AE7 AE35 AE37 AE39 AF2 AF4 AF6 AF8 AF36 AF38 AG1 AG3 AG5 AG7 AG35 AG37 AG39 AH2 AH4 AH6 AH8 AH36 AH38 AJ1 AJ3 AJ5 AJ7 AJ35 AJ37 AJ39 AK2 AK4 AK6 AK8 AK36 AK38 AL1 AL3 AL5 AL7 AL35 AL37 AL39 U7 AM2 AM4 AM6 AM8 AM36 AM38 AN1 AN3 AN5 AN7 AN35 AN37 AN39 AP2 AP4 AP6 AP8 AP10 AP12 AP14 AP16 AP18 AP20 AP22 AP24 AP26 AP28 AP30 AP32 AP34 AP36 AP38 AR1 AR3 AR5 AR7 AR9 AR11 AR13 AR15 AR17 AR19 AR21 AR23 AR25 AR27 AR29 AR31 AR33 AR35 AR37 AR39 AT2 AT4 AT6 AT8 AT10 AT12 AT14 AT16 AT18 AT20 AT22 AT24 AT26 AT28 AT30 AT32 AT34 AT36 AT38 AU1 AU3 AU5 AU7 AU9 AU11 AU13 AU15 AU17 AU19 AU21 AU23 AU25 AU27 AU29 AU31 AU33 AU35 AU37 AU39 PGA423D PGA423C PGA423B PGA423A AV2 AV4 AV6 AV8 AV10 AV12 AV14 AV16 AV18 AB20 AV22 AV24 AV26 AV28 AV30 AV32 AV34 AV36 AV38 AW1 AW3 AW5 AW7 AW9 AW11 AW13 AW15 AW17 AW19 AW21 AW23 AW25 AW27 AW29 AW31 AW33 AW35 AW37 AW39 U8 VOUT CS5301DEMO/D CS5301DEMO/D TYPICAL PERFORMANCE CHARACTERISTICS Ch1, Output Voltage, VOUT, 100 mV/div; Ch2, Gate Drive, Gate(H)1, 10 V/div; Ch3, Gate Drive, Gate(H)2, 10 V/div; Ch4, Gate Drive, Gate(H)3, 10 V/div Ch1, Output Voltage, VOUT, 500 mV/div; Ch2, Error Amplifier Output, COMP, 500 mV/div; Ch4, Load Current, IO, 10 A/div Figure 5. Start–Up with Full Load Figure 6. Steady State at Full Load, IO = 60 A Ch1, Output Voltage, VOUT, 100 mV/div; Ch2, Gate Drive, Gate(H)1, 10 V/div; Ch3, Gate Drive, Gate(H)2, 10 V/div; Ch4, Gate Drive, Gate(H)3, 10 V/div Ch1, Output Voltage, VOUT, 100 mV/div; Ch2, Gate Drive, Gate(H)1, 10 V/div; Ch3, Gate Drive, Gate(H)2, 10 V/div; Ch4, Load Current, IO, 50 A/div Figure 7. Steady State at No Load Figure 8. Transient with Pulse Load, between 0 A and 60 A http://onsemi.com 7 CS5301DEMO/D TYPICAL PERFORMANCE CHARACTERISTICS Ch1, Output Voltage, VOUT, 100 mV/div; Ch2, Gate Drive, Gate(H)1, 10 V/div; Ch3, Gate Drive, Gate(H)2, 10 V/div; Ch4, Load Current, IO, 50 A/div Ch1, Output Voltage, VOUT, 100 mV/div; Ch2, Gate Drive, Gate(H)1, 10 V/div; Ch3, Gate Drive, Gate(H)2, 10 V/div; Ch4, Load Current, IO, 50 A/div Figure 9. Transient with Step Load, 0 A to 60 A, Slew Rate, 400 A/ms Figure 10. Transient with Step Load, 60 A to 0 A, Slew Rate, 400 A/ms 100 88 90 86 80 Temperature (°C) Efficiency (%) 84 82 80 78 70 60 L4 50 40 Q5 30 Q6 20 76 74 10 5 10 15 20 25 30 35 40 Load Current (A) 45 50 55 0 60 0 Figure 11. Conversion Efficienty from 12 V to 1.45 V 5 10 15 20 25 30 35 40 Load Current (A) 45 50 Figure 12. Component Temperature http://onsemi.com 8 55 60 CS5301DEMO/D BILL OF MATERIALS Qty Reference Part Mfg. & P/N Distributor Converter 1 C1 cer, 330 pF, 50 V, 0805 Panasonic ECU–V1H331KBN Digi–Key 1 C2 cer, 1.0 nF, 50 V, 0805 Panasonic ECU–V1H102KBN Digi–Key 2 C3, 10 cer, 0.1 µF, 50 V, 0805 Panasonic ECJ–2YB1H104K Digi–Key 1 C4 cer, 470 pF, 50 V, 0805 Panasonic ECU–V1H471KBN Digi–Key 4 C5, 6, 8, 9 cer, 1.0 µF, 25 V, 0805 Panasonic Digi–Key 1 C7 cer, 1.0 µF, 25 V, 1206 Panasonic ECJ–3YB1E105K Digi–Key 2 C11, C14 (optional) 5 C12, 13, 15, 16, 17 cer, 0.01 µF, 50 V, 0805 Panasonic ECU–V1H103KBG Digi–Key 3 C18, 19, 20 Capacitor, 16 V, 270 µF Sanyo 16SP270M Sanyo 630–775–0044 15 C21–35 (C36, 37 optional) Capacitor, 1800 µF, 6.5 V Rubycon MBZ 1800 µF, 6.5 V Sanyo 12 C38–43, 46–51 (C44, 45, 52–69 optional) cer, 10 µF, 6.3 V, 1206 TDK C3216JB0106M TDK 603–886–6600 2 D1, 2 Dual Schottky BAT54S Digi–Key 1 L1 Inductor, 300 nH Micrometals T30–26 or 3T of #16AWG Coiltronics 561–241–7876 CTX15–14771 3 L2, 3, 4 Inductor, 600 nH 6 Q1, 2, 3, 4, 5, 6 1 – – – – – MOSFET ON Semiconductor NTB85N03 or NTB85N03T4 ON Semiconductor Q7 PNP MMBT2907LT1 Newark 800–463–9275 1 Q8 NPN MMBT2222LT1 Newark 1 R1 res, 22.1 k, 0805 – Digi–Key 1 R2 res, 100 k, 0805 – Digi–Key 3 R3, R9, R15 res, 10 k, 0805 – Digi–Key 1 R4 res, 69.8 k, 0805 – Digi–Key 1 R5 res, 3.09 k, 0805 – Digi–Key 1 R6 res, 1.91 k, 0805 – Digi–Key 1 R7 (optional) 4 R8, 11, 12, 13 res, 30.1 k, 0805 – Digi–Key 1 R10 res, 1.0 Ω, 0805 – Digi–Key 3 R14, 16, 17 res, 20 k, 0805 – Digi–Key 1 U1 – – – Three–Phase Controller CS5301 ON Semiconductor Standoff 3M SJ5003–0–ND Digi–Key DIP–8 DAC Switch Grayhill 76PSB08S Digi–Key Miscellaneous 6 – 1 S1 24 TP1–24 36 Pos. Header Sullins PZC36SAAN Digi–Key 1 JP1 ATX Connector Molex 039281203 Newark 1 JP2 ATX 12 V Connector Molex 039293046 Newark 1 J1 BNC, PCB Socket Multicomp Farnell 1 U5 CPU Socket, PGA 423 – http://onsemi.com 9 – CS5301DEMO/D ( ) PCB LAYOUT Figure 13. Component and Top Layer http://onsemi.com 10 ( ) CS5301DEMO/D Figure 14. Ground Layer http://onsemi.com 11 ( ) CS5301DEMO/D Figure 15. Mid Layer http://onsemi.com 12 ( ) CS5301DEMO/D Figure 16. Bottom Layer http://onsemi.com 13 ( ) CS5301DEMO/D Figure 17. Component Location http://onsemi.com 14 CS5301DEMO/D Notes http://onsemi.com 15 CS5301DEMO/D Intel is a registered trademark of Intel Corporation. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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