Data Sheet

BGA7204
400 MHz to 2750 MHz high linearity variable gain amplifier
Rev. 3 — 28 January 2013
Product data sheet
1. Product profile
1.1 General description
The BGA7204 MMIC is an extremely linear Variable Gain Amplifier (VGA), operating from
0.4 GHz to 2.75 GHz. At minimum attenuation it has a gain of 18.5 dB, an output
third-order intercept point (IP3O) of 38 dBm and a noise figure of 7 dB. The attenuation
range is 31.5 dB with an attenuation step of 0.5 dB.
The gain control is offered through a digital parallel interface or a digital serial interface
(SPI). The digital serial interface offers advanced features like reprogramming the
attenuation curve and on-chip temperature monitoring. The interfaces can be combined to
support response to fast fading. The serial interface can be used to pre-set the desired
gain level, whereas the parallel interface can be used to select this gain setting in 0.15 s.
It has been designed and qualified for the severe mission profile of cellular base stations,
but its outstanding RF performance and interfacing flexibility makes it suitable for a wide
variety of applications.
The BGA7204 is housed in a 32 pins 5 mm  5 mm leadless HVQFN package.
1.2 Features and benefits











High output third-order intercept point (IP3O) of 38 dBm
Attenuation range of 31.5 dB
Output power at 1 dB compression of 21 dBm
Noise figure of 7 dB at minimum attenuation
Single 5 V supply
Digital parallel and digital serial control (SPI)
Programmable attenuation curve
Temperature sensor
ESD protection on all pins (HBM > 2 kV)
Moisture sensitivity level 1
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications




IF and RF applications
WiMAX and cellular base stations
Cable modem termination systems
Temperature compensation circuits
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
1.4 Quick reference data
Table 1.
Quick reference data
4.75 V  VSUP  5.25 V; f = 400 MHz to 2750 MHz; 40 C  Tamb  +85 C; input and output are terminated with 50 ,
unless otherwise specified.
Symbol
Parameter
VSUP
supply voltage
ICC(tot)
total supply current
Tamb
ambient temperature
Gp
power gain
range
attenuation step
NF
noise figure
PL(1dB)
Max
Unit
4.75
5.0
5.25
V
PWRDN = 0
-
115
133
mA
PWRDN = 1
-
15
-
mA
40
+25
+85
C
400 MHz  f  1450 MHz
16
18.5
21
dB
1450 MHz  f  2100 MHz
15
17.5
20
dB
2100 MHz  f  2750 MHz
14
16.5
19
dB
400 MHz  f  1450 MHz
29
31.5
34
dB
1450 MHz  f  2100 MHz
28
30.5
33
dB
2100 MHz  f  2750 MHz
27
30.0
33
dB
0
0.5
1
dB
400 MHz  f  700 MHz
-
7
9.5
dB
700 MHz  f  2100 MHz
-
6.5
9
dB
2100 MHz  f  2750 MHz
-
7.0
10
dB
minimum attenuation
minimum attenuation
output power at 1 dB gain compression
[1]
Absolute maximum DC voltage on pin RF_OUT and VDD.
[2]
f = 1 MHz; Pi = 12 dBm per tone.
Product data sheet
Typ
minimum attenuation
output third-order intercept point
BGA7204
Min
[1]
attenuation range
step
IP3O
Conditions
400 MHz  f  700 MHz
[2]
34
38
-
dBm
700 MHz  f  1450 MHz
[2]
33
37.5
-
dBm
1450 MHz  f  2100 MHz
[2]
31
36
-
dBm
2100 MHz  f  2750 MHz
[2]
28.5
34
-
dBm
400 MHz  f  1450 MHz
19
21
-
dBm
1450 MHz  f  2100 MHz
18
20.5
-
dBm
2100 MHz  f  2750 MHz
17.5
20
-
dBm
minimum attenuation
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
2 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
2. Pinning information
GND
1
24 PSCONFIG
GND
2
23 D0
GND
3
22 D1
GND
4
n.c.
5
n.c.
6
19 D4
SPICONFIG
7
18 D5
PWRDN
8
17 VDD
21 D2
PUP1 16
20 D3
PUP2 15
SER_OUT 14
GND 13
ATT_IN 12
GND 11
9
GND
GND 10
BGA7204
Transparent top view
Fig 1.
25 CLK
26 SER_IN
27 LE/SS
28 GND
29 AMP_OUT
30 GND
terminal 1
index area
31 GND
32 GND
2.1 Pinning
aaa-001426
Pin configuration
2.2 Pin description
Table 2.
BGA7204
Product data sheet
Pin description
Symbol
Pin
Description
GND
1, 2, 3, 4, 9, 10, 11, 13, 28, 30, 31, 32
Ground
n.c.
5, 6
not connected
SPICONFIG
7
set SPI mode [1]
PWRDN
8
power-down RF section [2]
ATT_IN
12
RF input to attenuator
SER_OUT
14
SPI data output
PUP2
15
power-up control 2
PUP1
16
power-up control 1
VDD
17
supply voltage
D5
18
attenuation control word [3]
D4
19
attenuation control word [3]
D3
20
attenuation control word [3]
D2
21
attenuation control word [3]
D1
22
attenuation control word [3]
D0
23
attenuation control word [3]
PSCONFIG
24
set digital gain control mode [4]
CLK
25
SPI clock input
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
3 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
Table 2.
Pin description …continued
Symbol
Pin
Description
SER_IN
26
SPI data input
LE/SS
27
latch enable or slave select [5]
AMP_OUT
29
RF output of amplifier
GND
GND paddle
exposed die pad
[1]
0 = extended; 1 = basic; unconnected pulled up.
[2]
0 = enabled; 1 = disabled; unconnected pulled down.
[3]
D5 = MSB; D0 = LSB; unconnected pulled down.
[4]
0 = parallel; 1 = SPI; unconnected pulled down.
[5]
parallel = LE; SPI = SS (active LOW); unconnected pulled up.
3. Ordering information
Table 3.
Ordering information
Type number Package
BGA7204
Name
Description
Version
HVQFN32
plastic thermal enhanced very thin quad flat package;
no leads; 32 terminals; body 5  5  0.85 mm
SOT617-3
4. Marking
Table 4.
BGA7204
Product data sheet
Marking
Type number
Marking code
BGA7204
7204
Description
*****
manufacturing code
TSSyww
yww = The actual assembly date code.
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
4 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Min
Max
Unit
supply voltage
[1]
0.6
+8
V
VI
input voltage
[2]
0.6
+8
V
VO
output voltage
[3]
0.6
+8
V
input current
[4]
20
+20
mA
IO
output current
[5]
20
+20
mA
Tstg
storage temperature
65
+150
C
Tj
junction temperature
-
150
C
Pi(RF)(ATT_IN)
RF input power on pin ATT_IN
-
30
dBm
VESD
electrostatic discharge voltage
Human Body Model (HBM);
According JEDEC standard 22-A114E
-
4
kV
Charged Device Model (CDM);
According JEDEC standard 22-C101B
-
2
kV
VSUP
II
[1]
Parameter
Conditions
Absolute maximum DC voltage on pin RF_OUT and VDD.
[2]
Absolute maximum DC voltage on pin SPICONFIG, PWRDN, D5, D4, D3, D2, D1, D0, PSCONFIG, CLK, SER_IN and LE/SS.
[3]
Absolute maximum DC voltage on pin SER_OUT.
[4]
Absolute maximum DC current through pin SPICONFIG, PWRDN, D5, D4, D3, D2, D1, D0, PSCONFIG, CLK, SER_IN and LE/SS.
[5]
Absolute maximum DC current through pin SER_OUT.
6. Thermal characteristics
Table 6.
Thermal characteristics
Symbol
Parameter
Conditions
thermal resistance from junction to solder point
Tsp  85 C
Rth(j-sp)
[1]
[1]
Typ
Unit
10
K/W
Tsp is the temperature at the solder point.
7. Static characteristics
Table 7.
Symbol
Static characteristics
Parameter
Conditions
VSUP
supply voltage
ICC(tot)
total supply current
Tamb
ambient temperature
IDD
supply current
Min
Typ
Max
Unit
4.75
5.0
5.25
V
PWRDN = 0
-
115
133
mA
PWRDN = 1
-
15
-
mA
40
+25
+85
C
PWRDN = 0
-
43
-
mA
PWRDN = 1
-
15
-
mA
PWRDN = 0
-
72
-
mA
PWRDN = 1
-
0.05
-
mA
[1]
on pin VDD
on pin AMP_OUT
BGA7204
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
5 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
Table 7.
Static characteristics …continued
Symbol
Parameter
Min
Typ
Max
Unit
VIL
LOW-level input voltage
[2]
0.1
0
+0.8
V
VIH
HIGH-level input voltage
[2]
2
3.3
VSUP +
0.1
V
VOL
LOW-level output voltage
[3]
0.1
0
+0.8
V
VOH
HIGH-level output voltage
[3]
2.5
3.3
3.4
V
IOL
LOW-level output current
[3]
4
-
-
mA
HIGH-level output current
[3]
-
-
4
mA
IOH
Conditions
[1]
Supply voltage on pin RF_OUT and VDD.
[2]
Digital input pins are: SPICONFIG, PWRDN, PUP2, PUP1, D5, D4, D3, D2, D1, D0, PSCONFIG, CLK,
SER_IN and LE/SS.
[3]
Digital output pins are: SER_OUT.
8. Dynamic characteristics
Table 8.
Dynamic characteristics
4.75 V  VSUP  5.25 V; f = 400 MHz to 2750 MHz; 40 C  Tamb  +85 C; input and output are terminated with 50 ;
unless otherwise specified.
Symbol
Parameter
Conditions
Gp
power gain
minimum attenuation
range
step
attenuation range
Min
Typ
Max
Unit
400 MHz  f  1450 MHz
16
18.5
21
dB
1450 MHz  f  2100 MHz
15
17.5
20
dB
2100 MHz  f  2750 MHz
14
16.5
19
dB
400 MHz  f  1450 MHz
29
31.5
34
dB
1450 MHz  f  2100 MHz
28
30.5
33
dB
2100 MHz  f  2750 MHz
27
30.0
33
dB
0
0.5
1
dB
attenuation step
Gp
power gain variation
2.0
-
+2.0
dB
Gp(flat)
power gain flatness
minimum attenuation;
per 100 MHz
-
-
0.4
dB
RLin
input return loss
400 MHz  f  2750 MHz
10
-
-
dB
8
-
-
dB
400 MHz  f  700 MHz
-
7
9.5
dB
700 MHz  f  2100 MHz
-
6.5
9
dB
2100 MHz  f  2750 MHz
-
7.0
10
dB
[1]
RLout
output return loss
400 MHz  f  2750 MHz
NF
noise figure
minimum attenuation
IP3O
output third-order intercept point
BGA7204
Product data sheet
minimum attenuation
400 MHz  f  700 MHz
[2]
34
38
-
dBm
700 MHz  f  1450 MHz
[2]
33
37.5
-
dBm
1450 MHz  f  2100 MHz
[2]
31
36
-
dBm
2100 MHz  f  2750 MHz
[2]
28.5
34
-
dBm
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
6 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
Table 8.
Dynamic characteristics …continued
4.75 V  VSUP  5.25 V; f = 400 MHz to 2750 MHz; 40 C  Tamb  +85 C; input and output are terminated with 50 ;
unless otherwise specified.
Symbol
Parameter
Conditions
PL(1dB)
output power at 1 dB gain compression
minimum attenuation
[1]
Normalized to maximum gain and attenuation; see Figure 2.
[2]
f = 1 MHz; Pi = 12 dBm per tone.
Min
Typ
Max
Unit
400 MHz  f  1450 MHz
19
21
-
dBm
1450 MHz  f  2100 MHz
18
20.5
-
dBm
2100 MHz  f  2750 MHz
17.5
20
-
dBm
Attenuation relative to actual max. gain
Attenuation accuracy αacc relative to
linear attenuation of the range ∆α
Attenuation range ∆α
Linear attenuation
0
3
7
11
15
19
23
27
31
35
39
43
47
51
55
59
63
Attenuation setting D0 ... D5
aaa-001427
Fig 2.
Attenuation accuracy definitions
9. Interface timing characteristics
PARALLEL
D0...D5
SS/LE
tsu
Fig 3.
BGA7204
Product data sheet
th
aaa-001428
Timing diagram latched parallel mode
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
7 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
CLK
SER_IN/
SER_OUT
D5
D4
D3
D2
D1
D0
tsu
th
SS/LE
tu(SS)
Fig 4.
th(SS)
aaa-001429
Timing basic SPI mode
CLK
SER_IN/
SER_OUT
C7
C6
C5
C4
C3
C2
C1
R/W
C0
D6
D5
D3
D4
D2
D0
D1
tsu
th
SS/LE
tu(SS)
Fig 5.
Table 9.
th(SS)
aaa-001430
Timing extended SPI mode
Interface timing characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSPI
SPI frequency
-
-
10
MHz
fintf(par)
parallel interface frequency
-
-
2
MHz
tsu
set-up time
-
10
-
ns
th
hold time
-
10
-
ns
tsu(SS)
set-up time on pin SS
-
10
-
ns
th(SS)
hold time on pin SS
-
0
-
ns
10. Control modes
10.1 Interface operating principles
ATTENUATOR
°C
parallel interface
64 X 6 bit LUT
SPI
SPI
aaa-001431
Fig 6.
BGA7204
Product data sheet
Interface operating principles
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
8 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
Table 10.
Control modes, control options and features
Control pin configuration
Parallel
Basic SPI
Extended SPI
PSCONFIG (pin 24)
0
1
1
SPICONFIG (pin 7)
don’t care
1
0
Control features
Parallel
Basic SPI
Extended SPI
6 bits digital control
Yes
Yes
Yes
programmable attenuation curve
No
[1]
No
[1]
Yes
junction temperature read out
No
No
Yes
enable over-temperature protection
No
No
Yes
disable attenuator block
No
No
Yes
disable amplifier block
No
No
Yes
chip type read-out
No
No
Yes
chip version read-out
No
No
Yes
reset
No
No
Yes
daisy chaining multiple VGAs
No
Yes
No
[1]
One could however switch to the SPI extended mode, reprogram the attenuation curve and switch back to
the digital parallel or SPI basic control mode.
10.2 Attenuation truth table
Table 11. Attenuation control truth table
Factory setting of look-up table; major states only.
Attenuation control word
Typical attenuation at 700 MHz
D5
D4
D3
D2
D1
D0
16 dB
8 dB
4 dB
2 dB
1 dB
0.5 dB
1
1
1
1
1
1
0 dB
1
1
1
1
1
0
0.5 dB
1
1
1
1
0
1
1 dB
1
1
1
0
1
1
2 dB
1
1
0
1
1
1
4 dB
1
0
1
1
1
1
8 dB
0
1
1
1
1
1
16 dB
0
0
0
0
0
0
31.5 dB
10.3 Parallel control mode
The parallel input is connected internally to a latch. If LE/SS (pin 27) is logical HIGH the
attenuation control word D5 to D0 is transferred to the attenuator register and the
attenuator assumes the new attenuation setting. Upon a negative edge of LE/SS (pin 27)
the actual attenuation control word will be hold: any changes in the control word at the
parallel interface will be ignored. The timing is depicted in Figure 7.
BGA7204
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
9 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
LE/SS
N1
D5-D0
ATTENUATION
N2
PUP
N3
N1
N2
hold
N4
N5
N3
N4
transparant
aaa-001432
Fig 7.
Timing diagram in parallel mode
LE/SS (pin 27) is provided with an internal pull-up resistor and can be left unconnected.
10.4 Basic SPI mode
In the Basic SPI mode the attenuator register is loaded via the SPI interface.
Table 12.
SPI commands for basic mode: PSCONFIG (pin 24) = 1; SPICONFIG (pin 7) = 1
Control word [1]
D5
D4
D3
D2
D1
D0
Default attenuation
16 dB
8 dB
4 dB
2 dB
1 dB
0.5 dB
[1]
D5 to D0 (bit 5 to 0) form the attenuation selecting word (address of the look-up table).
Figure 4 depicts the timing diagram of SPI data format in the basic SPI mode. The data is
clocked into a 6-bit shift register. This mode also allows daisy chaining of multiple chips.
Figure 8 shows a configuration of two VGAs in daisy chain. Data word D5 to D0 is stored
in Attenuator 1, while data word E5 to E0 is stored in Attenuator 0. On the rising edge of
LE/SS (pin 27), the data is captured and stored in the attenuator register. At the same
moment the stored words become active on the attenuator outputs.
CLK
LE/SS
SER_IN 0
D5
D4
D3
D2
D1
D0
SER_OUT 0 = SER_IN 1
E5
E4
E3
E2
E1
E0
D5
D4
D3
D2
D1
D0
ATTENUATION 0
E
ATTENUATION 1
D
D
E
SER_IN 0
BGA7204
(0)
SER_OUT 0
SER_IN 1
BGA7204
(1)
SER_OUT 1
LE/SS
CLK
aaa-001433
Fig 8.
BGA7204
Product data sheet
Timing diagram of SPI in basic mode
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
10 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
10.5 Extended SPI mode
Table 13. SPI commands for extended mode: PSCONFIG (pin 24) = 1; SPICONFIG (pin 7) = 0
Bit 7 is used to indicate whether it is a read operation (bit 7 = 1) or a write operation (bit 7 = 0). In case of a read operation the
logic state of bits 0 to 6 don't care for the data from the master to the slave. The bits are updated by the slave.
Command
Attenuation [1]
Temperature status [2]
Temperature configuration
[3]
[4]
Data
6
Reset value
15 14 13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
rw 0
D5 D4
5
D3 D2 D1
D0 0x00
0
0
0
1
0
0
0
0
1
0
D3 D2 D1
D0 0x8-
0
0
0
1
0
0
0
1
rw RF PG MG D3 D2 D1
D0 0x00
1
0
0
0
0
rw 0
0
4
3
0
1
0
1
0
C5 C4 C3 C2 C1 C0 rw 0
D5 D4
D3 D2 D1
D0 N/A
Chip type [6]
1
1
1
0
0
0
0
0
0
0
1
0
0
0
0
1
0
1
Program LUT / attenuation
curve [5]
Enable
0
2
0
AT AM TS 0x3F
1
0
0x84
[1]
D0 to D5 (bit 5 to 0) forms the attenuation selecting word (address of the look-up table).
[2]
D3 to D0 (bit 3 to 0) forms the temperature read out word.
[3]
D3 to D0 (bit 3 to 0) forms the temperature threshold for the temperature protection. Next to the temperature, RF, PG or MG is selected
(mutual exclusive). In case RF is selected the RF part of the chip will switch off if the threshold is exceeded. If PG is selected the
attenuator will switch to the attenuation gain that is configured with the PUPn pins if the threshold is exceeded. If MG is selected the
attenuation gain will drop to a minimum value if the threshold is exceeded.
[4]
TS (bit 0) enables the temperature sensor, AM (bit 1) enables the amplifier and AT (bit 2) enables the attenuator.
[5]
D5 to D0 (bit 5 to 0) forms the attenuation control word to be programmed at address C5 to C0 (bit 13 to 8). After reset the curve is
linear: D5 to D0 = C5 to C0 for all attenuation states.
[6]
Returns 04: 4 bits for third digit (0000 = 0) and 4 bits for the last digit (0010 = 2) of the chip type.
Figure 9 depicts the timing diagram of SPI data write format in extended mode. The first
8 bits indicate the command. The first data bit indicates if it is a read or write action. In
case of a read action, the data bits on pin SER_OUT (pin 14) are replaced with the read
value.
CLK
LE/SS
SER_IN
C7
C6
C5
C4
C3
C2
C1
C0
R/W
D6
D5
D4
D3
D2
D1
D0
SER_OUT
C7
C6
C5
C4
C3
C2
C1
C0
R/W
D6
D5
D4
D3
D2
D1
D0
command
data
aaa-001434
Fig 9.
Timing diagram of SPI in extended mode
10.6 Temperature sensor
In the extended SPI mode the temperature sensor can be read out. The temperature
sensor is located close to the amplifier junctions. The temperature coding is listed in
Table 14.
BGA7204
Product data sheet
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
11 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
Table 14. Temperature ranges
The overlap between ranges reflects the inaccuracy of the temperature sensor.
Tj (C)
D3
D2
D1
D0
< 15
0
0
0
0
35 to +5
0
0
0
1
15 to +35
0
0
1
0
15 to 80
0
0
1
1
60 to 110
0
1
0
0
90 to 130
0
1
0
1
110 to 140
0
1
1
0
120 to 150
0
1
1
1
130 to 160
1
0
0
0
> 140
1
0
0
1
10.7 Power-up states
The VGA is provided with power-up program pins. These pins configure the attenuation
after start-up (see Table 15) depending on how LE/SS (pin 27) and PSCONFIG (pin 24)
are configured at start-up (see Table 16).
Table 15.
Power-up configuration
PUP2 (pin 15)
PUP1 (pin 16)
Attenuator gain at 700 MHz
0
0
31.5 dB
0
1
24 dB
1
0
16 dB
1
1
0 dB
Table 16.
Power-up states
LE/SS (pin 27)
PSCONFIG (pin 24)
Power up state defined by
0
don’t care
power-up program pins (PUP2 and PUP1) [1]
1
0
D5 to D0 (bit 5 to 0)
1
1
power-up program pins (PUP2 and PUP1) [1]
[1]
See Table 15.
The attenuation gain remains valid until it is updated with the parallel interface or SPI
interface.
10.8 Power-on sequence
Digital inputs (SPICONFIG, PWRDN, PUP2, PUP1, D5, D4, D3, D2, D1, D0, PSCONFIG
and LE/SS) should be powered simultaneously or after VDD and GND are powered (see
also Table 5). This prevents damage to the ESD protection diodes of the digital input. If
the digital inputs need to be powered before VDD is powered measures should be taken to
limit the current to 20 mA, e.g. by means of an external resistor.
BGA7204
Product data sheet
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
12 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
11. Application information
11.1 Application board
A customer application board is available from NXP upon request. It includes USB
interface circuitry and customer software to facilitate evaluation of the BGA7204.
The final application shall be decoupled as depicted in Figure 10. The ground leads and
exposed paddle should be connected directly to the ground plane. Enough via holes
should be provided to connect the top and bottom ground planes in the final application
board. Sufficient cooling should be provided that the temperature of the exposed die pad
does not exceed 85 C.
VSUP
C4
SPICONFIG
C5
PWRDN
8
C6
7
IC1
L1
°C
C1
12
SER_OUT
14
PUP2
15
PUP1
16
C7
29
CONTROLLER
27
LE/SS
26
SER_IN
25
CLK
17 18 19 20 21 22 23 24
VDD
D5 D4 D3 D2 D1 D0
PSCONFIG
C2
C3
VSUP
aaa-001435
See Table 17 for list of components.
Fig 10. Customer evaluation board
Table 17. List of components
See Figure 10 for schematics.
BGA7204
Product data sheet
Component
Description
Value
Supplier
C1
capacitor
100 pF
various
C2
capacitor
330 nF
various
C3
capacitor
100 pF
various
C4
capacitor
100 nF
various
C5
capacitor
100 pF
various
C6
capacitor
4.7 F
various
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© NXP B.V. 2013. All rights reserved.
13 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
Table 17. List of components …continued
See Figure 10 for schematics.
Component
Description
Value
Supplier
C7
capacitor
100 pF
various
IC1
BGA7204
L1
choke
NXP
47 nH
11.2 Characteristics
aaa-001436
20
S21
(dB)
aaa-001437
25
(1)
(2)
(3)
S21
(dB)
18
15
(4)
(5)
(6)
16
5
(1)
(2)
(3)
(7)
14
-5
12
-15
10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
(8)
-25
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
VSUP = 5 V; Tamb = 25 C.
VSUP = 5 V.
(1) Tamb = 40 C
(1) attenuation = 63 (0x3F, minimum)
(2) Tamb = +25 C
(2) attenuation = 62 (0x3E)
(3) Tamb = +85 C
(3) attenuation = 61 (0x3D)
(4) attenuation = 59 (0x3B)
(5) attenuation = 55 (0x37)
(6) attenuation = 47 (0x2F)
(7) attenuation = 31 (0x1F)
(8) attenuation = 00 (0x00, maximum)
Fig 11. Maximum power gain as a function of
frequency; typical values
BGA7204
Product data sheet
Fig 12. Power gain as a function of frequency; typical
values
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14 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
aaa-001438
25
S21
(dB)
aaa-001439
0.8
gain step size
(dB)
(1)
(2)
15
(3)
0.6
5
(1)
(2)
(3)
(4)
(5)
-5
0.4
(4)
(5)
0.2
-15
0.0
-25
0
16
32
48
64
attenuation (decimal)
VSUP = 5 V; Tamb = 25 C.
0
16
(1) f = 0.4 GHz
(2) f = 0.7 GHz
(2) f = 0.7 GHz
(3) f = 1.45 GHz
(3) f = 1.45 GHz
(4) f = 2.10 GHz
(4) f = 2.10 GHz
(5) f = 2.75 GHz
(5) f = 2.75 GHz
Fig 13. Power gain as a function of attenuation state
(63 = minimum attenuation); typical values
Product data sheet
48
64
attenuation (decimal)
VSUP = 5 V; Tamb = 25 C.
(1) f = 0.4 GHz
BGA7204
32
Fig 14. Gain step size as a function of attenuation
state (63 = minimum attenuation);
typical values
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
15 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
aaa-001440
35
∆Gp
(dB)
aaa-001441
1.4
accuracy
(dB)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
33
0.6
31
-0.2
(1)
(2)
(3)
29
-1.0
27
25
0.0
-1.8
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
0
16
32
48
64
attenuation (decimal)
VSUP = 5 V; Tamb = 25 C.
VSUP = 5 V.
(1) Tamb = 40 C
(1) f = 0.4 GHz; range = 31.5 dB
(2) Tamb = +25 C
(2) f = 0.7 GHz; range = 31.5 dB
(3) f = 1.45 GHz; range = 31.5 dB
(3) Tamb = +85 C
(4) f = 1.45 GHz; range = 30.5 dB
(5) f = 2.10 GHz; range = 30.5 dB
(6) f = 2.10 GHz; range = 30.0 dB
(7) f = 2.75 GHz; range = 30.5 dB
Fig 15. Power gain range as a function of frequency;
typical values
BGA7204
Product data sheet
Fig 16. Relative power gain accuracy as a function of
attenuation state (63 = minimum attenuation);
typical values
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© NXP B.V. 2013. All rights reserved.
16 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
aaa-001442
70
relative phase
(deg)
aaa-001443
0
S11
(dB)
(8)
-5
50
-10
30
(7)
-15
(1)
(2)
(3)
(6)
10
-20
(5)
(1) (2) (3) (4)
-10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
VSUP = 5 V; Tamb = 25 C.
-25
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
VSUP = 5 V; minimum attenuation.
(1) attenuation = 63 (0x3F, minimum)
(1) Tamb = 40 C
(2) attenuation = 62 (0x3E)
(2) Tamb = +25 C
(3) attenuation = 61 (0x3D)
(3) Tamb = +85 C
(4) attenuation = 59 (0x3B)
(5) attenuation = 55 (0x37)
(6) attenuation = 47 (0x2F)
(7) attenuation = 31 (0x1F)
(8) attenuation = 00 (0x00, maximum)
Fig 17. Relative phase as a function of frequency;
typical values
BGA7204
Product data sheet
Fig 18. Input return loss as a function of frequency;
typical values
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© NXP B.V. 2013. All rights reserved.
17 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
aaa-001444
0
aaa-001445
0
S11
(dB)
S22
(dB)
-10
-5
-20
(1)
-10
(2)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
-30
(3)
-15
-40
-20
-50
-25
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
-60
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
VSUP = 5 V; Tamb = 25 C.
VSUP = 5 V; minimum attenuation.
(1) Tamb = 40 C
(1) attenuation = 63 (0x3F, minimum)
(2) Tamb = +25 C
(2) attenuation = 62 (0x3E)
(3) Tamb = +85 C
(3) attenuation = 61 (0x3D)
(4) attenuation = 59 (0x3B)
(5) attenuation = 55 (0x37)
(6) attenuation = 47 (0x2F)
(7) attenuation = 31 (0x1F)
(8) attenuation = 00 (0x00, maximum)
Fig 19. Output return loss as a function of frequency;
typical values
BGA7204
Product data sheet
Fig 20. Input return loss as a function of frequency;
typical values
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© NXP B.V. 2013. All rights reserved.
18 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
aaa-001446
0
S22
(dB)
aaa-001447
0
S12
(dB)
-10
-10
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
-20
-30
-40
(1)
(2)
(3)
(4)
-20
-30
(5)
(6)
-40
(7)
-50
-50
-60
0.0
-60
0.0
(8)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
VSUP = 5 V; Tamb = 25 C.
0.5
1.0
1.5
2.0
2.5
VSUP = 5 V; Tamb = 25 C.
(1) attenuation = 63 (0x3F, minimum)
(1) attenuation = 63 (0x3F, minimum)
(2) attenuation = 62 (0x3E)
(2) attenuation = 62 (0x3E)
(3) attenuation = 61 (0x3D)
(3) attenuation = 61 (0x3D)
(4) attenuation = 59 (0x3B)
(4) attenuation = 59 (0x3B)
(5) attenuation = 55 (0x37)
(5) attenuation = 55 (0x37)
(6) attenuation = 47 (0x2F)
(6) attenuation = 47 (0x2F)
(7) attenuation = 31 (0x1F)
(7) attenuation = 31 (0x1F)
(8) attenuation = 00 (0x00, maximum)
(8) attenuation = 00 (0x00, maximum)
Fig 21. Output return loss as a function of frequency;
typical values
BGA7204
Product data sheet
3.0
3.5
f (GHz)
Fig 22. Isolation as a function of frequency; typical
values
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
19 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
aaa-001448
50
IP3O
(dBM)
aaa-001449
50
IP3O
(dBM)
45
45
40
40
(1)
35
35
(2)
(1)
(2)
(3)
(4)
(5)
(3)
30
30
25
25
20
0.0
20
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
0
8
16
24
32
40
48
56
64
attenuation (decimal)
VSUP = 5 V; Tamb = 25 C.
VSUP = 5 V; minimum attenuation.
(1) Tamb = 40 C
(1) f = 0.4 GHz
(2) Tamb = +25 C
(2) f = 0.7 GHz
(3) Tamb = +85 C
(3) f = 1.45 GHz
(4) f = 2.10 GHz
(5) f = 2.75 GHz
Fig 23. Output third-order intercept point as a function
of frequency; typical values
BGA7204
Product data sheet
Fig 24. Output third-order intercept point as a function
of attenuation state (63 = minimum
attenuation); typical values
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Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
20 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
aaa-001450
25
PL (1dB)
(dBm)
20
(1)
(2)
(3)
(4)
(5)
15
10
5
0
0
16
32
48
64
attenuation (decimal)
VSUP = 5 V; Tamb = 25 C.
(1) f = 0.4 GHz
(2) f = 0.7 GHz
(3) f = 1.45 GHz
(4) f = 2.10 GHz
(5) f = 2.75 GHz
Fig 25. Output power at 1 dB gain compression as a function of attenuation state
(63 = minimum attenuation); typical values
BGA7204
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
21 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
aaa-001451
40
NF
(dB)
aaa-001452
30
NF
(dB)
25
30
20
(1)
20
(2)
(4)
(3)
(5)
15
10
(3)
(2)
(1)
10
5
0
0
16
32
48
64
attenuation (decimal)
VSUP = 5 V; Tamb = 25 C.
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f (GHz)
VSUP = 5 V; minimum attenuation.
(1) f = 0.4 GHz
(1) Tamb = 40 C
(2) f = 0.7 GHz
(2) Tamb = +25 C
(3) f = 1.45 GHz
(3) Tamb = +85 C
(4) f = 2.10 GHz
(5) f = 2.75 GHz
Fig 26. Noise figure as a function of attenuation state
(63 = minimum attenuation); typical values
BGA7204
Product data sheet
Fig 27. Noise figure as a function of frequency; typical
values
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© NXP B.V. 2013. All rights reserved.
22 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
12. Package outline
HVQFN32: plastic thermal enhanced very thin quad flat package; no leads;
32 terminals; body 5 x 5 x 0.85 mm
D
B
SOT617-3
A
terminal 1
index area
A
A1
E
detail X
C
e1
e
9
y1 C
C A B
C
v
w
1/2 e b
y
16
L
17
8
e
e2
Eh
1/2 e
24
1
terminal 1
index area
32
25
X
Dh
0
2.5
Dimensions
Unit(1)
mm
5 mm
scale
A(1)
A1
b
max
0.05 0.30
nom 0.85
min
0.00 0.18
c
D(1)
Dh
E(1)
Eh
5.1
3.75
5.1
3.75
0.2
4.9
3.45
4.9
e
e1
e2
0.5
3.5
3.5
L
v
w
y
y1
0.5
0.1
0.05 0.05
0.1
0.3
3.45
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Outline
version
SOT617-3
References
IEC
JEDEC
JEITA
sot617-3_po
European
projection
Issue date
11-06-14
11-06-21
MO-220
Fig 28. Package outline SOT617-3 (HVQFN32)
BGA7204
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
23 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
13. Packing information
The BGA7204 will be delivered in reel pack SMD 7”, 1500 pieces per reel.
aaa-000870
Fig 29. Carrier tape
14. Abbreviations
Table 18.
Abbreviations
Acronym
Description
ESD
ElectroStatic Discharge
HBM
Human Body Model
IF
Intermediate Frequency
LSB
Least Significant Bit
LUT
Look-Up Table
MMIC
Monolithic Microwave Integrated Circuit
MSB
Most Significant Bit
RF
Radio Frequency
SPI
Serial Peripheral Interface
USB
Universal Serial Bus
WiMAX
Worldwide Interoperability for Microwave Access
15. Revision history
Table 19.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BGA7204 v.3
20130128
Product data sheet
-
BGA7204 v.2
Modifications:
•
Section 1.2 on page 1: moisture sensitivity level 2 has been changed to 1.
BGA7204 v.2
20120118
Product data sheet
-
BGA7204 v.1
BGA7204 v.1
20120105
Product data sheet
-
-
BGA7204
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
24 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
BGA7204
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
25 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BGA7204
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 January 2013
© NXP B.V. 2013. All rights reserved.
26 of 27
BGA7204
NXP Semiconductors
400 MHz to 2750 MHz high linearity variable gain amplifier
18. Contents
1
1.1
1.2
1.3
1.4
2
2.1
2.2
3
4
5
6
7
8
9
10
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
11
11.1
11.2
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering information . . . . . . . . . . . . . . . . . . . . . 4
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Thermal characteristics . . . . . . . . . . . . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Interface timing characteristics . . . . . . . . . . . . 7
Control modes . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Interface operating principles . . . . . . . . . . . . . . 8
Attenuation truth table. . . . . . . . . . . . . . . . . . . . 9
Parallel control mode . . . . . . . . . . . . . . . . . . . . 9
Basic SPI mode . . . . . . . . . . . . . . . . . . . . . . . 10
Extended SPI mode . . . . . . . . . . . . . . . . . . . . 11
Temperature sensor . . . . . . . . . . . . . . . . . . . . 11
Power-up states . . . . . . . . . . . . . . . . . . . . . . . 12
Power-on sequence . . . . . . . . . . . . . . . . . . . . 12
Application information. . . . . . . . . . . . . . . . . . 13
Application board . . . . . . . . . . . . . . . . . . . . . . 13
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 23
Packing information . . . . . . . . . . . . . . . . . . . . 24
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24
Legal information. . . . . . . . . . . . . . . . . . . . . . . 25
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Contact information. . . . . . . . . . . . . . . . . . . . . 26
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 28 January 2013
Document identifier: BGA7204