Application Note 1805 October 2012 DRF12XX Evaluation Board Gui Choi Sr. Application Engineer Phone: 541-382-8028, ext. 1205 [email protected] Figure 1 shows a simplified circuit diagram for the DRF12XX series of devices. The Hybrid consists of a MOSFET Driver and Power MOSFET. The control signal is applied to internal driver through pin 4 (IN) and referenced to pin 5 (GND) a Ground return. The pin 3 (FN) allows the user to select either Invert or Non-inverting mode. The output of the driver is internally applied to the gate of the Power MOSFET. The logic diagram for the hybrid is shown in Table 1. For more information on the specific DRF12XX, refer to the device data sheet. Figure 1. DRF12XX FN (pin 3) Invert/Non-invert IN (pin 4) Control MOSFET Function High High On Non-Invert. High Low Off Non-Invert. Low High Off Inverting Low Low On Inverting Table 1 The DRF12XX Evaluation Board allows the design engineer to prototype a circuit of choice. It is initially configured as shown in Figure 2 allowing the user to evaluate the simple switching performance of the DRF12XX. The 50Ω load resistor (RL) has a power limit of 4 Watts. In this configuration, the DRF12XX Evaluation Board should be operated at a reduced Duty Cycle to avoid damaging the RL. The DRF12XX must be attached to a heat sink when reconfigured for dissipation greater than 4 watts. www.microsemi.com 1/3 Application Note 1805 October 2012 Figure 2. DRF12XX Evaluation Board A 5V max signal input is applied to (IN) via the BNC connector. Using the Power Ground (GND) for the BNC shielding provides a ground connection for the input increasing noise immunity. Pins 2 and 6 (+VDD) are both connected on evaluation board and are also connected internally to help balance pulse currents in the hybrid. Pin 3 (FN) is the invert or non-invert select Pin, internally held high (non-inverting) and must be jumpered on the evaluation board (JP1) to ground to select the inverting mode. Inputs Parameter GND Driver Ground +15V Driver supply Remarks CMC suggested IN +5V max signal 50Ω coax, CMC suggested GND (IN) Signal Rtn. 50Ω coax, Rtn, CMC suggested Drain Probe X100 Probe Tek P5100, CMC suggested on probe lead VDS +1000V Max CMC suggested P GND Power GND Connected to MOSFET Source Table 2 Table 2 shows Evaluation board inputs and outputs and the highly recommended Common Mode Chokes (CMC) that should be used for the test bench set-up. This approach provides the best stability and the most accurate measurements. Construction of the CMCs are illustrated in Figure 3. The CMC on the left should be used for both the +15V input and the +HV VDS input. These lines are tightly twisted pairs (5-8 twists per inch). The CMC on the right should be used for the control signal Input and on the Scope Probe Cable. Three to five turns on each is sufficient. The CMCs should be placed as close to the DRF12XX Evaluation Board as practical. www.microsemi.com 2/3 Application Note 1805 October 2012 Figure 3. Common Mode Choke (CMC) FairRite part number 0431164181 Figure 4. DRF12XX Evaluation Board All Dimensions are ± 0.010 In. Max. The DRF12XX evaluation board is initially configured as shown mechanically in Figure 4. The main purpose of the board is to verify SWITCHING PERFORMANCE for DRF12xx devices. Mounting Instructions for Flangeless Devices: Refer to Application Note 1810 “DRF Device Mounting Procedures And Power Dissipation”. www.microsemi.com Rev. C, 10/23/12 3/3