PIC16(L)F720/721 Silicon Errata and Data Sheet Clarification

PIC16(L)F720/721
PIC16(L)F720/721 Family
Silicon Errata and Data Sheet Clarification
The PIC16(L)F720/721 family devices that you have
received conform functionally to the current Device Data
Sheet (DS41341E), except for the anomalies described
in this document.
For example, to identify the silicon revision level
using MPLAB IDE in conjunction with a hardware
debugger:
1.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
2.
3.
The errata described in this document will be addressed
in future revisions of the PIC16(L)F720/721 silicon.
4.
Note:
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon
revision (A4).
Data Sheet clarifications and corrections start on page 4,
following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB® IDE and Microchip’s
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
TABLE 1:
5.
Using the appropriate interface, connect the
device to the hardware debugger.
Open an MPLAB IDE project.
Configure the MPLAB IDE project for the
appropriate device and hardware debugger.
Based on the version of MPLAB IDE you are
using, do one of the following:
a) For MPLAB IDE 8, select Programmer >
Reconnect.
b) For MPLAB X IDE, select Window >
Dashboard and click the Refresh Debug
Tool Status icon (
).
Depending on the development tool used, the
part number and Device Revision ID value
appear in the Output window.
Note:
If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
The DEVREV values for the various PIC16(L)F720/721
silicon revisions are shown in Table 1.
SILICON DEVREV VALUES
Part Number
Device ID(1)
Revision ID for Silicon Revision(2)
A3
A4
PIC16F720
01 1100 000x xxxx
0 0011
0 0100
PIC16LF720
01 1100 010x xxxx
0 0011
0 0100
PIC16F721
01 1100 001x xxxx
0 0011
0 0100
PIC16LF721
01 1100 011x xxxx
0 0011
0 0100
Note 1:
2:
The Device ID is located at address location 2006h. The five Least Significant bits (LSb) comprise the
revision ID.
Refer to the “PIC16F720/721 Memory Programming Specification” (DS41409) for detailed information on
Device and Revision IDs for your specific device.
 2011-2012 Microchip Technology Inc.
DS80521B-page 1
PIC16(L)F720/721
TABLE 2:
SILICON ISSUE SUMMARY
Feature
Item
Number
AUSART
OERR Flag
1.1
AUSART
Interrupts
1.2
Interrupts
Stack Push
2.1
Module
DS80521B-page 2
Issue Summary
Affected Revisions(1)
A3
A4
OERR flag not clearing.
X
X
Starting the Interrupt Service Routine
(ISR).
X
X
Interrupt logic incorrectly pushes two
addresses to the stack.
X
X
 2011-2012 Microchip Technology Inc.
PIC16(L)F720/721
Silicon Errata Issues
Note:
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A4).
1. Module: AUSART
1.1 OERR Flag Not Clearing
The OERR flag of the RCSTA register is reset only
by either clearing the CREN bit of the RCSTA
register or by a device Reset. Clearing the SPEN
bit of the RCSTA register does not clear the OERR
flag.
Work around
Clear the OERR flag by clearing the CREN bit in
lieu of clearing the SPEN bit.
Affected Silicon Revisions
A3
A4
X
X
2. Module: Interrupts
2.1 Stack Push
The interrupt logic incorrectly pushes two
addresses to the stack when vectoring to the
interrupt vector. Specifically, the interrupt vector
address 0x4 is incorrectly pushed to the stack after
the current PC, at the time the interrupt was
received, is pushed. This will cause the stack to
overflow if the user program is operating seven
calls deep when an interrupt arrives. Because the
stack is circular, the overflow causes the first stack
address to be overwritten.
Work around
Disable interrupts by clearing the GIE bit in the
INTCON register whenever the user program is
operating seven calls deep. This ensures that
interrupts will not cause the stack to overflow.
Affected Silicon Revisions
A3
A4
X
X
1.2 Starting the Interrupt Service Routine
When the AUSART is configured for Synchronous
mode and either an RCIF or TXIF flag event wakes
the device from Sleep, then execution of the
Interrupt Service Routine (ISR) will begin
immediately after the two instructions following the
SLEEP instruction have finished executing.
Work around
Follow the SLEEP instruction with two NOP
instructions or two instructions desired to be
executed before the ISR begins.
Affected Silicon Revisions
A3
A4
X
X
 2011-2012 Microchip Technology Inc.
DS80521B-page 3
PIC16(L)F720/721
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS41341E):
Note:
Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
None.
DS80521B-page 4
 2011-2012 Microchip Technology Inc.
PIC16(L)F720/721
APPENDIX A:
DOCUMENT
REVISION HISTORY
Rev. A Document (02/2011)
Original release of this document.
Rev. B Document (12/2012)
Added MPLAB X IDE; Added Silicon Revision A4;
Added Issue Title 2.1 Stack Push; Updated Table 1 and
Table 2.
 2011-2012 Microchip Technology Inc.
DS80521B-page 5
PIC16(L)F720/721
NOTES:
DS80521B-page 6
 2011-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
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OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
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Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
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FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2011-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620768037
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CERTIFIED BY DNV
== ISO/TS 16949 ==
 2011-2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS80521B-page 7
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DS80521B-page 8
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