NCP2991 1.35 Watt Audio Power Amplifier with Selectable Fast Turn On Time The NCP2991 is an audio power amplifier designed for portable communication device applications such as mobile phone applications. The NCP2991 is capable of delivering 1.35 W of continuous average power to an 8.0 BTL load from a 5.0 V power supply, and 1.1 W to a 4.0 BTL load from a 3.6 V power supply. The NCP2991 provides high quality audio while requiring few external components and minimal power consumption. It features a low−power consumption shutdown mode, which is achieved by driving the SHUTDOWN pin with logic low. The NCP2991 contains circuitry to prevent from “pop and click” noise that would otherwise occur during turn−on and turn−off transitions. It is a zero pop noise device when a single ended or a differential audio input is used. For maximum flexibility, the NCP2991 provides an externally controlled gain (with resistors). In addition, it integrates 2 different Turn On times (15 ms or 30 ms) adjustable with the TON pin. Due to its superior PSRR, it can be directly connected to the battery, saving the use of an LDO. This device is available in a 9−Pin Flip−Chip CSP (Lead−Free). Features • 1.35 W to an 8.0 BTL Load from a 5.0 V Power Supply • Best−in−Class PSRR: up to −100 dB, Direct Connection to the • • • • • • • Battery Zero Pop Noise Signature with a Single Ended Audio Input Ultra Low Current Shutdown Mode: 10 nA 2.5 V−5.5 V Operation External Gain Configuration Capability External Turn−on Time Configuration Capability: 15 ms or 30 ms Thermal Overload Protection Circuitry This is a Pb−Free Device* http://onsemi.com MARKING DIAGRAMS 9−Pin Flip−Chip CSP FC SUFFIX CASE 499E MRHG AYWW A1 MRH A Y WW G = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package PIN CONNECTIONS A1 A2 A3 INM OUTA INP B1 B2 B3 VM TON VP C1 C2 C3 BYPASS OUTB SHUTDOWN (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet. Typical Applications • Portable Electronic Devices • PDAs • Wireless Phones *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 November, 2009 − Rev. 2 1 Publication Order Number: NCP2991/D NCP2991 Rf 24 k Vp Cs AUDIO INPUT Ci 100 nF Ri INM + INP 24 k 1 F Vp OUTA R1 20 k Vp + BYPASS Cbypass R2 20 k 8 OUTB 1 F SHUTDOWN SHUTDOWN CONTROL TON VM Connect to Vp or GND Figure 1. Typical Audio Amplifier Application Circuit with Single Ended Input Rf 24 k Ci Ri 100 nF 24 k + AUDIO INPUT − Ci 100 nF Cs INM Ri Vp Vp 24 k Rf + BYPASS Cbypass 1 F + INP 24 k Vp OUTA R1 20 k R2 20 k OUTB 1 F SHUTDOWN SHUTDOWN CONTROL TON VM Connect to Vp or GND Figure 2. Typical Audio Amplifier Application Circuit with a Differential Input http://onsemi.com 2 8 NCP2991 PIN DESCRIPTION Pin Name Type Description A1 INM I Negative input of the first amplifier, receives the audio input signal. Connected to the feedback resistor Rf and to the input resistor Rin. A2 OUTA O Negative output of the NCP2991. Connected to the load and to the feedback resistor Rf. A3 INP I Positive input of the first amplifier, receives the common mode voltage. B1 VM I Analog Ground. B2 TON I TON pin selects 2 different Turn On times: TON = GND −> 30 ms TON = VP −> 15 ms B3 VP I Positive analog supply of the cell. Range: 2.5 V−5.5 V. C1 BYPASS I Bypass capacitor pin which provides the common mode voltage (Vp/2). C2 OUTB O Positive output of the NCP2991. Connected to the load. C3 SHUTDOWN I The device enters in shutdown mode when a low level is applied on this pin. MAXIMUM RATINGS (Note 1) Rating Symbol Value Unit Vp 6.0 V Op Vp 2.5 to 5.5 V − Input Voltage Vin −0.3 to VCC +0.3 V Power Dissipation (Note 2) Pd Internally Limited − Operating Ambient Temperature TA −40 to +85 °C Supply Voltage Operating Supply Voltage Max Junction Temperature TJ 150 °C Storage Temperature Range Tstg −65 to +150 °C Thermal Resistance Junction−to−Air RJA (Note 3) °C/W − 2000 200 V − ±100 mA ESD Protection Human Body Model (HBM) (Note 4) Machine Model (MM) (Note 5) Latchup Current @ TA = 85°C (Note 6) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = +25°C. 2. The thermal shutdown set to 160°C (typical) avoids irreversible damage on the device due to power dissipation. 3. The RJA is highly dependent of the PCB Heatsink area. For example, RJA can equal 195°C/W with 50 mm2 total area and also 135°C/W with 500 mm2. The bumps have the same thermal resistance and all need to be connected to optimize the power dissipation. 4. Human Body Model, 100 pF discharge through a 1.5 k resistor following specification JESD22/A114. 5. Machine Model, 200 pF discharged through all pins following specification JESD22/A115. http://onsemi.com 3 NCP2991 ELECTRICAL CHARACTERISTICS Limits apply for TA between −40°C to +85°C (Unless otherwise noted). Characteristic Supply Quiescent Current Common Mode Voltage Symbol Conditions Min (Note 6) Typ Idd Vp = 2.5 V, No Load Vp = 5.0 V, No Load − − Vp = 2.5 V, 8 Vp = 5.0 V, 8 − Vcm Max (Note 6) Unit 1.8 1.95 3.5 mA − − 1.8 1.95 3.5 − Vp/2 − V Shutdown Current ISD − 0.02 0.5 A Shutdown Pull−Down RSD − 300 − k V Shutdown Voltage High VSDIH − 1.2 − − Shutdown Voltage Low VSDIL − − − 0.4 V Turn On Time (Note 8) TWU TON = GND TON = VP − 30 15 − ms Turn Off Time TOFF − − 1.0 − s Output Impedance in Shutdown Mode ZSD − − 8.5 − k Vloadpeak Vp = 2.5 V, RL = 8.0 Vp = 5.0 V, RL = 8.0 (Note 7) TA = +25°C 1.9 2.4 − − V 3.8 4.7 Vp = 2.5 V, RL = 4.0 THD + N < 1% Vp = 2.5 V, RL = 8.0 THD + N < 1% Vp = 5.0 V, RL = 8.0 THD + N < 1% − 0.5 − W PDmax Vp = 5.0 V, RL = 8.0 − − 0.65 W Output Offset Voltage VOS Vp = 2.5 V Vp = 5.0 V − 1.0 − mV Signal−to−Noise Ratio SNR Vp = 2.5 V, G = 2.0 20 Hz < F < 20 kHz − 86 − dB PSRR V+ G = 2.0, RL = 8.0 Cby = 1.0 F Input Grounded F = 217 Hz Vp = 5.0 V Vp = 4.2 V Vp = 3.0 V − − − −91 −91 −91 − − − F = 1.0 kHz Vp = 5.0 V Vp = 4.2 V Vp = 3.0 V − − − −103 −103 −103 − − − Vp = 2.5 V, Porms = 320 mW Vp = 5.0 V, Porms = 1.0 W − − 71 64 − − % Output Swing RMS Output Power Maximum Power Dissipation (Note 8) Positive Supply Rejection Ratio Efficiency Thermal Shutdown Temperature Total Harmonic Distortion PO Tsd THD 0.3 − − 1.35 dB − 160 − °C Vp = 2.5 V, F = 1.0 kHz RL = 4.0 AV = 2.0 PO = 0.32 W − − − − 0.03 − − − − % Vp = 5.0 V, F = 1.0 kHz RL = 8.0 AV = 2.0 PO = 1.0 W − − − − 0.015 − − − − 6. Min/Max limits are guaranteed by design, test or statistical analysis. 7. This parameter is guaranteed but not tested in production in case of a 5.0 V power supply. 8. See page 13 for a theoretical approach of this parameter. http://onsemi.com 4 NCP2991 TYPICAL CHARACTERISTICS 1 1 0.1 0.01 100 1,000 1,000 Figure 3. THD+N vs. Frequency Figure 4. THD+N vs. Frequency 1 THD+N (%) THD+N VP = 2.5 V Pout = 100 mW RL = 4 1,000 0.1 0.01 10,000 100 1,000 FREQUENCY (Hz) Figure 5. THD+N vs. Frequency Figure 6. THD+N vs. Frequency 1 THD+N VP = 5 V Pout = 500 mW RL = 4 THD+N (%) THD+N VP = 3 V Pout = 250 mW RL = 4 THD+N (%) 10,000 FREQUENCY (Hz) 1 0.1 0.01 10,000 FREQUENCY (Hz) THD+N VP = 5 V Pout = 250 mW RL = 8 100 100 FREQUENCY (Hz) 0.1 0.01 0.1 0.01 10,000 1 THD+N (%) THD+N VP = 3 V Pout = 250 mW RL = 8 THD+N (%) THD+N (%) THD+N VP = 2.5 V Pout = 100 mW RL = 8 100 1,000 0.1 0.01 10,000 100 1,000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 7. THD+N vs. Frequency Figure 8. THD+N vs. Frequency http://onsemi.com 5 10,000 NCP2991 TYPICAL CHARACTERISTICS 1 THD+N VP = 2.5 V Pout = 100 mW RL = 8 Differential Input 0.1 THD+N (%) THD+N (%) 1 0.01 0.001 100 1,000 10,000 Figure 10. THD+N vs. Frequency 1 FREQUENCY (Hz) THD+N (%) 1,000 Figure 9. THD+N vs. Frequency 0.1 100 1,000 THD+N VP = 2.5 V Pout = 100 mW RL = 4 Differential Input 0.1 0.01 10,000 100 1,000 10,000 FREQUENCY (Hz) THD+N (%) Figure 11. THD+N vs. Frequency Figure 12. THD+N vs. Frequency 1 1 THD+N VP = 3 V Pout = 250 mW RL = 4 Differential Input THD+N (%) THD+N (%) 100 FREQUENCY (Hz) THD+N VP = 5 V Pout = 500 mW RL = 8 Differential Input 0.1 0.01 0.01 FREQUENCY (Hz) 1 0.01 0.1 0.001 10,000 THD+N VP = 3 V Pout = 250 mW RL = 8 Differential Input 100 1,000 THD+N VP = 5 V Pout = 500 mW RL = 4 Differential Input 0.1 0.01 10,000 100 1,000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 13. THD+N vs. Frequency Figure 14. THD+N vs. Frequency http://onsemi.com 6 10,000 NCP2991 TYPICAL CHARACTERISTICS 10 Vp = 2.5 V 5.0 V 3.6 V 5.5 V 3.3 V THD (%) 1 3.0 V 2.7 V 0.1 RL = 8 0.01 0 400 1200 800 1600 2000 Pout (mW) Figure 15. THD+N vs. Pout 100 10 THD (%) 3.6 V Vp = 2.5 V 4.2 V 5.0 V 5.5 V 3.0 V 1 3.3 V 0.1 THD+N RL = 8 Differential Input 0.01 0.001 0 500 1000 1500 2000 2500 Pout (mW) Figure 16. THD+N vs. Pout −50 −70 −80 −90 −100 −110 10 PSRR VP = 3 V G=2 Input Shorted to GND Differential Configuration −20 PSRR (dB) −60 PSRR (dB) 0 PSRR VP = 3 V G=2 Input Shorted to GND −40 −60 −80 −100 100 1000 10000 100000 −120 10 100 1,000 10,000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. PSRR vs. Frequency Figure 18. PSRR vs. Frequency http://onsemi.com 7 100,000 NCP2991 TYPICAL CHARACTERISTICS −50 −70 −80 −90 −100 −110 −40 −60 −80 −100 10 100 1000 10000 100000 −120 1,000 100 10,000 FREQUENCY (Hz) Figure 19. PSRR vs. Frequency Figure 20. PSRR vs. Frequency 100,000 0 PSRR VP = 5 V G=2 Input Shorted to GND −70 PSRR VP = 5 V G=2 Input Shorted to GND Differential Configuration −20 −40 PSRR (dB) −60 PSRR (dB) 10 FREQUENCY (Hz) −50 −80 −90 −100 −110 PSRR VP = 4.2 V G=2 Input Shorted to GND Differential Configuration −20 PSRR (dB) −60 PSRR (dB) 0 PSRR VP = 4.2 V G=2 Input Shorted to GND −60 −80 −100 10 100 1000 10000 100000 −120 10 100 1,000 10,000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 21. PSRR vs. Frequency Figure 22. PSRR vs. Frequency 100,000 800 700 Pdsp (mW) 600 5.5 V 500 5.0 V 400 3.6 V 300 200 Vp = 2.5 V 100 0 0 200 2.7 V 400 3.3 V 3.0 V RL = 8 600 800 1000 1200 Pout (mW) Figure 23. Power Dissipation vs. Pout http://onsemi.com 8 1400 1600 1800 2000 NCP2991 1600 1400 1200 (mW) 1000 800 600 400 THD+N < 1% RI = 8 200 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VP (V) Figure 24. Maximum Output Power vs. VP Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Figure 25. Zero pop noise turn on sequence with single-ended input to ground (Ci = 100 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = GND) Figure 26. Zero pop noise turn on sequence with single-ended input audio source (Ci = 100 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = GND) Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Figure 27. Zero pop noise turn off sequence with single-ended input to ground (Ci = 100 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = GND) Figure 28. Zero pop noise turn off sequence with single-ended input audio source (Ci = 100 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = GND) http://onsemi.com 9 NCP2991 Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Figure 29. Zero pop noise turn on sequence with differential input to ground (Ci = 100 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = GND) Figure 30. Zero pop noise turn on sequence with differential input audio source (Ci = 100 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = GND) Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Figure 31. Zero pop noise turn off sequence with differential input to ground (Ci = 100 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = GND) Figure 32. Zero pop noise turn off sequence with differential input audio source (Ci = 100 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = GND) http://onsemi.com 10 NCP2991 Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Figure 33. Zero pop noise turn on sequence with single-ended input to ground (Ci = 47 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = Vp) Figure 34. Zero pop noise turn on sequence with single-ended input audio source (Ci = 47 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = Vp) Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Figure 35. Zero pop noise turn off sequence with single-ended input to ground (Ci = 47 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = Vp) Figure 36. Zero pop noise turn off sequence with single-ended input audio source (Ci = 47 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = Vp) http://onsemi.com 11 NCP2991 Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Figure 37. Zero pop noise turn on sequence with differential input to ground (Ci = 47 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = Vp) Figure 38. Zero pop noise turn on sequence with differential input audio source (Ci = 47 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = Vp) Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Ch1 : OUTA Ch2 : OUTB Ch3 : /SD M1 = Ch1 – Ch2 : Differential signal seen by the load Figure 39. Zero pop noise turn off sequence with differential input to ground (Ci = 47 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = Vp) Figure 40. Zero pop noise turn off sequence with differential input audio source (Ci = 47 nF, Ri = 24 kW, Rf = 24 kW, Cbyp = 1 mF, Rl = 8 W, Ton = Vp) http://onsemi.com 12 NCP2991 APPLICATION INFORMATION Detailed Description transistors are real−time controlled, and when one current exceeds 1.1 A, the gate voltage of the MOS transistor is clipped and no more current can be delivered. The NCP2991 audio amplifier can operate under 2.5 V until 5.5 V power supply. With less than 1% THD + N, it can deliver up to 1.35 W RMS output power to an 8.0 load (VP = 5.0 V). If application allows to reach 10% THD + N, then 1.65 W can be provided using a 5.0 V power supply. The structure of the NCP2991 is basically composed of two identical internal power amplifiers; the first one is externally configurable with gain−setting resistors Rin and Rf (the closed−loop gain is fixed by the ratios of these resistors) and the second is internally fixed in an inverting unity−gain configuration by two resistors of 20 k. So the load is driven differentially through OUTA and OUTB outputs. This configuration eliminates the need for an output coupling capacitor. Thermal Overload Protection Internal amplifiers are switched off when the temperature exceeds 160°C, and will be switched on again only when the temperature decreases fewer than 140°C. The NCP2991 is unity−gain stable and requires no external components besides gain−setting resistors, an input coupling capacitor and a proper bypassing capacitor in the typical application. The first amplifier is externally configurable (Rf and Rin), while the second is fixed in an inverting unity gain configuration. The differential−ended amplifier presents two major advantages: − The possible output power is four times larger (the output swing is doubled) as compared to a single−ended amplifier under the same conditions. − Output pins (OUTA and OUTB) are biased at the same potential VP/2, this eliminates the need for an output coupling capacitor required with a single−ended amplifier configuration. The differential closed loop−gain of the amplifier is Internal Power Amplifier The output PMOS and NMOS transistors of the amplifier were designed to deliver the output power of the specifications without clipping. The channel resistance (Ron) of the NMOS and PMOS transistors does not exceed 0.6 when they drive current. The structure of the internal power amplifier is composed of three symmetrical gain stages, first and medium gain stages are transconductance gain stages to obtain maximum bandwidth and DC gain. R V given by Avd + 2 * f + orms . Rin Vinrms Output power delivered to the load is given by Turn−On and Turn−Off Transitions Porms + When a shutdown low level is applied, the output level is tied to Ground on each output after 10 s. With TON = GND, turn on time is set to 30 ms. With TON = VP, turn on time is set to 15 ms. To avoid any pop and click noises, Rin * Cin < 2.4 ms with TON = GND and Rin * Cin < 1.2 ms with TON = Vp. The electrical characteristics are identical with the 2 configurations. This fast turn on time added to a very low shutdown current saves battery life and brings flexibility when designing the audio section of the final application. NCP2991 is a zero pop noise device when using a single−ended or differential audio input configuration. (Vopeak)2 (Vopeak is the peak differential output 2 * RL voltage). When choosing gain configuration to obtain the desired output power, check that the amplifier is not current limited or clipped. The maximum current which can be delivered to the load is 500 mA Iopeak + Vopeak . RL Gain−Setting Resistor Selection (Rin and Rf) Rin and Rf set the closed−loop gain of the amplifier. In order to optimize device and system performance, the NCP2991 should be used in low gain configurations. The low gain configuration minimizes THD + noise values and maximizes the signal to noise ratio, and the amplifier can still be used without running into the bandwidth limitations. A closed loop gain in the range from 2 to 5 is recommended to optimize overall system performance. An input resistor (Rin) value of 24 k is realistic in most of applications, and doesn’t require the use of a too large capacitor Cin. Shutdown Function The device enters shutdown mode when shutdown signal is low. During the shutdown mode, the DC quiescent current of the circuit does not exceed 100 nA. In this configuration, the output impedance is 8.5 k on each output. Current Limit Circuit The maximum output power of the circuit (Porms = 1.0 W, VP = 5.0 V, RL = 8.0 ) requires a peak current in the load of 500 mA. In order to limit the excessive power dissipation in the load when a short−circuit occurs, the current limit in the load is fixed to 1.1 A. The current in the four output MOS Input Capacitor Selection (Cin) The input coupling capacitor blocks the DC voltage at the amplifier input terminal. This capacitor creates a http://onsemi.com 13 NCP2991 − up to 22 pF capacitor connected between each amplifier output terminals and ground. − Dedicated IEC filters such as ESD7.0 series from ON Semiconductor. In any case, the protection should be placed as close as possible to the ESD stress entry point. Proper and carefull layout is a key factor to ensure optimum protection level is achieved. Designer should make sure the connection impedance between protection and ground / protection and NCP2991 is as low as possible. high−pass filter with Rin, the cut−off frequency is given by 1 fc + . 2 * * Rin * Cin The size of the capacitor must be large enough to couple in low frequencies without severe attenuation. IEC 61000-4-2 Level 4 In some particular applications, NCP2991 may need extra ESD protection to pass IEC 61000-4-2 Level 4 qualification. Depending on the test, user can consider different level of protection: ORDERING INFORMATION Device NCP2991FCT2G Package Shipping† 9−Pin Flip−Chip (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 14 NCP2991 PACKAGE DIMENSIONS 9 PIN FLIP−CHIP CASE 499E−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. −A− 4X D 0.10 C −B− E TOP VIEW DIM A A1 A2 D E b e D1 E1 A 0.10 C 0.05 C −C− MILLIMETERS MIN MAX 0.540 0.660 0.210 0.270 0.330 0.390 1.450 BSC 1.450 BSC 0.290 0.340 0.500 BSC 1.000 BSC 1.000 BSC A2 A1 SIDE VIEW SEATING PLANE D1 e C B e A 9X b 1 2 E1 3 0.05 C A B 0.03 C BOTTOM VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 15 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative NCP2991/D