SiDB766760

SiDB766760
Vishay Siliconix
Current-Sense MOSFET Evaluation Board
FEATURES
D Facilitates Evaluation of Vishay Siliconix Current Sensing
Power MOSFETs Available in Three Different Packages
D Jumper Isolation to Select The Device Under Test
D Simple Two Resistor External Circuit for Each Variety
ORDERING INFORMATION
D SiDB766760
FIGURE 1.
EVB Assembly
DESCRIPTION
This evaluation board (EVB) is loaded with the following
Vishay Siliconix current sensing MOSFETs: SUM60N08-07C,
(5-pin D2PAK), Si4730EY (single SO-8), and Si6862DQ (dual
TSSOP–8). Figure 1 shows the PC board assembly. A simple
electrical set-up allows users to evaluate the effect of these
parameters and operating condition variations:
a.
b.
c.
d.
sensing capability of each package (Figures 2, 3, 4, and 5,
pages 4 and 5).
Using this EVB, users can devise various design experiments
to study device behavior patterns and characterize various
parameters for current sensing MOSFETs. Users can also
connect the current sense signal directly into the external
circuit to prototype the controller.
RSENSE, current sense resistor
VGS, gate-source voltage
IDS, drain current
TA, ambient temperature
The electrical schematic diagram for the PC board is shown in
Appendix (A). The bill of material (BOM) for the PC board is
given in Appendix (B) and the board layout details are given in
Appendix (C).
A basic demo set-up consisting of four connection
configuration variations allows users to compare the current
The demonstration board layout is available in Gerber file format. Please contact your Vishay Siliconix sales representative or
distributor for a copy.
PIN CONFIGURATIONS
D2PAK-5
SO-8
1 2 3 4 5
SENSE
1
8
D
KELVIN
2
7
S
3
6
G
4
5
TSSOP-8
D
D
1
S1
2
D
SENSE1
3
G
4
D
8 D
7 S2
D
6 SENSE2
5 KELVIN
Top View
Top View
G
D
S
KELVIN
Document Number: 72431
23-Oct-03
SENSE
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SiDB766760
Vishay Siliconix
TEST SET-UP
Evaluation of SUM60N08-07C in 5-pin D2PAK Package
Figure 2 (page 4) shows the electrical connection details.
Please observe the polarity of each connection.
1. Connect the main power supply, Vcc, between CON4 and
CON9, +ve to CON4 and –ve to CON9.
2. Connect the +ve of the electronic load to CON5 and –ve to
CON6.
3. Connect an external jumper between CON7 and CON8.
4. Connect the +ve of auxiliary power supply, VGS, to CON3,
pin 1 and –ve to CON3, pin 2.
5. Connect the +ve of voltmeter, VS, to the monitoring test
port, TP6, pin 1 and –ve to TP6, pin 2.
6. Remove all other jumper shunts (JP1, JP2, JP3, TP2, TP3,
and TP5).
Evaluation of Si4730EY MOSFET in SO-8 Package
Figure 3 (page 4) shows the electrical connection details.
Please observe the polarity of each connection.
1. Connect the main power supply, Vcc, between CON4 and
CON9, +ve to CON4 and –ve to CON9.
2. Connect the +ve of the electronic load to CON5 and –ve to
CON6.
3. Connect the +ve of auxiliary power supply, VGS, to CON2,
pin 1 and –ve to CON2, pin 2.
4. Connect the +ve of voltmeter, VS, to the monitoring test
port, TP4, pin 1 and –ve to TP4, pin 2.
5. Place a jumper shunt to short pins 1 and 2 on TP5.
Remove all other jumper shunts (JP1, JP2, JP3, TP2, TP3)
and the external jumper.
Evaluation of Si6862DQ Dual MOSFET in TSSOP-8
Package
Channel 1 MOSFET Terminated On Pins 1, 2, 3 and 4
Figure 4 (page 5) shows the electrical connection details.
Please observe the polarity of each connection.
1. Connect the main power supply, VCC, between CON4 and
CON9, +ve to CON4 and –ve to CON9.
2. Connect the +ve of the electronic load to CON5 and –ve to
CON6.
3.
4.
5.
6.
7.
8.
Connect the +ve of auxiliary power supply, VGS, to CON1,
pin 1 and –ve to CON1, pin 2.
Connect the +ve of voltmeter, VS, to the monitoring test
port, TP1, pin1 and –ve to TP1, pin 2.
Place a jumper shunt to short pins 1 and 2 on TP2.
Place a jumper shunt on JP1, to short pins 1 and 2.
Place a jumper shunt on JP2, to short pins 1 and 2.
Place a jumper shunt on JP3, to short pins 1 and 2.
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2
9. Remove the jumper shunts on TP3 and TP5 and the
external jumper.
Channel 2 MOSFET Terminated On Pins 5, 6, 7 and 8:
Figure 5 (page 5) shows the electrical connection details.
Please observe the polarity of each connection.
1. Connect the main power supply, Vcc, between CON4 and
CON9, +ve to CON4 and –ve to CON9.
2. Connect the +ve of the electronic load to CON5 and –ve to
CON6.
3. Connect the +ve of auxiliary power supply, VGS, to CON1,
pin 1 and –ve to CON1, pin 2.
4. Connect the +ve of voltmeter, VS, to the monitoring test
port, TP1, pin 1 and –ve to TP1, pin 2.
5. Place a jumper shunt to short pins 1 and 2 on TP3.
6. Place a jumper shunt on JP1, to short pins 2 and 3.
7. Place a jumper shunt on JP2, to short pins 2 and 3.
8. Place a jumper shunt on JP3, to short pins 2 and 3.
9. Remove the jumper shunts on TP2 and TP5 and the
external jumper.
CIRCUIT OPERATION
Select the appropriate set-up for the device under testing
(DUT) and complete the electrical connection.
1. Connect the main power supply, auxiliary power supply
and electronic load to 115-VAC mains input.
2. Adjust the output voltage of main supply to provide
Vcc = 12 VDC.
3. Select the constant current mode for the electronic load
and adjust the load current to 0 A.
4. Turn on the load. Adjust the output of auxiliary power
supply to provide VGS = 10 VDC or 5.0 VDC as the case
may be.
5. Adjust the load current, which is drain current, ID, in steps
of 1 A up to the device rating or 15 A maximum and
measure the current sense signal voltage, VS.
6. Record the MOSFET current, ID, and sense voltage, VS.
See Table 1 on page 3.
7. Compute the current sense ratio, r, from VS and IDS:
IDS = r x (VS / RSENSE)
Where
IDS = Drain-source current
r = Current-sensing ratio
VS = Current sense voltage
SUMMARY
The current sensing MOSFET EVB facilitates basic testing as
well as parametric study of current sensing MOSFETs. The
current sense signal can easily be sent to other circuits being
tested to study control behavior.
Document Number: 72431
23-Oct-03
SiDB766760
Vishay Siliconix
TABLE 1: REPRESENTATIVE READINGS AND COMPUTATIONS
SUM60N08-07C
Kelvin-to-Ground
Si4730EY
D2PAK (5 Pin)
SO-8
Si6862EY
TSSOP-8
Channel 1
Channel 2
VDS
12 VDC
VDS
12 VDC
VDS
12 VDC
12 VDC
VGS
10 VDC
VGS
10 VDC
VGS
5 VDC
5 VDC
200
600
RSENSE = 1 W
RSENSE = 1 W
Data Sheet Value of
r
2470
Data Sheet Value of
RSENSE = 1 W
r
540
Data Sheet Value of
RSENSE = 1.1 W
IDS
(ADC)
VS
(mV)
r
IDS
(ADC)
VS
(mV)
r
IDS
(ADC)
1
0.410
2439
1
1.522
597
2
0.845
2367
2
3.079
591
3
1.267
2368
3
4.618
4
1.691
2365
4
6.185
5
2.117
2362
5
6
2.534
2368
6
7
2.936
2362
8
3.386
9
3.805
10
11
r
VS
(mV)
r
VS
(mV)
r
1
5.590
179
1.559
641
2
11.210
178
3.140
637
591
3
16.790
179
4.734
634
588
4
22.300
179
6.370
628
7.768
585
5
27.800
180
8.090
618
9.363
583
6
32.700
183
9.880
607
7
11.190
569
7
38.500
182
11.250
622
2363
8
12.790
569
2365
9
14.580
561
4.231
2364
10
17.400
522
4.653
2364
11
19.200
521
12
5.076
2364
12
20.800
524
13
5.493
2367
14
5.905
2371
15
6.323
2372
Average
2371
Average
567
Average
180
Average
627
NOTES:
1
r = current sense ratio
2 Table 1 contains representative readings and computations obtained during testing of the EVB. The average values are in line
with the datasheet specifications.
Document Number: 72431
23-Oct-03
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SiDB766760
Vishay Siliconix
TEST SET-UP
CLICK HERE TO RETURN TO: PAGE 1
PAGE 2
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FIGURE 2.
Test Set-Up for D2PAK Package — Board Marking T3
FIGURE 3.
Test Set-Up for SO-8 Package — Board Marking T2
Document Number: 72431
23-Oct-03
SiDB766760
Vishay Siliconix
TEST SET-UP (CONT’D)
JP2, 3, 4
(pin 1, 2)
FIGURE 4.
Test Set-Up for TSSOP-8 Package — Channel 2 — Board Marking T1
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PAGE 2
Jumper
Shunts
TP 3
FIGURE 5.
Document Number: 72431
23-Oct-03
Test Set-Up for TSSOP-8 Package — Channel 1 — Board Marking T1
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1
2
CON1
T1
10 W, 5%
TP4
Header 2
1
2
CON2
R2
TP1
Header 2
R4
1 W, 0.1%
4
R5
1 W, 0.1%
Header 2
1
2
1
2
Header 2
TP3
TP2
1 2
10 W, 5%
R1
6
7
5
1 2 3
JP3
Header 3
1 2
3
2
Si6862DQ
8
1 2 3
1 2 3
1
JP2
Header 3
JP1
Header 3
1
2
CON3
Si4730EY
T2
Header 2
1
2
TP5
+
1 2
10 W, 5%
R3
R6
1 W, 0.1%
C1-C3
1000 mF, 100 V
TP6
Header 2
VCC1
2
1
Ext. Jumper 1
Load 1
1
CON9
SUM60N08-07C
T3
1
CON8
1
CON7
1
CON6
1
CON5
1
CON4
SiDB766760
Vishay Siliconix
APPENDIX A: SCHEMATIC DIAGRAM
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Document Number: 72431
23-Oct-03
SiDB766760
Vishay Siliconix
APPENDIX B: BILL OF MATERIALS
Item Qty
Designator
Description
Footprint
Vendor Part #
Manufacturer
1
3
R1, R2, R3
10-Ω Resistor, 5%
805
CRCW0805, 10 Ω, 5%
Vishay Dale
2
3
R4, R5, R6
1-Ω Resistor 1%
805
CRCW0805, 1 Ω, 1%
Vishay Dale
3
3
C1, C2, C3
330-mF/100-V
Electrolytic Capacitor
RB-0.2/0.4
4
1
T1
Si6862DQ
Current Sensing MOSFET
TSSOP-8 Dual
Si6862DQ
Vishay Siliconix
5
1
T2
Si4730EY
Current Sensing MOSFET
SO-8
Si4730EY
Vishay Siliconix
6
1
T3
SUM60N08-07C
Current Sensing MOSFET
D2PAK
(5 pin)
SUM60N08-07C
Vishay Siliconix
7
6
CON1 to CON3, TP1 to TP6
2-Pin Connector
SIP-2
92834-02-36-ND
Digi-Key
8
6
CON4 to CON9
Terminal Connector
LOADCON
7693-ND
Digi-Key
9
3
JP1 to JP3
3-Pin Connector
SIP-3
92834-03-36-ND
Digi-Key
10
4
JMP Shunt
jumper shunts
A26228-ND
Digi-Key
11
1
PCB
Evaluation PCB
NWTSM1
Vishay Siliconix
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Document Number: 72431
23-Oct-03
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SiDB766760
Vishay Siliconix
APPENDIX C: LAYOUT
FIGURE 6.
Silk Screen Layer
FIGURE 7.
Top Copper Layer
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Document Number: 72431
23-Oct-03
SiDB766760
Vishay Siliconix
APPENDIX C: LAYOUT (CONT’D)
FIGURE 8.
Bottom Copper Layer
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EVALUATION BOARD DISCLAIMER
Vishay Siliconix (Vishay) provides this evaluation board (EVB) under the following conditions:
The EVB is intended for DEMONSTRATION OR ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is
not considered to be fit for commercial use. Vishay assumes no liability for application assistance, customer product design,
infringement of patents, or software performance.
Please read the EVB datasheet carefully; it contains important information for its use. The user assumes all responsibility and
liability for safe and proper handling of the EVB and to take any and all appropriate precautions concerning electrostatic discharge.
Further, the user indemnifies Vishay from all claims arising from handling or use. The EVB is not regulatory-compliant or
agency-certified. Any user handling the product must have electronics training and observe good laboratory practice standards.
THE EVB IS PROVIDED AS IS, WHERE IS, WITH NO WARRANTIES WHATSOEVER, EITHER EXPRESSED, IMPLIED, OR
STATUTORY, AND SPECIFICALLY EXCLUDING THE WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ANY
PARTICULAR PURPOSE.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER
FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The EVB is not provided exclusively to the user and Vishay may supply the EVB to other users. No license is granted under any
patent right or any other intellectual property right of Vishay.
Document Number: 72431
23-Oct-03
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