ISL9220B Features The ISL9220B is a cost-effective and versatile battery charger for 1-cell Li-Polymer based portable applications. • Highly Integrated Battery Charger IC The device features synchronous PWM technology, maximizing power efficiency, thus minimizing charge time and heat. The 1.2MHz switching frequency allows use of small external inductors and capacitors. • Up to 2A Charge Current A simple charge current programming method is provided. External resistors program the fast charge and end-of-charge currents. • 0.5% Charge Voltage Accuracy The two status outputs can be used to drive LEDs, or can be connected to the host processor. • Thermistor Interface for Battery Detection and Temperature Qualified Charging A programmable charge timer provides the ability to detect defective batteries, and provides a secondary method of detecting charge termination. • Two Status Outputs A thermistor interface is provided for battery presence detection, and for temperature qualified charging conditions. • Small 4x4mm TQFN Package Additional features include preconditioning of an over-discharged battery, automatic recharge, and thermally enhanced QFN package. Applications • PDAs and Smart Phones • MP3 and Portable Media Players • Handheld GPS Devices • Charges 1 Li-ion or Li-Polymer Batteries • Synchronous Buck Topology, with Integrated Power FETs • 1.2MHz Switching Frequency • Input Current Limit Programmable with One External Resistor • Programmable Charge Safety Timer • Short-Circuit and Thermal Protection • -40°C to +85°C Operating Temperature Range Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Technical Brief TB379 “Thermal Characterization of Packaged Semiconductor Devices” • Technical Brief TB389 “PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages” • Digital Still Cameras • Industrial Handheld Scanners Pin Configuration ISL9220B (20 LD TQFN) TOP VIEW July 2, 2010 FN7652.1 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL9220B Switching Charger for 1-Cell Li-ion Batteries ISL9220B Pin Descriptions PIN PIN # NAME 1 2 DESCRIPTION STAT2 Open-drain indication pin. In conjunction with STAT1 this pin provides a unique indication for each charging state of the cycle. This pin is capable to sink 10mA minimum current to drive an LED. EN IC enable input. Drive this pin to logic LO to enable the charger. Drive this pin to logic HI to disable the charger. Do not leave this pin floating. 3 AGND Analog ground. 4 ISET1 Charge current programing pin. Connect a resistor between this pin and the GND pin to set the charge current. 5 ISET2 End-of-charge current programing pin. Connect a resistor between this pin and the GND pin to set the end-of-charge current. 6 VBAT Battery connection pin. Connect this pin to the battery. A 10μF or larger X5R ceramic capacitor is recommended for decoupling and stability purposes. 7 ISNS Output current sense pin. Connect a current sense resistor from this pin to VBAT. No decoupling capacitor is needed at this pin. 8 CISP Input current sense positive connection pin. Connector a sense resistor from this pin the CISN. 9 CISN Input current sense negative connection pin. Connector a sense resistor from this pin the CISP. 10, 11 VIN Input supply voltage. Connect a 4.7μF ceramic capacitor from VIN to PGND. 12 VHI High side NMOS FET gate drive supply pin. Connect a Schottky diode from VBIAS to this pin, and a 0.1μF capacitor to AGND, as shown in the “Typical Application” diagram on page 6. 13, 14 SW Switch node and inductor connection pin. 15, 16 17 PGND Power ground. VBIAS Internal 5V regulator output. Connect a 1μF ceramic capacitor from this pin to AGND. 18 RTH Input for an external NTC thermistor for battery temperature monitoring. 19 TIME The TIME pin sets the oscillation period by connecting a timing capacitor between this pin and GND. The oscillator also provides a time reference for the charger. The timer function can be disabled by connecting the TIME pin to GND. If the timer is disabled, there will be no timeout function for any operation mode including trickle charge and fast charge modes. 20 STAT1 Open-drain indication pin. In conjunction with STAT2 this pin provides a unique indication for each charging state of the cycle. This pin is capable to sink 10mA minimum current to drive an LED. PD Exposed pad. Connect to GND electrically. Thermally, connect as much as possible copper to this pad either on the component layer or other layers through thermal vias to enhance the thermal performance. Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING ISL9220BIRTZ-T 922 0BIRTZ TEMPERATURE RANGE (°C) -40 to +85 PACKAGE Tape & Reel (Pb-Free) 20 Ld 4x4 TQFN PKG. DWG. # L20.4x4E NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9220B. For more information on MSL please see techbrief TB363. 2 FN7652.1 July 2, 2010 ISL9220B Absolute Maximum Ratings Thermal Information VIN, CISP, CISN. . . . . . . . . . . . . . . . . . . . . . . -0.3V to 18V SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.7V to 18V VHI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 24V VBAT, ISNS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 10V ISET1, ISET2, RTH, VBIAS, STAT1, STAT2, EN. -0.3V to 5.5V TIME. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.75V Input Current (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . .2.0A Output Current (SW) . . . . . . . . . . . . . . . . . . . . . . . . .2.2A ESD Rating Human Body Model (Tested per JESD22-A114F) . . . . 2500V Machine Model (Tested per EIA/JESD22-A115-A) . . . . 175V Charged Device Model (Tested per JES22-C101D) . . . 1500V Latch-Up (Tested per JESD-78B; Class 2 (+85°C), Level A) . . . . 100mA Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 4x4 QFN Package (Notes 4, 5) . . . 40 4.3 Maximum Junction Temperature (Plastic Package) . . . +150°C Maximum Storage Temperature Range . . . . -65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . -40°C to +85°C Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . 4.5V to 14V Programmable Charge Current . . . . . . . . . . . . 200mA to 2A CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 5. θJC, “case temperature” location is at the center of the exposed metal pad on the package underside. Electrical Specifications Typical specifications are measured at the following conditions: TA = +25°C; VVIN = 5V. PARAMETER SYMBOL TEST CONDITIONS MIN (Note 6) TYP MAX (Note 6) UNITS POWER-ON RESET Rising VIN Threshold VPOR_R 3.4 3.6 3.8 V Falling VIN Threshold VPOR_F 2.2 2.4 2.6 V Rising Offset Threshold VOS_R - 95 150 mV Falling Offset Threshold VOS_F 10 65 - mV (Note 7) PGOOD = TRUE, EN = L - 10 15 mA PGOOD = TRUE, EN = H VIN = 5V to 12V - - 0.5 mA VIN < VPOR or EN = H 2V < VBAT < 11V - 2 5 μA VIN-VBAT OFFSET VOLTAGE SUPPLY CURRENT VIN Pin Supply Current ICC(VIN) Battery Discharge Current (Total of currents flowing into VBAT, ISNS, SW pins) IDIS OVERVOLTAGE PROTECTION Input OVP Rising Threshold VIN_OVPR 14.5 15.0 15.5 V Input OVP Falling Threshold VIN_OVPF 14.0 14.5 15.0 V OUTPUT CURRENT Fast Charge Current Accuracy ICHG RSNS = 0.039Ω RISET1 = 49.9kΩ (Nominal IOUT = 1000mA) -10 - 10 % Charge Termination Current Accuracy IMIN RSNS = 0.039Ω RISET2 = 300kΩ (Nominal IMIN = 100mA) -35 - 35 % - 12 - ms Charge Termination Detection Deglitch Time 3 FN7652.1 July 2, 2010 ISL9220B Electrical Specifications Typical specifications are measured at the following conditions: TA = +25°C; VVIN = 5V. (Continued) PARAMETER SYMBOL TEST CONDITIONS VBAT < VPCHG MIN (Note 6) TYP MAX (Note 6) UNITS 25 50 90 mA Pre-Charge Current Range (Linear Mode) IPCHG Pre-Charge Threshold Voltage VPCHG 2.42 2.5 2.56 V VRECHG 3.85 4.0 4.1 V RECHARGE THRESHOLD Recharge Voltage Threshold TEMPERATURE MONITORING High Battery Temperature Threshold VTMIN Specified as % of VBIAS 30 35 40 % Low Battery Temperature Threshold VTMAX Specified as % of VBIAS 70 75 80 % Battery Removal Threshold VRMV Specified as % of VBIAS 90 95 - % Thermistor Disable Threshold VT_DIS - 250 - mV Temperature Threshold Hysteresis VT,HYS - 180 - mV - 12 - ms TFD - 140 - °C THYS - 30 - °C 4.70 5.0 5.25 V Temperature Detection Deglitch Time THERMAL PROTECTION Thermal Shutdown Threshold Thermal Hysteresis VBIAS OUTPUT Output Voltage VBIAS 5.3 < VIN < 15V, IVBIAS = 5mA Output Current IBIAS 5.3 < VIN < 15V - - 5 mA TOSC CTIME = 15nF - 3.0 - ms OSCILLATOR Oscillation Period SWITCHING CHARGER AC CHARACTERISTICS Switching Frequency FOSC 1.02 1.2 1.38 MHz Maximum Duty Cycle DMAX - 96 - % - 0 - % - 3.0 - A Minimum Duty Cycle Cycle-By-Cycle Current Limit ILIM SWITCHING CHARGER DC CHARACTERISTICS High-Side MOSFET ON-resistance rDS(ON), HS1 - 112 - mΩ Combined High-Side ON-resistance (Note 8) rDS(ON), HS2 Measured between VIN and SW pins - 224 450 mΩ - 72 180 mΩ - 1.0 5.0 μA Low Side MOSFET ON-resistance rDS(ON), L High-Side Path Reverse Leakage Current IREV VIN = 0V, VSW = 15V Charger Output Voltage VCHG IOUT = 100mA, TA = +25°C 4.179 4.2 4.221 V IOUT = 100mA 4.158 4.2 4.242 V - 100 200 μA 88 100 112 mV INPUT CURRENT SENSE AMPLIFIER Input Bias Current at CSIP and CSIN, Pin (Charger Enabled) IISIP_ON EN = L Input Current Limit Threshold IIN_LIM CSIP-CSIN 4 FN7652.1 July 2, 2010 ISL9220B Electrical Specifications Typical specifications are measured at the following conditions: TA = +25°C; VVIN = 5V. (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN (Note 6) TYP MAX (Note 6) UNITS OUTPUT CURRENT SENSE AMPLIFIER Input Bias Current at ISNS Pin, (Charger Enabled) IISNS_ON EN = L - 100 200 μA Input Bias Current at ISNS Pin, (Charger Disabled) IISNS_OFF EN = H - - 1 μA Input Bias Current at VBAT Pin, (Charger Enabled) IVBAT_ON EN = L - 75 100 μA Input Bias Current at VBAT Pin, (Charger Disabled) IVBAT_OFF EN = H - - 1 μA EN Pin Logic High 1.3 - - V EN Pin Logic Low - - 0.4 V LOGIC INPUT AND OUTPUTS STAT1, STAT2 Sink Current when ON Pin Voltage = 0.4V 10 - - mA STAT1, STAT2 Leakage Current when OFF Pin Voltage = 4.2V - - 1 μA NOTES: 6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 7. PGOOD is defined as when VIN and VBAT meet all these conditions: 1. VIN > VPOR, 2. VIN-VBAT > VOS, 3. VIN < VINOVP. 8. Limits should be considered typical and are not production tested. 5 FN7652.1 July 2, 2010 ISL9220B Typical Application Ω Ω 6 FN7652.1 July 2, 2010 ISL9220B Block Diagram 7 FN7652.1 July 2, 2010 ISL9220B Theory of Operation The ISL9220B is an integrated charger optimized for charging 1-cell Li-ion or Li-polymer batteries. It charges a battery with the constant current (CC) and constant voltage (CV) profile. The typical charge profile is shown in Figure 1. FIGURE 2. THERMISTOR INTERNAL CIRCUIT FIGURE 1. TYPICAL CHARGE PROFILE POR and Power-Good The ISL9220, ISL9220A resets itself when VIN undergoes transition from below VPOR to above VPOR threshold. The ISL9220B has an internal PGOOD signal. Charging is prohibited if PGOOD is not true. See Note 7 on page 5 of the “Electrical Specifications” table for the definition of PGOOD. Valid Charge Temperatures An external NTC thermistor can be used to provide temperature-qualified charging. The VBIAS supply is used as a reference for the internal comparators. Thus, it is important that the VBIAS supply also be used to bias the external voltage divider comprised of one or more fixed resistors and the thermistor. This scheme allows for the use of a wide variety of thermistors. The RTH comparator block monitors the RTH pin voltage to determine if the battery temperature is within safe charging limits. The ISL9220B uses two comparators (CP2 and CP3) to form a window comparator, as shown in Figure 2. When the NTC pin voltage is “out of the window”, determined by the VTMIN and VTMAX, the ISL9220B stops charging and indicates a suspend condition. When the temperature returns to the set range, the charger resumes charging. The two MOSFETs, Q1 and Q2, produce hysteresis for both upper and lower thresholds. The temperature window is shown in Figure 3 for a 0°C to +50°C typical application using an industry standard type 103AT thermistor. The temperature qualification function can be disabled by connecting the RTH pin to ground. 8 FIGURE 3. THRESHOLD VOLTAGES FOR 0°C to +50°C WINDOW (VBIAS = 5.0V) Battery Detection The presence or absence of the external thermistor is used to detect a battery. When VRTH is greater than VRTH,PRES, i.e. when RTH pin is not connected to ground, battery detection is provided by the RTH comparator block, as shown in Figure 2. With no battery connected, the RTH pin is pulled to VBIAS by RU, and thus VRTH will exceed the VRTH,(NOBAT) threshold. The internal battery presence signal is deglitched with a 12ms deglitcher, to avoid false indication of battery insertion or removal due to contact bounce or other noise. Battery Precharge When the charger is first enabled and no fault conditions are detected, if the battery connecting to the charger is deeply discharged, the charger will charge the battery in a reduced current for the battery to recover FN7652.1 July 2, 2010 ISL9220B If the battery voltage is less than the pre-charge voltage (VPCHG), the charger operates in LDO mode, with an output current fixed at 50mA typical. In this mode, the output voltage can go to 0V. This provides the ability to recover a battery that has entered a safety-circuit undervoltage fault mode. (EQ. 1) I PCHG = 50mA When the cell voltage exceeds the pre-charge voltage threshold (VPCHG), fast charging will commence. If this threshold is not reached within the precharge timer period, a TIME-OUT-FAULT condition is asserted, and the charger is disabled. Charge Safety Timer An internal oscillator establishes a timing reference. The oscillation period is programmable with an external capacitor at the TIME pin, CTime, as shown in the “Typical Application” diagram on page 6. The oscillator charges the timing capacitor to 1.5V and then discharges it to 0.5V in one period, both with 10μA current. The period tOSC is: 6 t OSC = 0.2 × 10 × C Time (EQ. 2) ( Sec ) Where CTime is in F. A 1nF capacitor provides 0.2ms oscillation period. The allowable range of CTime value is 100pF to 1μF, providing a programmable charge safety-timeout range of about 1.4 minutes to almost 10 days. Total charge time, excluding any time required for precharge, is limited to a length of TIMEOUT. This can be calculated using Equation 3: TIMEOUT = 2 22 × T OSC (EQ. 3) ( Sec ) Total charge time for battery precharge is limited to a length of 1/8 TIMEOUT. This can be calculated using Equation 4: TIMEOUT ( PCHG ) = 2 19 × T OSC ( Sec ) (EQ. 4) The TIME pin can be grounded to disable the safety timer functions if not needed. Fast Charge The fast charge current is programmed by the resistor between the ISET1 pin and ground, and by the value of the RSNS resistor. 1946 I CHG = -----------------------------------------R ISET1 × R SNS ( mA ) (EQ. 5) Where RISET1 is in kΩ and RSNS is in Ω. For best accuracy, select RSNS value that provides between 40mV to 80mV differential voltage across RSNS at the desired maximum peak current (DC plus ripple). Charge Termination Output current is continuously monitored during charge. When current falls below the taper current threshold, charging will stop, and BATFUL is asserted to indicate a 9 successful charge completion. This taper current threshold is programmed by a single external resistor between ISET2 and ground. 1170 I EOC = -----------------------------------------R ISET2 × R SNS (EQ. 6) ( mA ) Where RISET2 is in kΩ and RSNS is in Ω. A secondary charge termination method is provided via the safety timer. The timeout period of this timer is programmable via a single external capacitor between the TIME pin and ground. To disable the charge safety timer, tie the TIME pin to ground. Charge Current Sensing Charge current is sensed with an external current sense resistor. A low-inductance, precision resistor should be used for best performance. Input Current Sensing Input current is sensed with an external sense resistor. A low-inductance, precision resistor should be used for accurate input current limit. An internal amplifier compares the voltage between CSIP and CSIN, and limits the current when this differential voltage exceeds the threshold voltage. The effective input current limit threshold is thus set by the value of the RICS resistor as calculated by Equation 7. 0.1 I IN ( LIM ) = -------------R ICS (EQ. 7) (A) Where RICS is in Ω. The ISL9220, ISL9220A limits the battery charge current when the input current limit threshold is exceeded. This allows the most efficient use of AC-adapter power without overloading the adapter output. A low pass filter is suggested to eliminate the switching noise, as shown in “Typical Application” on page 6. Status Outputs TABLE 1. STAT1 AND STAT2 TRUE TABLE STAT1 STAT2 CHARGING CONDITION L L Precharge, or fast charge in progress L H Charge Complete H L Fault H H Suspend STAT1 and STAT2 are configured to indicate various charging conditions as given in Table 1. A fault status is triggered under one of these conditions: 1. VBAT > VOUT_OVP threshold 2. Timeout occurs before the EOC current has been reached FN7652.1 July 2, 2010 ISL9220B To exit the fault mode, the input power has to be removed and re-applied, or the EN pin is toggled to HI and back to LO. Applications Information Power-on Reset (POR) The ISL9220B resets itself as the input voltage rises above the POR rising threshold. The internal oscillator starts to oscillate, the internal timer is reset, and the charger begins to charge the battery. The STAT1/2 pins will indicate the operating condition according to Table 1. Trickle Charge If the battery voltage is below the trickle charge threshold, the ISL9220B charger delivers a small current to trickle charge the battery until the voltage reaches the fast charge threshold value. When VBAT is below VPCHG, the ISL9220B operates as a linear regulator, providing a 50mA constant current to output. When VBAT reaches VPCHG, the ISL9220B starts to operate as a switching charger and delivers the programmed fast charge current. Charge Cycle A charge cycle consists of three charge modes: trickle mode, constant current (CC) mode, and constant voltage (CV) mode. The charge cycle always starts with the trickle mode until the battery voltage stays above VPCHG (2.5V typical). If the battery voltage stays below VPCHG, the charger stays in the trickle mode. The charger moves to the CC mode after the battery voltage is above VPCHG. As the battery-pack terminal voltage rises to the final charge voltage, the CV mode begins. Since the battery terminal voltage is regulated at the constant output voltage in the CV mode, the charge current is expected to decline as the cell voltage rises. After the charge current drops below the end-of-charge level, which also programmable by RISET2, the ISL9220B indicates the end-of-charge (EOC) with STAT1 and STAT2 and terminates the charge. The following events initiate a new charge cycle: • POR • A new battery being inserted (detected by RTH pin) • Recovery from an battery over-temperature fault • The EN pin is toggled from HI to LO Recharge After a charge cycle completes at a timeout event, charging is prohibited until the recharge condition (VBAT < VRECHG) is met. Then the charging restarts with the timer reset to zero. Inductor and Output Capacitor Selection To achieve better steady state and transient response, ISL9220B typically uses a 10μH inductor. The peak-to-peak inductor current ripple can be expressed in Equation 8: 10 V BAT⎞ ⎛ V BAT • ⎜ 1 – --------------⎟ V IN ⎠ ⎝ ΔI = --------------------------------------------------L • fS (EQ. 8) In Equation 8, usually the typical values can be used but to have a more conservative estimation, the inductance should consider the value with the worst case tolerance; and for switching frequency fS, the minimum fS from the “Electrical Specifications” table on page 4 can be used. A worst case for the charge current ripple is when the battery voltage is half of the input voltage. To select the inductor, its saturation current rating should be at least higher than the sum of the maximum output current and half of the delta calculated from Equation 8. Another more conservative approach is to select the inductor with the current rating higher than the peak current limit. Another consideration is the inductor DC resistance since it directly affects the efficiency of the converter. Ideally, the inductor with the lower DC resistance should be considered to achieve higher efficiency. Inductor specifications could be different from different manufacturers so please check with each manufacturer if additional information is needed. For the output capacitor, a ceramic capacitor can be used because of the low ESR values, which helps to minimize the output voltage ripple. A typical value of 10μF/10V ceramic capacitor should be enough for most of the applications and the capacitor should be X5R or X7R. Board Layout Recommendations The ISL9220B is a high frequency switching charger and hence the PCB layout is a very important design practice to ensure a satisfactory performance. The power loop is composed of the output inductor L, the output capacitor COUT, the SW pin and the PGND pin. It is important to make the power loop as small as possible and the connecting traces among them should be direct, short and wide; the same practice should be applied to the connection of the VIN pin, the input capacitor CIN and PGND. The switching node of the converter, the SW pin, and the traces connected to this node are very noisy, so keep the voltage feedback trace and other noise sensitive traces away from these noisy traces. The input capacitor should be placed as close as possible to the VIN pin. The ground of the input and output capacitors should be connected as close as possible as well. In addition, a solid ground plane is helpful for a good EMI performance. The ISL9220B employs a thermal enhanced QFN package with an exposed pad. In order to maximize the current capability, it is very important that the exposed pad under the package be properly soldered to the board FN7652.1 July 2, 2010 ISL9220B and also be connected to other layers through thermal vias. More thermal vias and more copper attached to the exposed pad usually result in better thermal performance. The exposed pad is big enough for 5 vias, as shown in Figure 4. FIGURE FIGURE 4.4. 11 Charging Flow Chart The charging flow chart is shown in Figure 5. The charging starts with trickle charge current, the ISL9220B charges the battery in 50mA. If VBAT reaches VPCHG before the trickle charge timeout interval, the operation will move to the CC mode. When the output voltage reaches the 4.2V final voltage, the operation will move to CV mode, where the battery is charged at a constant voltage. If the end-of-charge current is reached before the timeout interval is elapsed, the operation moves to charge complete state. The charging is terminated. After the termination, if the output voltage drops below the recharge threshold, a recharge starts and the timer is reset to zero. In the event that the timeout condition is reached before the EOC condition is reached, the fault mode is entered. The fault mode can also be triggered by a VBAT OVP event. To exit the fault mode, the input power has to be removed and re-applied, or the EN pin is toggled to HI and back to LO, then a new cycle starts. FN7652.1 July 2, 2010 ISL9220B FIGURE 5. CHARGING FLOW CHART 12 FN7652.1 July 2, 2010 ISL9220B Typical Operating Conditions VIN = 12V CC MODE 95 VBAT = 3.6V EFFICIENCY (%) 90 VBAT = 4V 85 VBAT = 3V 80 75 VIN = 5V 70 L = 10μH 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 CHARGE CURRENT (A) FIGURE 6. PWM WAVEFORM, CH1 = SW (5V/DIV); CH4 = INDUCTOR CURRENT (500mA/DIV) 13 FIGURE 7. EFFICIENCY vs LOAD FN7652.1 July 2, 2010 ISL9220B Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION CHANGE 7/1/10 FN7652.1 Changed minimum limit for “IPCHG” on page 4 from 30 to 25mA. On page 4, changed "Minimum On-Time" with typical 20ns to “Minimum Duty Cycle” w/typical of 0% 6/30/10 FN7652.0 Initial release. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL9220B To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 FN7652.1 July 2, 2010 ISL9220B Package Outline Drawing L20.4x4E 20 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 4/10 4X 2.00 4.00 16X 0.50 A B 16 6 PIN 1 INDEX AREA 6 PIN #1 INDEX AREA 20 1 4.00 15 2 . 60 11 (4X) 5 0.15 6 10 TOP VIEW 0.10 M C A B 20X 0 . 40 ±0.10 4 0.23 +0.07/- 0.05 BOTTOM VIEW SEE DETAIL "X" 0.10 C 0.75 C BASE PLANE SEATING PLANE 0.08 C SIDE VIEW (3.8 TYP) ( ( 16X 0 . 50 ) 2 . 60 ) C ( 20X 0 . 23 ) ( 20 X 0 . 60 ) 0 . 2 REF 5 0 . 00 MIN. 0 . 05 MAX. TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 15 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. JEDEC reference drawing: MO-229. FN7652.1 July 2, 2010