Electrical Specifications Subject to Change LTC4010 High Efficiency Standalone Nickel Battery Charger U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®4010 provides a complete, cost-effective nickel battery fast charge solution in a small package using few external components. A 550kHz PWM current source controller and all necessary charge initiation, monitoring and termination control circuitry are included. Complete NiMH/NiCd Charger for 1 to 16 Cells No Microcontroller or Firmware Required 550kHz PWM Current Source Controller No Audible Noise with Ceramic Capacitors Wide Input Voltage Range: 5.5V to 34V Programmable Charge Current: 5% Accuracy Automatic Trickle Precharge –∆V Fast Charge Termination Optional ∆T/∆t Fast Charge Termination Optional Temperature Qualification Automatic NiMH Top-Off Charge Programmable Maximum Charging Durations Automatic Recharge Multiple Status Outputs Micropower Shutdown 16-Lead Thermally Enhanced TSSOP Package The LTC4010 automatically senses the presence of a DC adapter and battery insertion or removal. When an external DC source is not present, the LTC4010 enters shutdown and supply current drawn from an installed battery drops to the lowest possible level. Heavily discharged batteries are precharged with a trickle current. The LTC4010 can simultaneously use both –∆V and ∆T/∆t fast charge termination techniques and can detect various battery faults. If necessary, a top-off charge is automatically applied to NiMH batteries after fast charging is completed. The IC will also resume charging if the battery selfdischarges after a full charge cycle. U APPLICATIO S ■ ■ ■ ■ All LTC4010 charging operations are qualified by actual charge time and maximum average cell voltage. Charging may also be gated by minimum and maximum temperature limits. NiMH or NiCd fast charge termination parameters are pin selectable. Integrated or Standalone Battery Charger Portable Instruments or Consumer Products Battery-Powered Diagnostics and Control Back-Up Battery Management , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO 2A NiMH Battery Charger 3k 10µF LTC4010 FAULT CHRG READY TIMER 49.9k VCC TGATE BGATE 10µH PGND SENSE GND CHEM 0.05Ω BAT 10k 10µF 10k VCDIV VCELL 33nF 0.1µF Typical NiMH Charge at 1.25C 2-CELL NiMH PACK WITH 10k NTC INTVDD VTEMP 2.2 50 2.0 45 1.8 40 1.6 35 TOP OFF CHARGE 1.4 30 1.2 25 1.0 0 10 20 30 40 TIME (MINUTES) 50 60 CELL CASE TEMPERATURE (°C) R TO SYSTEM LOAD AVERAGE CELL VOLTAGE (V) FROM ADAPTER 5.5V TO 34V 20 4011 TA01b 68nF 4010 TA01a 4010p 1 LTC4010 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) VCC (Input Supply) to GND ....................... –0.3V to 40V FAULT, CHRG, VCELL, VCDIV, BAT or READY to GND .......................... –0.3V to VCC + 0.3V SENSE to BAT ...................................................... ±0.3V CHEM, VTEMP or TIMER to GND .............. –0.3V to 3.5V PGND to GND ...................................................... ±0.3V Current Sink: FAULT, CHRG or READY ................ 40mA VCDIV Current Sink ............................................... 20mA Output Current: BGATE to TGATE .................... ±200mA Operating Ambient Temperature Range (Note 2) .................................................. – 40°C to 85°C Operating Junction Temperature (Note 3) ........... 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER TOP VIEW FAULT 1 16 READY CHRG 2 15 VCC CHEM 3 14 TGATE GND 4 VTEMP 5 12 BGATE VCELL 6 11 INTVDD VCDIV 7 10 BAT TIMER 8 9 LTC4010EFE 13 PGND 17 SENSE FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 125°C, θJA = 38°C/W EXPOSED PAD (PIN 17) IS GND. MUST BE SOLDERED TO PCB TO OBTAIN SPECIFIED THERMAL RESISTANCE Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Supply ● VCC Input Voltage Range 34 V ISHDN Shutdown Quiescent Current VCC = BAT = 4.8V ● 4.5 5 10 µA IQ Quiescent Current Waiting to Charge (Pause) ● 3 4.5 mA ICC Operating Current Fast Charge State, No Gate Load ● 5 7 mA VUVLO Undervoltage Threshold Voltage VCC Increasing ● 4.25 4.35 VUV(HYST) Undervoltage Hysteresis Voltage VSHDNI Shutdown Threshold Voltage DCIN – VCC, DCIN Increasing ● 45 65 90 mV VSHDND Shutdown Threshold Voltage DCIN – VCC, DCIN Decreasing ● 15 25 38 mV VCE Charge Enable Threshold Voltage VCC – BAT, VCC Increasing ● 455 545 mV VDD Output Voltage No Load ● 4.5 5 5.5 V IDD Short-Circuit Current (Note 5) INTVDD = 0V ● 28 50 100 mA INTVDD(MIN) Output Voltage VCC = 4.5V, IDD = –10mA ● 3.85 4.15 170 V mV INTVDD Regulator V PWM Current Source VFS BAT – SENSE Full-Scale Regulation Voltage (Fast Charge) 0.3V < BAT < VCC – 0.1V, 0°C < TA < 50°C ● 95 100 105 mV VPC BAT – SENSE Precharge Regulation Voltage 0.3V < BAT < VCC – 0.1V, 0°C < TA < 50°C ● 17 20 23 mV VTC BAT – SENSE Top-Off Charge Regulation Voltage 0.3V < BAT < VCC – 0.1V, 0°C < TA < 50°C ● 7.5 10 12.5 mV 4010p 2 LTC4010 ELECTRICAL CHARACTERISTICS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS ∆VLI BAT – SENSE Line Regulation 5.5V < VCC < 34V, Fast Charge IBAT BAT Input Bias Current 0.3V < BAT < VCC – 0.1V ISENSE SENSE Input Bias Current SENSE = BAT IOFF Input Bias Current SENSE or BAT, VCELL = 0V fTYP fMIN DCMAX Maximum Duty Cycle VOL(TG) TGATE Output Voltage Low (Note 6) VOH(TG) TGATE Output Voltage High tR(TG) TGATE Rise Time CLOAD = 3nF, 10% to 90% tF(TG) TGATE Fall Time CLOAD = 3nF, 10% to 90% VOL(BG) BGATE Output Voltage Low No Load ● VOH(BG) BGATE Output Voltage High No Load ● tR(BG) BGATE Rise Time CLOAD = 1.6nF, 10% to 90% tF(BG) BGATE Fall Time CLOAD = 1.6nF, 10% to 90% Analog Channel Leakage 0V < VCELL < 2V, 0V < VTEMP < 2V MIN TYP MAX UNITS 1 TBD mV –2 0 2 mA ● 50 150 µA ● –1 0 1 µA Typical Switching Frequency ● 485 550 615 kHz Minimum Switching Frequency ● 20 30 98 99 VCC ≥ 9V, No Load (VCC – TGATE) VCC ≤ 7.5V, No Load ● ● 5.35 6.3 8.75 50 V mV VCC – TGATE, No Load ● 0 50 mV 35 50 ns 45 100 ns 0 50 mV INTVDD – 0.05 INTVDD V 30 65 ns 10 25 ns kHz % ADC Inputs ILEAK nA ±100 Charger Thresholds VBP Battery Present Threshold Voltage ● 340 350 360 VBOV Battery Overvoltage ● 1.9 1.95 2 VMFC Minimum Fast Charge Voltage ● 875 900 925 mV VFCBF Fast Charge Battery Fault Voltage ● 1.17 1.22 1.27 V ∆VV(TERM) –∆V Termination CHEM = Open (NiCd) CHEM = 0V (NiMH) ● ● 18 8.5 20 10 22.0 11.5 mV mV VAR Automatic Recharge Voltage VCELL Decreasing ● 1.275 1.325 1.375 V ∆VT(TERM) ∆T Termination (Note 7) CHEM = Open (NiCd) CHEM = 0V (NiMH) ● ● 1.84 0.86 2 1 2.16 1.14 °C/MIN °C/MIN VT(MIN) Minimum Charging Temperature (Note 7) VTEMP Increasing ● 3 5 7 °C VT(MAXI) Maximum Charge Initiation Temperature (Note 7) VTEMP Decreasing, Not Charging ● 43 45 47 °C VT(MAXC) Maximum Charging Temperature (Note 7) VTEMP Decreasing, Charging ● 58 60 62 °C VTEMP(D) VTEMP Disable Threshold Voltage ● 2.85 3.3 V VTEMP(P) Pause Threshold Voltage ● 160 280 mV ● –10 10 % ● –15 15 % mV V Charger Timing ∆tTIMER Internal Time Base Error ∆tMAX Programmable Timer Error RTIMER = 49.9k 4010p 3 LTC4010 ELECTRICAL CHARACTERISTICS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 300 Status and Chemistry Select VOL Output Voltage Low All Status Outputs and VCDIV, ILOAD = 10mA ● 600 mV ILKG Output Leakage Current All Status Outputs Inactive, VOUT = VCC ● –10 10 µA IIH(VCDIV) Input Current High VCDIV = VBAT (Shutdown) ● –1 1 µA VIL Input Voltage Low CHEM (NiMH) ● 900 mV VIH Input Voltage High CHEM (NiCd) ● 2.85 IIL Input Current Low CHEM = GND ● –20 –5 µA IIH Input Current High CHEM = 3.3V ● –20 20 µA Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The LTC4010E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the – 40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Operating junction temperature TJ (in °C) is calculated from the ambient temperature TA and the total continuous package power dissipation PD (in watts) by the formula: TJ = TA + θJA • PD Refer to the Applications Information section for details. This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. V Note 4: All current into device pins are positive. All current out of device pins are negative. All voltages are referenced to GND, unless otherwise specified. Note 5: Output current may be limited by internal power dissipation. Refer to the Applications Information section for details. Note 6: Either specified output may apply for 7.5V < VCC < 9V. Note 7: These limits apply specifically to the thermistor network shown in Figure 5 in the Applications Information section and are guaranteed by specific VTEMP voltage measurements during test. 4010p 4 LTC4010 U W TYPICAL PERFOR A CE CHARACTERISTICS 1.65 36 1.60 34 1.55 32 SINGLE CELL VOLTAGE 30 1.50 1.45 28 BATTERY TEMPERATURE 1.40 26 1A 1.35 NiCd Charge at 2C NiMH Charge at 0.6C Charge Current Accuracy Charger Soft-Start BATTERY TEMPERATURE (°C) CELL VOLTAGE (V) Typical NiMH Charge Cycle at 1C 24 CHARGE CURRENT 22 80 1.30 20 0 40 60 TIME (MINUTES) 4010 G01 Charger Efficiency at DCIN = 20V, IOUT = 2A 100 0 95 10 –2 85 80 75 70 5 –4 VOLTAGE (V) CURRENT ERROR (%) 90 EFFICIENCY (%) FAST CHARGE VCC = 12V BAT = 4.8V –6 –8 60 1 0 4 0 6 8 10 12 14 16 18 20 BATTERY VOLTAGE (V) 10 20 30 TEMPERATURE (°C) 40 Fast Charge Current Line Regulation 200µs/DIV 50 Fast Charge Current Output Regulation 3 BAT = 4.8V 4010 G06 PowerPath Switching VCC = 20V 2 1 50°C 0 25°C –1 0°C 1 VOLTAGE (V) CURRENT ERROR (%) 2 CURRENT ERROR (%) PRECHARGE CURRENT 4010 G05 4010 G04 50°C 0 25°C –1 8 DCIN OPEN 4 0°C –2 –2 –3 2 –12 2 0 3 BGATE 0 FAST CHARGE CURRENT PRECHARGE –10 67 TGATE 5 0 VCC INFET DCIN –3 6 10 14 18 VCC (V) 22 26 30 4010 G07 0 4 8 BAT (V) 12 16 4010 G08 100µs/DIV 4010 G09 DC674A WITH 1kΩ SYSTEM LOAD AND 20kΩ DCIN SHUNT, CHARGER PAUSED 4010p 5 LTC4010 U U U PI FU CTIO S FAULT (Pin 1): Active-Low Fault Indicator Output. The LTC4010 indicates various battery and internal fault conditions by connecting this pin to GND. Refer to the Operation and Applications Information sections for further details. This output is capable of driving an LED and should be left floating if not used. FAULT is an open-drain output to GND with an operating voltage range of GND to VCC. CHRG (Pin 2): Active-Low Charge Indicator Output. The LTC4010 indicates it is providing charge to the battery by connecting this pin to GND. Refer to the Operation and Applications Information sections for further details. This output is capable of driving an LED and should be left floating if not used. CHRG is an open-drain output to GND with an operating voltage range of GND to VCC. CHEM (Pin 3): Battery Chemistry Selection Input. This pin should be wired to GND to select NiMH fast charge termination parameters. If a voltage greater than 2.85V is applied to this pin, or it is left floating, NiCd parameters are used. Refer to the Applications Information section for further details. Operating voltage range is GND to 3.3V. GND (Pin 4): Ground. This pin provides a single-point ground for internal references and other critical analog circuits. VTEMP (Pin 5): Battery Temperature Input. An external 10k NTC thermistor may be connected between VTEMP and GND to provide temperature-based charge qualification and additional fast charge termination control. Charging may also be paused by connecting the VTEMP pin to GND. Refer to the Operation and Applications Information sections for complete details on external thermistor networks and charge control. If this pin is not used it should be wired to INTVDD through 56k. Operating voltage range is GND to 3.3V. VCELL (Pin 6): Average Single-Cell Voltage Input. An external voltage divider between BAT and VCDIV is attached to this pin to monitor the average single-cell voltage of the battery pack. The LTC4010 uses this information to protect against catastrophic battery overvoltage and to control the charging state. Refer to the Applications Information section for further details on the external divider network. Operating voltage range is GND to BAT. VCDIV (Pin 7): Average Cell Voltage Resistor Divider Termination. The LTC4010 connects this pin to GND provided the charger is not in shutdown. VCDIV is an open-drain output to GND with an operating voltage range of GND to BAT. TIMER (Pin 8): Charge Timer Input. A resistor connected between TIMER and GND programs charge cycle timing limits. Refer to the Applications Information section for complete details. Operating voltage range is GND to 1V. SENSE (Pin 9): Charge Current Sense Input. An external resistor between this input and BAT is used to program charge current. Refer to the Applications Information section for complete details on programming charge current. Operating voltage ranges from (BAT – 50mV) to (BAT + 200mV). BAT (Pin 10): Battery Pack Connection. The LTC4010 uses the voltage on this pin to control current sourced from VCC to the battery during charging. Allowable operating voltage range is GND to VCC. INTVDD (Pin 11): Internal 5V Regulator Output. This pin provides a means of bypassing the internal 5V regulator used to power the BGATE output driver. Typically, power should not be drawn from this pin by the application circuit. Refer to the Application Information section for additional details. BGATE (Pin 12): External Synchronous N-channel MOSFET Gate Control Output. This output provides gate drive to an optional external NMOS power transistor switch used for synchronous rectification to increase efficiency in the step-down DC/DC converter. Operating voltage is GND to INTVDD. BGATE should be left floating if not used. PGND (Pin 13): Power Ground. This pin provides a return for switching currents generated by internal LTC4010 circuits. Externally, PGND and GND should be wired together using a very low impedance connection. Refer to PCB Layout Considerations in the Applications Information section for additional grounding details. 4010p 6 LTC4010 U U U PI FU CTIO S TGATE (Pin 14): External P-channel MOSFET Gate Control Output. This output provides gate drive to an external PMOS power transistor switch used in the DC/DC converter. Operating voltage range varies as a function of VCC. Refer to the Electrical Characteristics table for specific voltages. VCC (Pin 15): Power Input. External diodes normally connect either the DC input power supply or the battery to this pin. Refer to the Applications Information section for further details. Suggested applied voltage range is GND to 34V. READY (Pin 16): Active-Low Ready-to-Charge Output. The LTC4010 connects this pin to GND if proper operating voltages for charging are present. Refer to the Operation section for complete details on charge qualification. This output is capable of driving an LED and should be left floating if not used. READY is an open-drain output to GND with an operating voltage range of GND to VCC. Exposed Pad (Pin 17): This pin provides enhanced thermal properties for the TSSOP. It must be soldered to the PCB copper ground to obtain optimum thermal performance. W BLOCK DIAGRA 1 2 FAULT READY VCC UVLO AND SHUTDOWN 4 GND 3 6 15 CHEM TGATE THERMISTOR INTERFACE 5 16 CHRG VTEMP VCELL A/D CONVERTER BGATE CHARGER STATE CONTROL LOGIC PGND PWM SENSE BAT 14 13 12 9 10 BATTERY DETECTOR INTVDD VOLTAGE REGULATOR 8 7 TIMER 11 CHARGE TIMER INTERNAL VOLTAGE REGULATOR VCDIV 4010 BD VOLTAGE REFERENCE 4010p 7 LTC4010 U OPERATIO (Refer to Figure 1) SHUTDOWN NO DC ADAPTER DC ADAPTER PRESENT NO BATTERY OR VCC < 4.25V CHARGE QUALIFICATION VCELL > 350mV, ADEQUATE VCC, CHARGER ENABLED AND TEMPERATURE OK (OPTIONAL) CHECK BATTERY VCELL < 900mV PRECHARGE** (C/5 FOR tMAX/12) 0mV V CELL VCELL > 900mV NiMH ∆T/∆t TOP-OFF CHARGE** (C/10) FAST CHARGE** (1C) > 90 VCELL < 1.22V AT tMAX*/12 OR TIME = tMAX NiCd OR NiMH – ∆V tMAX/3 VCELL < 900mV VCELL < 1.325V FAULT VCELL > 1.95V OR PWM FAULTS AUTOMATIC RECHARGE 4010 F01 *tMAX IS PROGRAMMED MAXIMUM FAST CHARGE DURATION **OPTIONAL TEMPERATURE LIMITS APPLY Figure 1. LTC4010 State Diagram Shutdown State The LTC4010 remains in micropower shutdown until VCC (Pin 15) is driven above BAT (Pin 10). In shutdown all status and PWM outputs and internally generated supply voltages are inactive. Current consumption from VCC and BAT is reduced to a very low level. Charge Qualification State Once VCC is greater than BAT, the LTC4010 exits micropower shutdown, enables its own internal supplies and switches VCDIV to GND to allow measurement of the average single-cell voltage. The IC also verifies that VCC is at or above 4.25V, VCC is 500mV above BAT and VCELL is between 350mV and 1.95V. If VCELL is above 1.95V, the fault state is entered, which is described in more detail below. Once adequate voltage conditions exist for charging, READY is asserted. If the voltage between VTEMP and GND is below 200mV, the LTC4010 is paused. If VTEMP is above 200mV but below 2.85V, the LTC4010 verifies that the sensed temperature is between 5°C and 45°C. If these temperature limits are not met or if its own die temperature is too high, the LTC4010 will indicate a fault and not allow charging to begin. If VTEMP is greater than 2.85V, battery temperature related charge qualification, monitoring and termination are disabled. Once charging is fully qualified, precharge begins (unless the LTC4010 is paused). In that case, the VTEMP pin is monitored for further control. The charge status indicators and PWM outputs remain inactive until charging begins. Charge Monitoring The LTC4010 continues to monitor important voltage and temperature parameters during all charging states. If VCC drops to the BAT voltage or lower, charging stops and the shutdown state is entered. If VCC drops below 4.25V or VCELL drops below 350mV, charging stops and the LTC4010 returns to the charge qualification state. If VCELL exceeds 1.95V, charging stops and the IC enters the fault state. If an external thermistor indicates sensed temperature is 4010p 8 LTC4010 U OPERATIO (Refer to Figure 1) beyond a range of 5°C to 60°C, or the internal die temperature exceeds a resonable value, charging is suspended, the charge timer is paused and the LTC4010 indicates a fault condition. Normal charging resumes from the previous state when the sensed temperature returns to a satisfactory range. In addition, other battery faults are detected during specific charging states as described below. Precharge State If the initial voltage on VCELL is below 900mV, the LTC4010 enters the precharge state and enables the PWM current source to trickle charge using one-fifth the programmed charge current. The CHRG status output is active during precharge. The precharge state duration is limited to tMAX/12 minutes, where tMAX is the maximum fast charge period programmed with the TIMER pin. If sufficient VCELL voltage cannot be developed in this length of time, the fault state is entered, otherwise fast charge begins. Fast Charge State If adequate average single-cell voltage exists, the LTC4010 enters the fast charge state and begins charging at the programmed current set by the external current sense resistor connected between the SENSE and BAT pins. The CHRG status output is active during fast charge. If VCELL is initially above 1.325V, cell voltage processing begins immediately. Otherwise –∆V termination is disabled for a stabilization period of tMAX/12. In that case, the LTC4010 makes another fault check at tMAX/12, requiring the average cell voltage to be above 1.22V. This ensures the battery pack is accepting a fast charge. If VCELL is not above this voltage threshold, the fault state is entered. Fast charge state duration is limited to tMAX and the fault state is entered if this limit is exceeded. Charge Termination Fast charge termination parameters are dependent upon the battery chemistry selected with the CHEM pin. Voltage-based termination (–∆V) is always active after the initial voltage stabilization period. If an external thermistor network is present, chemistry-specific limits for ∆T/∆t (rate of temperature rise) are also used in the termination algorithm. Temperature-based termination, if enabled, becomes active as soon as the fast charge state is entered. Top-Off Charge State If NiMH fast charge termination occurs because the ∆T/∆t limit is exceeded after an initial period of tMAX/12 has expired, the LTC4010 enters the top-off charge state. Top-off charge is implemented by sourcing one-tenth the programmed charge current for tMAX/3 minutes to ensure that 100% charge has been delivered to the battery. The CHRG status output is active during the top-off state. If NiCd cells have been selected with the CHEM pin, the LTC4010 never enters the top-off state. Automatic Recharge State Once charging is complete, the automatic recharge state is entered to address the self-discharge characteristics of nickel chemistry cells. The charge status output is inactive during automatic recharge, but VCDIV remains switched to GND to monitor the average cell voltage. If the VCELL voltage drops below 1.325V without falling below 350mV, the charge timer is reset and a new fast charge cycle is initiated. The internal termination algorithms of the LTC4010 are adjusted when a fast charge cycle is initiated from automatic recharge, because the battery should be almost fully charged. Voltage-based termination is enabled immediately and the NiMH ∆T/∆t limit is fixed at a battery temperature rise of 1°C/minute. Fault State As discussed previously, the LTC4010 enters the fault state based on detection of invalid battery voltages during various charging phases. The IC also monitors the regulation of the PWM control loop and will enter the fault state if this is not within acceptable limits. Once in the fault state, the battery must be removed or DC input power must be cycled in order to initiate further charging. In the fault state, the FAULT output is active, the READY output is inactive, charging stops and the charge indicator output is inactive. The VCDIV output remains connected to GND to allow detection of battery removal. Note that the LTC4010 also uses the FAULT output to indicate that charging is suspended due to invalid battery or internal die temperatures. However, the IC does not enter the fault state in these cases and normal operation 4010p 9 LTC4010 U OPERATIO will resume when all temperatures return to acceptable levels. Refer to the Status Outputs section for more detail. Insertion and Removal of Batteries The LTC4010 automatically senses the insertion or removal of a battery by monitoring the VCELL pin voltage. Should this voltage fall below 350mV, the IC considers the battery to be absent. Removing and then inserting a battery causes the LTC4010 to initiate a completely new charge cycle beginning with charge qualification. External Pause Control After charging is initiated, the VTEMP pin may be used to pause operation at any time. When the voltage between VTEMP and GND drops below 200mV, the charge timer pauses, fast charge termination algorithms are inhibited and the PWM outputs are disabled. The status and VCDIV outputs all remain active. Normal function is fully restored from the previous state when pause ends. Status Outputs The LTC4010 open-drain status outputs provide valuable information about the IC’s operating state and can be used for a variety of purposes in applications. Table 1 summarizes the state of the three status outputs and the VCDIV pin as a function of LTC4010 operation. The status outputs can directly drive current-limited LEDs terminated to the DC input. The VCDIV column in Table 1 is strictly informational. VCDIV should only be used to terminate the VCELL resistor divider, as previously discussed. PWM Current Source Controller An integral part of the LTC4010 is the PWM current source controller. The charger uses a synchronous step-down architecture to produce high efficiency and limited thermal dissipation. The nominal operating frequency of 550kHz allows use of a smaller external inductor. The TGATE and BGATE outputs have internally clamped voltage swings. They source peak currents tailored to smaller surfacemount power FETs likely to appear in applications providing an average charge current of 3A or less. During the various charging states, the LTC4010 uses the PWM controller to regulate an average voltage between SENSE and BAT that ranges from 10mV to 100mV. A conceptual diagram of the LTC4010 PWM control loop is shown in Figure 2. The voltage across the external current programming resistor RSENSE is averaged by integrating error amplifier EA. An internal programming current is also pulled from input resistor R1. The IPROG • R1 product establishes the desired average voltage drop across RSENSE, and hence, the average current through RSENSE. The ITH output of the error amplifier is a scaled control current for the input of the PWM comparator CC. The ITH • R3 product sets a peak LTC4010 VCC 14 12 9 TGATE Q BGATE SENSE R3 BAT R4 RSENSE Table 1. LTC4010 Status Pins 10 READY FAULT CHRG VCDIV CHARGER STATE Off Off Off Off Off R1 On Off Off On Ready to Charge (VTEMP Held Low) or Automatic Recharge R2 On Off On On Precharge, Fast or Top Off Charge (May be Paused) On On On or Off On Temperature Limits Exceeded Off On Off On Fault State (Latched) PWM CLOCK S R CC – ITH + EA IPROG 4010 F02 Figure 2. LTC4010 PWM Control Loop 4010p 10 LTC4010 U OPERATIO current threshold for CC such that the desired average current through RSENSE is maintained. The current comparator output does this by switching the state of the SR latch at the appropriate time. At the beginning of each oscillator cycle, the PWM clock sets the SR latch and the external P-channel MOSFET is switched on (N-channel MOSFET switched off) to refresh the current carried by the external inductor. The inductor current and voltage drop across RSENSE begin to rise linearly. During normal operation, the PFET is turned off (NFET on) during the cycle by CC when the voltage difference across RSENSE reaches the peak value set by the output of EA. The inductor current then ramps down linearly until the next rising PWM clock edge. This closes the loop and maintains the desired average charge current in the external inductor. Low Dropout Charging After charging is initiated, the LTC4010 does not require that VCC remain at least 500mV above BAT because situations exist where low dropout charging might occur. In one instance, parasitic series resistance may limit PWM headroom (between VCC and BAT) as 100% charge is reached. A second case can arise when the DC adapter selected by the end user is not capable of delivering the current programmed by RSENSE, causing the output voltage of the adapter to collapse. While in low dropout, the LTC4010 PWM runs near 100% duty cycle with a frequency that may not be constant and can be less than 550kHz. The charge current will drop below the programmed value to avoid generating audible noise, so the actual charge delivered to the battery may depend primarily on the LTC4010 charge timer. Internal Die Temperature The LTC4010 provides internal overtemperature detection to protect against electrical overstress, primarily at the FET driver outputs. If the die temperature rises above this thermal limit, the LTC4010 stops switching and indicates a fault as previously discussed. U W U U APPLICATIO S I FOR ATIO External DC Source The external DC power source should be connected to the charging system and the VCC pin through a power diode acting as an input rectifier. This prevents catastrophic system damage in the event of reverse-voltage polarity at the DC input. The LTC4010 automatically senses when this input drives the VCC pin above BAT. The open-circuit voltage of the DC source should be between 5.5V and 34V, depending on the number of cells being charged. In order to avoid low dropout operation, ensure 100% capacity at charge termination, and allow reliable detection of battery insertion, removal or overvoltage, the following equation can be used to determine the minimum full-load voltage that should be produced at VCC when the external DC power source is connected. VCC(MIN) = (n • 2V) + 0.3V where n is the number of series cells in the battery pack. The LTC4010 will properly charge over a wide range of VCC and BAT voltage combinations. Operating the LTC4010 in low dropout or with VCC much greater than BAT will force the PWM frequency to be much less than 550kHz. The LTC4010 disables charging and sets a fault if a large VCC to BAT differential would cause generation of audible noise. Load Control Proper current load control is an important consideration when fast charging nickel cells. This control ensures that the system load remains powered at all times, but that normal system operation and associated load transients do not adversely affect fast charge termination. The input protecton detailed in the previous paragraph is an integral part of the necessary load control. The battery should also be connected to the raw system supply by some rectifying means, thus forming a switch that 4010p 11 LTC4010 U W U U APPLICATIO S I FOR ATIO selects the battery for system power only if an external DC source is not present. coefficient and sufficient power dissipation capability to avoid self-heating effects is recommended. Battery Chemistry Selection Programming Maximum Charge Times The desired battery chemistry is selected by programming the CHEM pin to the proper voltage. If it is wired to GND, a set of parameters specific to charging NiMH cells is selected. When CHEM is left floating, charging is optimized for NiCd cells. The various charging parameters are detailed in Table 2. Connecting the appropriate resistor between the TIMER pin and GND programs the maximum duration of various charging states. To some degree, the value should reflect how closely the programmed charge current matches the 1C rate of targeted battery packs. The maximum fast charge period is determined by the following equation: Programming Charge Current RTIMER = Charge current is programmed using the following equation: RSENSE = 100mV IPROG RSENSE is an external resistor connected between the SENSE and BAT pins. A 1% resistor with a low temperature tMAX (Hours) (Ω ) 30 • 10 –6 Some typical timing values are detailed in Table 3. RTIMER should not be less than 15k. The actual time limits used by the LTC4010 have a resolution of approximately ±30 seconds in addition to the tolerances given the Electrical Characteristics table. The maximum time period is approximately 4.3 hours. Table 2. LTC4010 Charging Parameters STATE CHEM PIN BAT CHEMISTRY TIMER PC FC TMIN TMAX ICHRG TERMINATION CONDITION Both tMAX/12 5°C 45°C IPROG/5 Open NiCd tMAX 5°C 60°C IPROG Timer Expires –20mV per Cell or 2°C/Minute GND NiMH tMAX 5°C 60°C IPROG 1.5°C/Minute for First tMAX/12 Minutes if Initial VCELL < 1.325V –10mV per Cell or 1°C/Minute After tMAX/12 Minutes or if Initial VCELL > 1.325V TOC GND NiMH AR tMAX/3 Both 5°C 60°C IPROG/10 Timer Expires 5°C 45°C 0 VCELL < 1.325V PC: Precharge FC: Fast Charge (Initial –∆V Termination Hold Off of tMAX/12 Minutes May Apply) TOC: Top-Off Charge (Only for NiMH ∆T/∆t FC Termination After Initial tMAX/12 Period) AR: Automatic Recharge (Temperature Limits Apply to State Termination Only) Table 3. LTC4010 Time Limit Programming Examples RTIMER TYPICAL FAST CHARGE RATE PRECHARGE LIMIT (MINUTES) FAST CHARGE VOLTAGE STABILIZATION (MINUTES) FAST CHARGE LIMIT (HOURS) TOP-OFF CHARGE (MINUTES) 24.9k 2C 3.8 3.8 0.75 15 33.2k 1.5C 5 5 1 20 49.9k 1C 7.5 7.5 1.5 30 66.5k 0.75C 10 10 2 40 100k C/2 15 15 3 60 4010p 12 LTC4010 U W U U APPLICATIO S I FOR ATIO Cell Voltage Network Design An external resistor network is required to provide the average single-cell voltage to the VCELL pin of the LTC4010. The proper circuit for multicell packs is shown in Figure 3. The ratio of R2 to R1 should be a factor of (n – 1), where n is the number of series cells in the battery pack. The value of R1 should be between 1k and 100k. This range limits the sensing error caused by VCELL leakage current and prevents the ON resistance of the internal NFET between VCDIV and GND from causing a significant error in the VCELL voltage. The external resistor network is also used to detect battery insertion and removal. The filter formed by C1 and the parallel combination of R1 and R2 is recommended for rejecting PWM switching noise. The value of C1 should be chosen to yield a 1st order lowpass frequency of less than 500Hz. In the case of a single cell, the external application circuit shown in Figure 4 is recommended to provide the necessary noise filtering and missing battery detection. FOR TWO OR MORE SERIES CELLS BAT 10 LTC4010 VCELL VCDIV + R2 6 R1 C1 7 best with a 1% 10k NTC thermistor with a β of 3750. However, the LTC4010 will operate satisfactorily with other 10k NTC thermistors having slightly different nominal exponential temperature coefficients. For these thermistors, the temperature related limits given in the Electrical Characteristics table may not strictly apply. The filter formed by C1 in Figure 5 is optional but recommended for rejecting PWM switching noise. VTEMP C1 68nF 5 RT 10k NTC 4010 F05 Figure 5. External NTC Thermistor Network Disabling Thermistor Functions Temperature sensing is optional in LTC4010 applications. For low cost systems where temperature sensing may not be required, the VTEMP pin may simply be wired to INTVDD through 56k to disable temperature qualification of all charging operations. However, this practice is not recommended for NiMH cells charged well above or below their 1C rate, because fast charge termination based solely on voltage inflection may not be adequate to protect the battery from a severe overcharge. R2 = R1(n – 1) GND INTVDD Regulator Output 4 4010 F03 Figure 3. Multiple Cell Voltage Divider 10 7 6 BAT VCDIV 1 CELL 10k 10k VCELL 33nF If BGATE is left open, the INTVDD pin of the LTC4010 can be used as an additional source of regulated voltage in the host system any time READY is active. Switching loads on INTVDD may reduce the accuracy of internal analog circuits used to monitor and terminate fast charging. In addition, DC current drawn from the INTVDD pin can greatly increase internal power dissipation at elevated VCC voltages. A minimum ceramic bypass capacitor of 0.1µF is recommended. 4010 F04 Figure 4. Single-Cell Monitor Network External Thermistor The network for proper temperature sensing using a thermistor with a negative temperature coefficient (NTC) is shown in Figure 5. The LTC4010 is designed to work Calculating Average Power Dissipation The user should ensure that the maximum rated IC junction temperature is not exceeded under all operating conditions. The thermal resistance of the LTC4010 package (θJA) is 38°C/W, provided the exposed metal pad is properly soldered to the PCB. The actual thermal resistance in 4010p 13 LTC4010 U W U U APPLICATIO S I FOR ATIO the application will depend on the amount of PCB copper to which the package is soldered. Feedthrough vias directly below the package that connect to inner copper layers are helpful in lowering thermal resistance. The following formula may be used to estimate the maximum average power dissipation PD (in watts) of the LTC4010 under normal operating conditions. PD = VCC (7.3mA + IDD + 615k(Q TGATE + QBGATE )) ⎛V –V ⎞ – 3.85IDD + 60n ⎜ CC LED ⎟ ⎝ RLED + 30 ⎠ 2 where: IDD = Average external INTVDD load current, if any QTGATE = Gate charge of external P-channel MOSFET in coulombs QBGATE = Gate charge of external N-channel MOSFET (if used) in coulombs VLED = Maximum external LED forward voltage RLED = External LED current-limiting resistor used in the application n = Number of LEDs driven by the LTC4010 Sample Applications Figures 6 through 8 detail sample charger applications of various complexities. Combined with the Typical FROM ADAPTER 5.5V TO 34V 10µF 3k R Application on the first page of this data sheet, these figures demonstrate some of the proper configurations of the LTC4010. MOSFET body diodes are shown in these figures strictly for reference only. Figure 6 shows a minimum application, which might be encountered in low cost NiCd fast charge applications. The LTC4010 uses –∆V to terminate the fast charge state, as no external temperature information is available. Nonsynchronous PWM switching is employed to reduce external component cost. A single LED indicates charging status. A full-featured 2A LTC4010 application is shown in Figure 7. The inherent voltage ratings of the VCELL, VCDIV, SENSE and BAT pins allow charging of from one to sixteen series nickel cells in this application, governed only by the VCC overhead limits previously discussed. The application includes all average cell voltage and battery temperature sensing circuitry required for the LTC4010 to utilize its full range of charge qualification, safety monitoring and fast charge termination features. The VTEMP thermister network allows the LTC4010 to accurately terminate fast charge under a variety of applied charge rates. Use of a synchronous PWM topology improves efficiency and reduces excess heat generation. A green LED indicates valid DC input voltage and installed battery, while a red LED indicates charging. Fault conditions are indicated by a yellow LED. The grounded CHEM pin selects the NiMH charge termination parameter set. TO SYSTEM LOAD LTC4010 FAULT CHRG READY TIMER 49.9k VCC TGATE BGATE 10µH PGND SENSE GND 0.1Ω BAT 10µF 10k 0.1µF VCDIV CHEM VCELL INTVDD VTEMP NiCd PACK 4010 F06 33nF 56k Figure 6. Minimum LTC4010 Application 4010p 14 LTC4010 U W U U APPLICATIO S I FOR ATIO R1 10k FROM ADAPTER 5.5V TO 34V 20k G R 20µF Y D1 6V LTC4010 FAULT CHRG READY TO SYSTEM LOAD VCC TGATE Q4 BGATE TIMER 49.9k 10µH PGND SENSE GND CHEM 0.05Ω BAT 20µF 10k VCDIV VCELL 0.1µF NiMH PACK WITH 10k NTC INTVDD VTEMP 33nF 68nF 4010 F07 Figure 7. Full-Featured 2A LTC4010 Application P-channel MOSFET Q4 functions as a switch to connect the battery to the system load whenever the DC input adapter is removed. If the maximum battery voltage is less than the maximum rated VGS of Q4, diode D1 and resistor R1 are not required. Otherwise choose the Zener voltage of D1 to be less than the maximum rated VGS of Q4. R1 provides a bias current of (VBAT – VZENER)/(R1 + 20k) for D1 when the input adapter is removed. Choose R1 to make this current, which is drawn from the battery, just large enough to develop the desired VGS across D1. While the LTC4010 is a complete, standalone solution, Figure 8 shows that it can also be interfaced to a host microprocessor. The MCU can control the charger directly with an open-drain I/O port connected to the VTEMP pin, if that port is low leakage and can tolerate at least 2V. The charger state is monitored on the three LTC4010 status outputs. Charging of NiMH batteries is selected in this example. However, NiCd parameters could be chosen as well. Unlike all of the other applications discussed so far, the battery continues to power the system during charging. The MCU could be powered directly from the battery or from any type of post regulator operating from the battery. In this configuration, the LTC4010 relies expressly on the ability of the host MCU to know when load transients will be encountered. The MCU should then pause charging (and thus –∆V processing) during those events to avoid premature fast charge termination. If the MPU cannot reliably perform this function, the battery should be disconnected from the load with a rectifier or switch during charging. Excessive battery load current variations, such as those generated by a post-regulating PWM, can generate sufficient voltage noise to cause the LTC4010 to prematurely terminate a charge cycle and/or prematurely restart a fast charge. In this case, it may be necessary to inhibit the LTC4010 after charging is complete until external gas gauge circuitry indicates that recharging is necessary. Shutdown power is applied to the LTC4010 through the body diode of the P-channel MOSFET in this application. Waveforms Sample waveforms for a standalone application during a typical charge cycle are shown in Figure 9. Note that these waveforms are not to scale and do not represent the complete range of possible activity. The figure is simply intended to allow better conceptual understanding and to highlight the relative behavior of certain signals generated by the LTC4010 during a typical charge cycle. Initially, the LTC4010 is in low power shutdown as the system operates from a heavily discharged battery. A DC adapter is then connected such that VCC rises above 4.25V 4010p 15 LTC4010 U W U U APPLICATIO S I FOR ATIO FROM ADAPTER 5.5V TO 34V V+ 10µF LTC4010 FAULT CHRG READY VCC TGATE BGATE TIMER 49.9k 10µH PGND SENSE 0.1Ω GND CHEM BAT TO SYSTEM LOAD 10µF 10k VCDIV VCELL 33nF 0.1µF NiCd PACK WITH 10k NTC INTVDD VTEMP 68nF PAUSE FROM MCU 4010 F08 Figure 8. LTC4010 with MCU Interface SHDN DCIN PRECHARGE FAST CHARGE TOP-OFF AUTO RECHARGE SHDN VCC = 4.25V READY VCDIV TGATE VCELL VTEMP (PAUSE) 0.9V 200mV CHRG EXTERNAL PAUSE 4010 F09 Figure 9. Charging Waveforms Example 4010p 16 LTC4010 U W U U APPLICATIO S I FOR ATIO and is 500mV above BAT. The READY output is asserted when the LTC4010 completes charge qualification. When the LTC4010 determines charging should begin, it starts a precharge cycle because VCELL is less than 900mV. As long as the temperature remains within prescribed limits, the LTC4010 charges (TGATE switching), applying limited current to the battery with the PWM in order to bring the average cell voltage to 900mV. When the precharge state timer expires, the LTC4010 begins fast charge if VCELL is greater than 900mV. The PWM, charge timer and internal termination control are suspended if pause is asserted (VCELL < 200mV), but all status outputs continue to indicate charging is in progress. The fast charge state continues until the selected voltage or temperature termination criteria are met. Figure 9 suggests termination based on ∆T/∆t, which for NiMH would be an increase of 1°C per minute. Because NiMH charging terminated due to ∆T/∆t and the fast charge cycle had lasted more than tMAX/12 minutes, the LTC4010 begins a top-off charge with a current of IPROG/10. Top-off is an internally timed charge of tMAX/3 minutes with the CHRG output continuously asserted. Finally, the LTC4010 enters the automatic recharge state where the CHRG output is deasserted. The PWM is disabled but VCDIV remains asserted to monitor VCELL. The charge timer will be reset and fast charging will resume if VCELL drops below 1.325V. The LTC4010 enters shutdown when the DC adapter is removed, minimizing current draw from the battery in the absence of an input power source. While not a part of the sample waveforms of Figure 9, temperature qualification is an ongoing part of the charging process, if an external thermistor network is detected by the LTC4010. Should prescribed temperature limits be exceeded during any particular charging state, charging would be suspended until the sensed temperature returned to an acceptable range. provide customized information to an LTC4010-based charger, allowing a single design to service a wide range of application batteries. Assume the charger is designed to provide a maximum charge current of 800mA (RSENSE = 125mΩ). Figure 10 shows a 5V NiCd battery pack for which 800mA represents a 0.75C rate. When connected to the charger, this pack would provide battery temperature information and correctly configure both fast charge termination parameters and time limits for the internal NiCd cells. A second possibility is to configure an LTC4010-based charger to accept battery packs with varying numbers of cells. By including R2 of the average cell voltage divider network shown in Figure 3, battery-based programming of the number of series-stacked cells could be realized without defeating LTC4010 detection of battery insertion or removal. Figure 11 shows a 2.5V NiMH battery pack that programs the correct number of series cells when it is connected to the charger, along with indicating chemistry and providing temperature information. Any of these battery pack charge control concepts could be combined in a variety of ways to service custom application needs. TIMER CHEM VTEMP 8 3 5 NC + 10k NTC 66.5k 1200mAhr NiCd CELLS – 4010 F10 Figure 10. NiCd Battery Pack with Time Limit Control CHEM VTEMP VCELL 3 5 6 10k NTC + R2 BATTERY PACK 1500mAhr NiMH CELLS Battery-Controlled Charging Because of the programming arrangement of the LTC4010, it may be possible to configure it for battery-controlled charging. In this case, the battery pack is designed to BATTERY PACK – 4010 F11 Figure 11. NiMH Battery Pack Indicating Number of Cells 4010p 17 LTC4010 U W U U APPLICATIO S I FOR ATIO PCB Layout Considerations To prevent magnetic and electrical field radiation and high frequency resonant problems, proper layout of the components connected to the LTC4010 is essential. Refer to Figure 12. For maximum efficiency, the switch node rise and fall times should be minimized. The following PCB design priority list will help ensure proper topology. Layout the PCB using this specific order. 1. Input capacitors should be placed as close as possible to switching FET supply and ground connections with the shortest copper traces possible. The switching FETs must be on the same layer of copper as the input capacitors. Vias should not be used to make these connections. 2. Place the LTC4010 close to the switching FET gate terminals, keeping the connecting traces short to produce clean drive signals. This rule also applies to IC supply and ground pins that connect to the switching FET source pins. The IC can be placed on the opposite side of the PCB from the switching FETs. 3. Place the inductor input as close as possible to the drain of the switching FETs. Minimize the surface area of the switch node. Make the trace width the minimum needed to support the programmed charge current. Use no copper fills or pours. Avoid running the connection on multiple copper layers in parallel. Minimize capacitance from the switch node to any other trace or plane. 4. Place the charge current sense resistor immediately adjacent to the inductor output, and orient it such that current sense traces to the LTC4010 are not long. These feedback traces need to be run together as a single pair with the smallest spacing possible on any given layer on which they are routed. Locate any filter component on these traces next to the LTC4010, and not at the sense resistor location. 5. Place output capacitors next to the sense resisitor output and ground. 6. Output capacitor ground connections must feed into the same copper that connects to the input capacitor ground before tying back into system ground. 7. Connection of switching ground to system ground, or any internal ground plane should be single-point. If the system has an internal system ground plane, a good way to do this is to cluster vias into a single star point to make the connection. 8. Route analog ground as a trace tied back to the LTC4010 GND pin before connecting to any other ground. Avoid using the system ground plane. A useful CAD technique is to make analog ground a separate ground net and use a 0Ω resistor to connect analog ground to system ground. 9. A good rule of thumb for via count in a given high current path is to use 0.5A per via. Be consistent when applying this rule. 10. If possible, place all the parts listed above on the same PCB layer. 11. Copper fills or pours are good for all power connections except as noted above in Rule 3. Copper planes on multiple layers can also be used in parallel. This helps with thermal management and lowers trace inductance, which further improves EMI performance. 12. For best current programming accuracy, provide a Kelvin connection from RSENSE to SENSE and BAT. See Figure 13 for an example. 13. It is important to minimize parasitic capacitance on the TIMER, SENSE and BAT pins. The traces connecting these pins to their respective resistors should be as short as possible. 4010p 18 LTC4010 U W U U APPLICATIO S I FOR ATIO SWITCH NODE L1 VBAT VIN CIN HIGH FREQUENCY CIRCULATING PATH D1 COUT DIRECTION OF CHARGING CURRENT BAT RSENSE 4010 F13 SWITCHING GROUND 4010 F12 BAT SENSE Figure 12. High Speed Switching Path Figure 13. Kelvin Sensing of Charge Current U PACKAGE DESCRIPTIO FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation BC 4.90 – 5.10* (.193 – .201) 3.58 (.141) 3.58 (.141) 16 1514 13 12 1110 6.60 ±0.10 9 2.94 (.116) 4.50 ±0.10 6.40 2.94 (.252) (.116) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 0.25 REF 1.10 (.0433) MAX 0° – 8° 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE16 (BC) TSSOP 0204 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 4010p Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC4010 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT®1510 Constant-Voltage/Constant-Current Battery Charger Up to 1.5A Charge Current for Li-Ion, NiCd and NiMH Batteries LT1511 3A Constant-Voltage/Constant-Current Battery Charger High Efficiency, Minimum External Components to Fast Charge Lithium, NiMH and NiCd Batteries LT1513 SEPIC Constant- or Programmable-Current/ConstantVoltage Battery Charger Charger Input Voltage May be Higher, Equal to or Lower Than Battery Voltage, 500kHz Switching Frequency LTC1760 Smart Battery System Manager Autonomous Power Management and Battery Charging for Two Smart Batteries, SMBus Rev 1.1 Compliant LTC1960 Dual Battery Charger/Selector with SPI 11-Bit V-DAC, 0.8% Voltage Accuracy, 10-Bit I-DAC, 5% Current Accuracy LTC4008 High Efficiency, Programmable Voltage/Current Battery Charger Constant-Current/Constant-Voltage Switching Regulator, Resistor Voltage/Current Programming, AC Adapter Current Limit and Thermistor Sensor and Indicator Outputs LTC4011 High Efficiency Standalone Nickel Battery Charger Complete NiMH/NiCd Charger in a 20-Pin TSSOP Package, PowerPathTM Contol, Constant-Current Switching Regulator LTC4060 Standalone Linear NiMH/NiCd Fast Charger Complete NiMH/NiCd Charger in a Small Leaded or Leadless 16-Pin Package, No Sense Resistor or Blocking Diode Required LTC4100 Smart Battery Charger Controller Level 2 Charger Operates with or without MCU Host, SMBus Rev. 1.1 Compliant LTC4150 Coulomb Counter/Battery Gas Gauge High Side Sense of Charge Quantity and Polarity in a 10-Pin MSOP LTC4412 Low Loss PowerPath Controller Very Low Loss Replacement for Power Supply ORing Diodes Using Minimal External Components LTC4413 Dual, 2.6A Ideal Diode in 3mm × 3mm DFN 2.5V ≤ VIN ≤ 5.5V, Ideal Diode ORing or Load Sharing, Low Reverse Leakage Current PowerPath is a trademark of Linear Technology Corporation. 4010p 20 Linear Technology Corporation LT/TP 0205 1K • PRINTED IN THE USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005