Product Brief OPTICAL TRANSPORT & DATACOM PRODUCTS SMI4029 40-45 Gbps 16:2 Multiplexer/CMU with DQPSK Precoder Product Description SMI4029 is a 16:2 Multiplexer with on chip Clock Multiplier Unit and DQPSK Precoder that support the data rate from 40 to 45Gbps consistent with SFI-5 standard. Product Highlights 4SFI-5.1 compliant FIFO and deskew functions 4Dual ground-referenced high-speed differential output ports 0.6 to 1.0 Volt pp differential output level 11 psec (typical) rise/fall times 3.7 psec p-p total jitter (typical) Data-to-data skew adjustments for each output data lane Full BGA package to support data rates: 19.9 to 22.3 Gbaud 4 High-speed differential clock outputs with highly stable clock-data skew and low phase noise Full (22.3 nominal) and half-rate (11.15 GHz nominal) CML clocks Skew control of +/- 0.5UI on half-rate clock 0.8 Volt pp differential output level BGA launch to host printed circuit board 4SONET-compliant Clock Multiplier Unit (CMU) with VCO 4Three user selectable reference clock input ports Input reference clock rate is 1/4th client-side baud rate: 622.08 to 696.73 MHz 4Reference clock clean-up loop circuitry 4On-chip PRWS error checker and pattern generator: 27-1 or 231-1 industry-standard patterns On-chip error counter for measuring BER Lane-by-lane error checking 4SPI control interface supports wide range of logic families 1.2V or 1.8V LVCMOS 4Temperature sense output voltage 4Dual-power supply voltages: +1.2 or +1.8V and -2.8V 4BiCMOS Silicon Germanium technology for high reliability and lower cost 4Low power consumption: 2.4 Watts (typical, HSCLK outputs disabled) Applications 4 OC768/OTU3 Modules and Transponders 4 MSPP, ADM and Cross-connects 4 IP Routers and Switches W W W .SE MTE CH .COM SIERRA MONOLITHICS Product Brief SMI4029 Block Diagram RESP Bias Current Control Data Select PRBS Error Checker . . . 17 Channel DLL Array TXDATA[1]P/N TXDATA[0]P/N 17xN Channel FIFO Array TXDATA1_PH [6:0] Fixed Data PRBS Pattern 27 /231 DATA_0 WRCLK_0 DLLCLK_SEL 2:1 16: 1 ∆φ TXDATAOUT[0]P/N ∆φ TXDATAOUT[1]P/N TXDATA1 _EN DAC DAC 1, ½ HSCLK0_PH[6:0] DAC HSCLK0_ LVL [3:0] 1, ½ DAC HSCLK1_ LVL [3:0] Clock Multiplier Unit (CMU) TXMCLKP/N HSCLK0 _EN DAC HSCLK[1]P/N ∆φ HSCLK1_FSEL HSCLK1_PH[6:0] HSCLK[0]P/N ∆φ HSCLK0_FSEL X4 PLL TXDCKP/N TXDATA0 _EN DAC TXDATA1_LVL[3:0] PRBS Block TXDSCP/N TXDATA0_PH[6:0] Mux .. . DQPSK Precoder TXDATA[14]P/N DAC TXDATA0_LVL [3:0] TXDATA_SEL[1:0] Deskew DATA_15 WRCLK_15 Mux Block PRECODER_EN CMU Block TXDATA[15]P/N Select Resistor HSCLK1 _EN DAC SFI-5 Transmit Controller DESKEW _EN TXOOA SFI-5 Block PTAT Temp. Sensor TEMP SPI Subsystem SPI_EN_N SPI_CLK SPI_DIN SPI_DOUT VCC Digital VDD Digital VEE VCC VDD_SFI5 VCC_VCO VEE_VCO TXLF_N R C2 TXCKSRCP/N 2:1 PHSERR_EN PHSERR_UPP/N PHSERR_DNP/N Phase Detect REFPLL P/N TXREFCLKP/N -1.6V Reference REFN16_OUT -1.6V Regulator Diode Temp. Sensor REFN16_IN GTEMP_P GTEMP_N ADC VEE Digital TX_TEMP REFSEL Ref Select Block RESET_N Control DACs Control logic Status FRAME_EPOCH _EN Deskew Correlator VDD Control Frame Header Acquistion FRAME_LOCK TXLF_P C1 CMU_LOCK TXMCLK_EN FRAME_EPOCH 1.0 K RESN Interface Definitions SFI5 compatabile I/O LVCMOS (1.2, 1.8V) GND referenced CML AC coupled CML Sierra Monolithics Inc. is now part of Semtech Incorporated. To view the most current product specifications and datasheets, contact your local Semtech Field Applications Engineer. W W W .SE MTE CH .COM SIERRA MONOLITHICS SMI4029-PB