View detail for ATA6844-DK BLDC Motor Control Kit

APPLICATION NOTE
ATA6844-DK BLDC Motor Control Kit
ATA6844-DK
Introduction
Figure 1.
Atmel ATA6844-DK
The purpose of this document is to explain the Atmel® ATA6844-DK for BLDC motor control application.
The application kit consists of two boards (see Figure 1-1 on page 2):
● Power board with the BLDC gate driver SBC (system basis chip) Atmel ATA6844,
6 external n-channel MOSFETs and back EMF signal conditioning
● Controller board with the Atmel ATmega32M1 motor control microcontroller and
the Atmel ATmega32U2 user interface controller for UART communication.
The main difference between the Atmel ATA6843 and Atmel ATA6844 is their respective
temperature range. The maximum junction temperature of 200°C allows “under-the-hood”
design solutions with the Atmel ATA6844, while the maximum junction temperature for the
Atmel ATA6843 is 150°C. If not otherwise stated, all references to the Atmel ATA6844
apply equally to both devices.
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1.
BLDC Motor Control Kit with Atmel ATA6843/ATA6844
Figure 1-1. Block Diagram
Battery
+
CCPOUT
PBAT
CPOUT
CPHI2
CPLO2
CCP2
CPHI1
CPLO1
CCP1
VG
EN2
CVG
VINT
VBAT
CVINT
CVCC
Wake-up
VMODE
VCC
SCREF
DG1
DG2
3.3/5V VCC
Regulator
13V
Regulator
Supervisor:
Short circuit
Overtemperature
Under voltage
CP
VINT 5V
Regulator
VBG
Oscillator
High-side
Driver 3
H3
High-side
Driver 2
H2
High-side
Driver 1
H1
DG3
S3
/RESET
Atmel ATA6843/44
IL1-3
EN1
WD
Timer
LIN
CC
Timer
RWD
L1
Low-side
Driver 2
L2
Low-side
Driver 3
L3
CC
WDD
RWD
GND
LINGND
LIN
EN2
LIN
TX
Low-side
Driver 1
RCC
Back-EMF
Conditioning
PGND
Logic Control
WD
/IH1-3
RX
S1
S2
COAST
CCC
Basis board
Controller board
ATmega32M1
USB
2
ATmega32U2
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2.
Theories of BLDC Operation
Brushless DC motors are used in a growing number of applications because of several advantages, including reduced noise,
extended service life with no brush wear, reduced noise, a good weight/size-to-power ratio, and their suitability for
hazardous operation environment scenarios (with flammable product).
Motors of this kind have slight rotor inertia. Coils are attached to the stator. Commutation is controlled by electronics using
position sensor feedback or back electromotive force (back-EMF) measurements.
The BLDC motor stator basically includes three coils which can be replicated to reduce torque ripple. In the same way, rotor
basically includes permanent magnets, composed of one to more pairs of poles. This also affects step size (see Figure 2-1).
Position can be estimated either by using three Hall sensors, each spread at 120° around the stator or a greater subdivision
of higher rotor pole pair counts. Or Position can be estimated by measuring the voltage induced by the back electromotive
force, determining the voltage zero crossing.
Figure 2-1. Three Coil BLDC Motor, 1 and 2 Pair Poles
A
A
N
N
S
C
S
S
N
B
B
C
BLDC motor operation can be simplified by considering only three coils and one pair pole. Phase’s commutation depends on
the position with the Hall sensor value the easiest way to detect it. When motor coils are supplied with energy, a magnetic
field is created which sets the rotor in motion. The most elementary commutation driving method is an on-off scheme: a coil
is either conducting or not. Only two coils are supplied at the same time, the third is floating. This is referred to as trapezoidal
commutation or block commutation.
Figure 2-2. Power Stage
H1
H2
H3
A
B
C
L1
L2
L3
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Figure 2-3. Commutation Steps for CW Operation
010
011
001
A
A
A
110
B
C
100
B
C
B
C
101
Step 1
Step 2
Step 3
A
A
A
B
C
B
C
Step 4
B
C
Step 5
Step 6
Checking the Hall sensor read-out indicates whether commutation is occurring. For multiple-pole motors, electrical rotation
corresponds to mechanical rotation with the pair pole number factor.
Table 2-1.
Switches Commutation for CW and CCW Rotation
Hall Sensor Value
(CBA)
Switch Commutation for CW Rotation
Switch Commutation for CCW Rotation
Coils
Switches
Coils
Switches
101
A-B
H1 - L2
B-A
H2 - L1
001
A-C
H1 - L3
C-A
H3 - L1
011
B-C
H2 - L3
C-B
H3 - L2
010
B-A
H2 - L1
A-B
H1 - L2
110
C-A
H3 - L1
A-C
H1 - L3
100
C-B
H3 - L2
B-C
H2 - L3
Commutations are updated at each step to create a rotating magnetic field as shown in Figure 2-3.
This method takes full advantage of the Atmel® ATA6844 in combination with the Atmel ATmega32M1 because
commutations can be transmitted at each step while PWM allows independent magnetic field magnitude tuning, to act on
motor torque and speed.
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3.
BLDC Motor Position Feedback
The Atmel® ATA6844-DK hardware offers the option not only of Hall sensor feedback but also back EMF feedback. The
position feedback source can be selected by the jumpers J1, J2, and J3.
The supplied firmware applies the back EMF feedback method as rotor position feedback. Connecting Hall sensors to the
application board is thus unnecessary. X5 pins 4 - 8 can be left open.
Please refer to the Atmel application note “AVR928: Scalar Sensorless Methods to Drive BLDC Motors” for more detailed
theoretical information about back EMF.
4.
The Atmel System Basis Gate Driver ATA6843/ATA6844
The Atmel ATA6844 is designed for automotive applications requiring high-current BLDC motors. The six gate drivers are
capable of driving a wide range of n-channel power MOSFETs. To guarantee steady operation down to crank pulse, a
double charge pump provides the voltages for driving the external MOSFETs. Overvoltage lockout at 32V opens a wide
operating range beyond what is required for jump starts. Direct control of each gate output allows the BLDC to be run in all
different commutation shapes.
Diagnostic outputs immediately indicate instances of a short to battery or short to ground, possible at short circuit levels
operated externally via the SCREF pin. Battery over-/undervoltage conditions or charge pump failure are also indicated and
instantaneously switch off the gate driver outputs. In case of overtemperature, advance warning is indicated to drive into
emergency position or reduce power dissipation.
The COAST input pin acts as an emergency stop function. Applying this pin switches the outputs off instantaneously.
Dead time control is a protection feature. The CC (cross conduction) timer can be adjusted to the switch on/off requirements
of different external N-channel MOSFETs.
The Atmel ATA6844 includes a voltage regulator, LIN transceiver and window watchdog. The SBC (System Basis Chip)
capability of the Atmel ATA6844’s enables designs with a reduced component list and limited PCB space.
4.1
Cooling Area Design
The Atmel ATA6844 driver IC is housed in a QFN package. The QFN package is highly suitable for a power package
because of the exposed die pad. The head slug must be completely soldered to the PCB in order to take advantage of this
feature.
To reduce thermal resistance, vias are necessary down to the soldering layer. A suitable ground plane has to be placed on
the soldering layer to dissipate thermal energy.
A via diameter of 0.3mm to 0.4mm and a spacing of 1mm to 1.5mm has proven to be the most suitable. Some care should
be taken about the planarity of the copper area; special care should be taken to avoid all solder bumps at the thermal vias.
4.2
Ground Area Design
The common ground reference point of the BLDC ECU (electronic control unit) is located under the Atmel
ATA6843/ATA6844. The exposed die pad should be connected with the ground layer through vias. The three ground pins
GND (11), LINGND (12) and PGND (43) should be connected directly to the die pad.
The N.C. pins (10, 14, 37, 45) are connected to the die pad internally. They should also be connected to the GND plane.
The Atmel ATA6843/ATA6844 has several regulation loops. To achieve good EMC performance, the loops should be as
short as possible.
The input capacitor at VBAT 100nF and electrolytic buffer capacitor should be connected between GND input of the ECU
and the common ground reference point. The 100nF capacitor should be placed close to the Atmel ATA6844.
The ground of the VINT capacitor should be connected in a star-shaped arrangement directly to the die pad as well as the
VMODE pin, depending on the VCC output voltage.
The ground of the digital part should be separated. Common ground connection is at the Atmel ATA6844 because the Atmel
ATA6844 contents the logic supply voltage regulator. The ground should be connected in a star-shaped arrangement
directly to the die pad of the Atmel ATA6844. This part of the ground is the digital ground circuitry, to which the
microcontroller ground belongs.
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The two charge pump shuffle capacitors CCP1 and CCP2 should be connected in a short loop, close to the Atmel ATA6844.
The VG capacitor should be placed close to the Atmel ATA6844 and connected in a short loop to the ground reference point.
The reservoir capacitor at CPOUT can be connected to PBAT to reduce maximum voltage at the capacitor. If connected in
this way, voltage strength up to 25V is sufficient.
Due to the high gate charge peak currents, the loops for the high side and low side MOSFET gate drivers should be as short
as possible and low inductive.
The gate driver source lines are also part of the switch loops. On the high side, there are the three Sx sensor pins. For the
low side, this is the common ground pin, which should be connected very close to three of the source pins of the external low
side MOSFETs.
Figure 4-1. Ground Area Connections: Reference Point is Atmel ATA6843/ATA6844 Die Pad
PBAT
CPHI2
CCPOUT
CPOUT
CCP2
CPLO2
CCP1
CPHI1
CVG
CPLO1
CVINT
VG
VBATSW
VBAT
+
VINT
Power Ground
VMODE
H3
VCC
CVCC
SCREF
H2
DG1
DG2
Atmel
ATA6843/ATA6844
Die Pad
DG3
/COAST
H1
S1
S2
/RESET
S3
WD
L1
IH1-3
IL1-3
L2
EN1
RX
L3
RWD
Digital Ground Plane
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PGND
CC
WDD
RWD
GND
LINGND
EN2
LIN
TX
RCC
CCC
Power Ground Plane
5.
The Atmel Microcontroller ATmega32M1
The Atmel® ATmega32M1 was developed to provide an integrated solution for advanced motor control applications with
CAN and LIN connectivity. Based on high-performance AVR 8-bit RISC architecture, the Atmel ATmega32M1 integrates all
of the basic peripherals needed for complex algorithm requirements. It integrates analog blocks such as 10-bit ADC, with
differential amplifiers and programmable gain options. Analog comparators with selectable comparison levels, and interrupts
on pin change I/Os. Clocked up to 64MHz, the 12-bit versatile synchronous Power Stage Controller generates six
complementary programmable high-speed and precision signals to control a motor's three half bridges. A frequency of
64kHz can be achieved, with a resulting duty cycle resolution of about 1/1000. A comparator can serve as overcurrent
detection. The reference level can be fixed using the DAC output. Hardware fault detection will automatically and
immediately put the motor in a safe position in case a failure is detected.
The microcontrollers provide all necessary resources to control BLDC motors in their system environments.
The Main Features of the Atmel ATmega32M1
● Data and non-volatile program memory
●
●
32Kbytes flash of in-system programmable program memory
●
1024 Bytes of in-system programmable EEPROM
●
2048 Bytes internal SRAM
Peripheral features
●
●
Note:
One 12-bit high speed PSC (power stage controller)
●
Six non-overlapping inverted PWM output channels with flexible dead-time
●
Variable PWM duty cycle and frequency
●
Synchronous update of all PWM registers
●
Auto stop function for emergency event
●
One 8-bit general purpose Timer/Counter with separate prescaler, compare mode, and capture mode
●
One 16-bit general purpose Timer/Counter with separate prescaler, compare mode, and capture mode
●
CAN 2.0A/B with 6 message objects
●
LIN 2.1 and 1.3 controller or 8-bit UART
●
One master/slave SPI serial interface
●
10-bit ADC with up to 11 single-ended channels and 3 fully differential ADC channel pairs
●
10-bit DAC for variable voltage reference (comparators, ADC)
●
Four analog comparators with variable threshold detection
●
Interrupt and wake-up on pin change
●
Programmable watchdog timer with separate on-chip oscillator
●
On-chip temperature sensor
Special microcontroller features
●
Low power idle, noise reduction, and power down modes
●
Power on reset and programmable brown out detection
●
In-system programmable via SPI port
●
Internal calibrated RC oscillator (8MHz)
●
On-chip PLL for fast PWM (64MHz) and CPU (16MHz)
Refer to the Atmel ATmega32M1 data sheet for the complete description of the Atmel ATmega32M1
microcontroller.
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6.
High Ambient Temperature
The Atmel® ATmega32M1 is qualified for use in compliance with the AEC-Q100 Grade 0 standard for automotive grade
automotive temperature range. This approval level allows ambient operating temperatures of up to 150°C.
The maximum junction temperature of the Atmel ATA6844 is 200°C. Hence, the available thermal gap for power dissipation
in 150°C ambient temperature applications is about 50K. Basically there are three heat sources in the Atmel ATA6844: the
VCC voltage regulator, the charge pump and the remaining internal operating circuitry.
To calculate thermal balance please refer to the dedicated application note:
“Estimated Junction Temperature Rise Due to Power Dissipation during Operation.”
7.
The Application Board
7.1
Power Board Features
The application basis board provides the following features:
● Atmel ATA6844 QFN7x7 - 48
●
●
●
●
●
●
●
●
●
●
8
●
6 gate driver outputs to operate N-channel MOSFETs
●
VCC regulator 5V or 3.3V operation, window watchdog, LIN transceiver up to LIN 2.1 compliant
Six external MOSFETs SQD50N04 with current of up to 50A DC
Low drop reverse voltage protection with SQD50N04
Button SW1 for system wake-up
LED power to indicate supply voltage present
LED NCOAST to indicate active coast function
Back EMF sensor feedback
●
Filter network to operate with enclosed type FL42BLS01 BLDC motor
●
Back EMF is supported by Atmel ATmega32M1 firmware
Hall sensor feedback
●
Optional, not supported by firmware
●
Designed for integrated hall sensors with 5V digital supply
●
The Atmel ATA6843/ATA6844 can generate 5V as well as 3.3V digital output voltage.
Note: integrated hall sensors usually work on a 5V supply only, BLDC movement at 3.3V is not possible
LIN transceiver
●
Board is configured as a LIN slave, without pull-up and diode for master mode configuration
●
Access to the pin via X2 connector
SCREF input
Two selectable short circuit input threshold level inputs
●
Via SCREF adjustment potentiometer or
●
Microcontroller output
Dimensions: 89mm 89mm
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7.2
Controller Board Features
The application controller board has the following features:
● Atmel® ATmega32M1 QFN7x7 - 32
●
●
●
●
8-bit AVR microcontroller
●
8MHz internal RC oscillator, using internal 64MHz PLL, 16MHz CPU frequency at 5V VCC supply voltage
Atmel ATmega32U2 QFN7x7 - 32
●
8-bit AVR microcontroller
●
8MHz internal RC oscillator, 8MHz CPU frequency at 5V VCC supply voltage
Connectors
●
Microcontroller interface to BLDC basis board
●
6-pin ISP connector for In-system programming and on-chip debugging via debugWIRE using JTAGICEmkII
For Atmel ATmega32M1
●
For Atmel ATmega32U2
Potentiometers
●
●
●
Target speed potentiometer
Dimensions: 89mm 62mm
The Atmel ATmega32M1 is required for BLDC operation. The Atmel ATmega32U2 is separated by line and is only required
for USB control and can be disconnected by removing jumpers J107.
The function blocks on the application board are clearly arranged, see Figure 7-1 on page 10.
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Figure 7-1. Application Board Top View, Function Blocks
12V Supply, GND
Basis Board
Reverse Voltage Protection
N-Channel MOSFET
B6 Bridge
N-Channel MOSFETs
Motor
Connector
Reverse Voltage
Protection
Control
Shunt resistor
Gate Control
Charge Pump
capacitors
Short Circuit
Threshold
adjustment
Position
Feedback
Back-EMF Signal
Conditioning
Controller Board
Interface
Connector
Controller Board
Motor controller
ATmega32M1
Control/Diagnosis
Interface
ATmega32U2
Operating
Status
Jumpers to select
MCU communication
channel
- LIN
- UART
- USB
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The application kit can be run by supplying 12V to the connector X1 on the application basis board. The Atmel®
ATmega32M1 microcontroller is preloaded with software operating the enclosed BLDC motor featuring a back EMF
feedback method. The three windings of the BLDC motor need to be connected to the three phase clamps U, V, W, see
Figure 7-2.
After powering up, the BLDC motor starts operation automatically. The target speed is set up based on the potentiometer
speed.
Additional software is available on the enclosed CD for evaluation purposes and is described later in this document.
Figure 7-2. Application Board Top View, Connectors
12V Supply, GND
Basis Board
Phase U, V, W
Hall sensor supply
Hall A, B, C
GND
VBAT output
LIN bus
GND
Controller Board
Interface Connector
Controller Board
ISP Connector
ATmega32U2
USB connector
ISP Connector
ATmega32M1
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Table 7-1.
Board Connectors
Connector
Clamp
Function
Direction
X1
1
Power 12V
Power
2
GND
Power
1, 2
VBAT
Output
3, 4
LIN
Output
5, 6
GND
Output
X4
1-26
Microcontroller interface
Power, I/O
X5
1
Phase U
Output
2
Phase V
Output
3
Phase W
Output
4
5V Hall supply (optional)
Power
5
Hall 1 (optional)
Input
6
Hall 2 (optional)
Input
7
Hall 3 (optional)
Input
8
Hall GND (optional)
Power
X2
12
X101
1-26
Microcontroller interface
Power, I/O
J102
1-6
ISP connector ATmega32M1
I/O
J106
1-6
ISP connector ATmega32U2
I/O
J104
1-5
USB
I/O
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Figure 7-3. Application Board Top View, Jumpers, Potentiometers, Buttons, LEDs
Basis Board
Position Feedback U
HALL or BEMF
Switch to ‚Normal Mode’
Position Feedback V
HALL or BEMF
VCC 3.3V/5V
Short Circuit Threshold
adjust SCREF
Watchdog Disable
Position Feedback W
HALL or BEMF
SCREF source selection
:
poti or μC
Controller Board
Reset
ATA6844 to MCU
Speed adjust
Voltgage supply of
ATmega32U2
USB Status blinking:
data transfer
Need to set to same
level like whole kit
STATUS: B-EMF loop locked
VCC: supply voltage present
Jumper LIN/UART
USB-UART Bridge
Table 7-2.
Board Jumpers
Jumper
J1, J2, J3
Function
Feedback input x
J4
SCREF threshold source
J5
Watchdog disable
J6
VMODE
select VCC voltage
Clamp
Comment
1–2
Hall x input (default)
2–3
Back EMFx input
1–2
Microcontroller (default)
2–3
Potentiometer R6
On
Watchdog disable (default)
Off
Watchdog enable
1–2
3.3V mode
2–3
5V mode (default)
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Table 7-3.
Board Switches
Switch
SW1
Table 7-4.
High voltage wake-up switch – EN pin
Board Potentiometers
Potentiometer
Function
R6
SCREF
Input source for SCREF threshold, depending on J4 jumper setting
R106
Speed
ADC input for ATmega32M1, in the enclosed firmware assigned as target speed input
Table 7-5.
7.3
Function
Comment
LEDs
LED
Function
Comment
D1
POWER
ON: Power board is supplied
D6
COAST
ON: Coast active
Coast can only be set by the ATmega32M1 microcontroller
D101
VCC
D102
STATUS
D105
USB status
ON: VCC valid, Atmel ATA6844 in normal mode
OFF: No VCC present, Atmel ATA6844 in standby mode
ON: BLDC back EMF feedback loop locked
Toggling: character sent
The LED D105 changes status on each transmit in both directions, from and to PC
Power Board Startup
For startup, several test pins are prepared to monitor.
● As soon as the kit is powered, 5V is present at the VINT test pin.
14
●
If the Atmel® ATA6843/ATA6844 is in normal mode, VCC is present. Depending on the VMODE jumper setting, the
VCC pin voltage level is 3.3V or 5V.
●
If VCC is in a valid range and the watchdog receives correct triggers within the watchdog window, the NRESET signal
remains stable at the VCC level.
●
Finally, correct function can be monitored at the charge pump output pin. The voltage there is 15V above supply
voltage. The charge pump frequency is approximately 400kHz.
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7.4
Diagnosis via UART
In an automotive environment, there are several ways to communicate with the motor control unit. The established bus
protocols LIN and CAN are supported by the Atmel® ATmega32M1 microcontroller.
7.4.1
LIN Communication
The Atmel ATA6844 system basis chip gate driver has a LIN transceiver on chip. A brushless BLDC application node can be
achieved by combining the Atmel ATmega32M1 LIN protocol features. For LIN operation, it is necessary to set the UART
mode to LIN mode, jumper J101, and remove both J107 jumpers, for more information see Figure 7-4.
Note:
The LIN software is not supported by the preloaded firmware.
Figure 7-4. Jumper Settings for LIN UART
7.4.2
UART Communication
The UART communication port is for debugging and monitoring purpose. A list of commands is implemented, see Table 8-1
on page 20. For direct access to the pins, set the jumper and connect according to Figure 7-5.
Figure 7-5. Jumper Settings for Direct UART Access
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A UART to USB bridge is on the controller board to access via hyper terminal. The jumpers need to be set according to
Figure 7-6. The USB drivers need to be installed according to 'Setup USB connection'.
Figure 7-6. Jumper Settings for UART Access by USB Connection and Hyper Terminal
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8.
Software Description
There are two software packages available from the Web site or on the supplied CD:
● Demonstration software
●
Evaluation software
The Board is preloaded with the demo software. Further investigations can be done with the evaluation software. Both
software packages are working with back EMF feedback. Operation monitoring by USB connection is provided for both
software packages.
The board can be connected to the automotive environment via a LIN bus or by LIN clamp. LIN protocol is not supported by
the supplied software.
8.1
Setup of the USB Connection
When connecting the Atmel® ATA6844 controller board to a PC USB interface, the board is detected as a USB device. The
dedicated driver has to be installed on the PC if the Atmel microcontroller ATmega32U2 type is being used for the first time.
The following steps guide the designer through the installation process. The process is described for Windows XP and is
similar for other Microsoft operating systems.
If the driver is not present, the user is prompted to install the driver. For more information see Figure 8-1. Be sure not to allow
a connection to Windows Update. It is mandatory to install the enclosed driver “at90usbxxx_cdc.inf” to operate using the
Atmel ATmega32U2 USB device. Please select “No, not this time.”
Figure 8-1. USB Found New Hardware
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Next, choose the driver location “Install from a list or specific location,” see Figure 8-2.
Figure 8-2. USB Specific Software
According to Figure 8-3, select the installation path. The “at90usbxxx_cdc.inf” file is located on the path
“\software\ATA6844DK_mega32u2” on the enclosed driver CD.
Figure 8-3. USB Driver Location
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Please continue with the following note, see Figure 8-4.
Figure 8-4. USB Windows Logo Testing
The installation is finished after completing the previous steps. By connecting the USB device, the PC is able to
communicate with the Atmel® ATA6844 DK design kit by a virtual COM port. The assigned COM port number can be seen in
the Windows device manager, Figure 8-5. The device name is “AT90USBxxx CDC USB to UART MGM”.
Figure 8-5. Windows Device Manager - COM Port Number
Every terminal software such as “Hyperterminal” within the Microsoft Windows operating system is capable of working as a
user interface. The properties of the COM port are 9600Baud, 8 data bits, non-parity check, 1 stop bit and non-flow control.
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8.2
Demonstration Software
The BLDC motor starts automatically after powering up the application kit. The final stage of the ramp-up process is locking
in the back EMF feedback loop. The motor speed is controlled by a speed regulation loop. The target speed can be adjusted
by the speed potentiometer.
The speed can be monitored by a hyper terminal. With any key pressed, the display of the current speed can be toggled on
or off.
8.3
Evaluation Software
The default mode of the evaluation software acts like the demonstration software, ramp-up is done automatically.
Access by hyperterminal allows advanced control of the regulation loop. Table 8-1 shows the entire command list. The
automatic startup control (Figure 8-6 on page 21) can be interrupted by switching to debug mode (pressing key <d>).
Switching between the various startup functions must be done manually according to the command Table 8-1. The <+>, <->,
<*> and <_> keys allow the timing parameters to be adjusted during startup. The parameters are calculated automatically
only in the final mode MC_LOCKED.
Table 8-1.
Evaluation Software: UART Command Control
Key <parameter>
Space
Read current RPM
r
RUN (clockwise)
R
RUN (counterclockwise)
s
STOP motor
S <xxxx>
v <x>
20
Function
Set speed to xxxx rpm
Set SCREV voltage
d
DEBUG on
D
DEBUG off
?
Read status of DG pins
l
Force back EMF state MC_LOCKED
p
Force back EMF state MC_PRELOCKED1
i
Enable AC interrupts
I
Disable AC interrupts
+
Increment zero crossing delay
-
Decrement zero crossing delay
*
Increment PWM duty cycle
_
Decrement PWM duty cycle
c
Emergency shutdown of motor: Activate Coast function
C
Emergency shutdown of motor: Deactivate Coast function
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
8.4
Startup Software Algorithm
Basically, the software is separated into two parts: the driver part and the sensor part. The driver part contains PWM
generation and commutation control. The sensor part contains analog comparators for back EMF feedback and ADC
measurements for current feedback. Differentiation between the parts is more strictly emphasized during the startup
sequence.
The startup sequence is controlled by a state machine, see Figure 8-6.
Figure 8-6. Flow Chart
After delay
MC_UNLOCKED
MC_RAMPUP
After processing
MC_PRELOCKED1
Enable Rise/Fall edge
detection
If Fail Event:
Multiple AC ISR’s
missing
Valid?
MC_PRELOCKED2
Calculate periode times
MC_PRELOCKED3
Check constrained
commutation step
MC_LOCKED
Period similar +/-30%
previous periode
Successful?
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
21
8.4.1
MC_UNLOCKED
●
No control is possible because there is no back EMF feedback for commutation control. No PI controller is running for
PWM duty-cycle control.
●
●
●
●
PWM duty-cycle and the commutation delay time are predefined software parameters.
●
8.4.2
8.4.3
8.4.6
>debug mode< - the state machine stays in this mode as long as the user switches manually into another mode
(command control via UART interface).
>normal mode< - the state machine switches automatically into the next MC_PRELOCKED mode after a
pre-programmed time.
●
This state is intended to implement code for BLDC motor acceleration until sufficient back EMF signal can be
detected. In the implemented software, only a single set of PWM and duty cycle values is active. The single set is
sufficient to start the enclosed motor.
●
The MC_RAMPUP mode improves the startup behavior in case of PWM duty-cycle and the corresponding
commutation time for a reliable back EMF feedback is not known. This mode provides more stable startup especially
for parameters of unknown BLDC motors or varying loads.
MC_PRELOCKED1
●
The interrupt service routines (ISR) for falling and rising edges of the internal analog comparators (AC) and the back
EMF feedback are enabled. The commutation is not yet controlled based on these measured parameters.
●
The state machine switches automatically into the next MC_PRELOCKED mode
Enabled AC ISRs in UNLOCKED mode can disturb the startup phase, because it is very important for the PI
controller to get certain back EMF data from the AC data pipeline. Acquiring useful back EMF data is only possible with a motor running so that sufficient back EMF voltage is generated.
MC_PRELOCKED2
●
The AC falling and rising edges are time stamped and stored in a buffer (AC data pipeline). The averages of the time
stamps are calculated.
●
The state machine switches automatically into the next MC_PRELOCKED mode as soon as the calculated average of
one electrical rotation is identical (about ±30%) to six times the constrained commutation time.
Note:
8.4.5
The ADC runs in parallel and measures at four different points between the commutation steps.
MC_RAMPUP (Not Yet Implemented/Activated)
Note:
8.4.4
The motor starts with a fixed PWM signal and a constrained commutation cycle.
The comparison is an indicator for reliability of the AC data pipeline. The faster the rotation, the better matches
result for this comparison.
MC_PRELOCKED3:
●
The MC_PRELOCKED3 mode ensures the transfer from the uncontrolled MC_PRELOCKED2 mode to the fully
controlled MC_LOCKED mode.
●
In this mode, the state machine waits until the next constrained commutation occurs. Afterwards, switching into the
MC_LOCKED mode is initiated.
MC_LOCKED:
●
●
●
●
The PWM duty-cycle is automatically generated by the PI controller.
The delay commutation times are calculated based on the AC data pipeline.
An emergency commutation step is forced if an AC ISR is missing within a specific time frame.
If multiple AC ISRs are missing in succession, the state machine automatically reverts to the MC_UNLOCKED mode.
The software is implemented in C language and the source code can be compiled with the Compilers from IAR Systems as
well as from GCC for AVR.
22
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
9.
Application Board Documentation
9.1
BLDC Application Power Board Atmel ATA6844-DK1
Figure 9-1. Atmel ATA6844-DK1 Power Board - Schematic
PBAT
R41
62kΩ
BEMF1N
H2
R28
10Ω
0Ω
C1
10nF
U
H3
R24
Q4
SQD50N04
R25
Q5
SQD50N04
W
TP8
0Ω
C4
10nF
R32
10Ω
0Ω
C5
10nF
GND
R43
62kΩ
BEMF2N
C6
10nF
C21
100nF
R52
5.6kΩ
BEMF2P
VCC
R48
33kΩ
HA2
GND
X5
R33
0.082Ω
R60
10kΩ
R35
SH_N
C26
10nF
R61
10kΩ
R62
10kΩ
1
2
3
4
5
6
7
8
U
V
W
VCC
HA
HA2
HA3
10kΩ
GND
J2
GND
R45
62kΩ
BEMF3N
C23
100nF
R54
5.6kΩ
BEMF3P
VCC
+ C18
green
220μF
35V
100nF
C8
470nF
J6
VINT
3
SLEEP 8
9
10
11
PWR2.1
GND
GND
12
GND GND
37
L1
38
L2
39
L3
40
43
44
41
PBAT
NC_4
VG
L1
L2
L3
PGND
VCC
S2
H2
NC_1
S3
GND
H3
DG3
NC_2
49
X2 CON 3x2H 90°
VSUPPLY
VSUPPLY
1
2
UN
UN
3
4
GND
GND
5
6
SLEEP
SCREF
GND
36 C13
100nF
35
34 C14
100nF
33
32
CPOUT
CPOUT
31
U
CPOUT
30
H1
29
V
28
H2
27
W
26
H3
25
DG3
DG2
220nF
GND
H1
DG1
C12
ATA6644
WDD
RXD
JS5
7
1
2
S1
IH1
VSUPPLY
WD
IL1
R3
10kΩ
6
NRESET WD
IH2
R2
33kΩ
J5
CPHI2
CPOUT
NRESET
IL2
220pF
CPLO1
CPHI1
CC
5
IH3
C15
GND
470nF
CPLO2
RWD
4
NRESET
IL3
GND1
VBAT
VMODE
2
NC_5
1
TXD
VINT
C16
GND
EN
JS6
45
U1
1
2
3
NCOAST
VINT
LIN
GND
48
1kΩ
10kΩ
46
NCOAST
42
PBAT
R9
NC_3
VCC
47
D6 NCOAST
green
GND
Mounting Hole 3mm
Mounting Hole 3mm
E3
E4
15
16
17
18
19
20
21
22
23
24
IL3
IH3
IL2
IH2
IL1
IH1
RXD
DG1
DG2
2
4
6
8
10
12
14
16
18
20
22
24
26
X4
CON
13x2 CAB
R7
1.5kΩ
1
3
5
7
9
11
13
15
17
19
21
23
25
JS4
GND
Inside
Mounting Hole 3mm
Mounting Hole 3mm
BEMF3N
BEMF2N
BEMF1N
IL3
IL2
IL1
SH_P
SH_N
RXD
TXD
SLEEP
WD
J4
14
R6
10kΩ
E2
1
2
3
E1
Outside
BEMF3P
BEMF2P
BEMF1P
IH3
IH2
IH1
DG3
DG2
DG1
NRESET
NCOAST
USCREF
GND
3
2
USCREF
VCC
LIN
R8
5.6kΩ
SCREF
13
VCC
SCREF
TXD
GND
1
1
3
2
C9
GND
10kΩ
X1
SW1
100nF
22μF
10V
VBAT/12V
D1
GND
2.2μF
GND
C17
CPOUT
R11
GND
JS3
2
1
R13
1kΩ
+ C11
220μF
35V
R12
W
C24
100nF
R55
5.6kΩ
4
3
+ C10
J3
C7
PBAT
1
2
3
VBAT
VSUPPLY
R10
100kΩ
R49
33kΩ
HA3
VCC
D2
BAS16
Q8
BC817-40
R46
62kΩ
GND
VCC
D3
BAS16
V
C22
100nF
R53
5.6kΩ
JS2
Motor
Q7
SQD50N04
R44
62kΩ
GND
10kΩ
C25
10nF
U
C20
100nF
R51
5.6kΩ
JS1
Q5
SQD50N04
R26
L3
R34
SH_P
J1
V
R31
10Ω
R47
33kΩ
HA1
V
L2
R42
62kΩ
GND
C3
10nF
TP7
V
R30
10Ω
0Ω
R29
10Ω
0Ω
U
L1
R23
C2
10nF
TP6
Q3
SQD50N04
1
2
3
0Ω
R22
Q2
SQD50N04
1
2
3
H1
R21
R27
10Ω
C19
100nF
R50
5.6kΩ
BEMF1P
Q1
SQD50N04
GND
J2-Connector to Microcontroller Board ATA6844-DK2
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
23
Figure 9-2. Atmel ATA6844-DK1 Power Board - Component Placement
24
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
Figure 9-3. Atmel ATA6844-DK1 Power Board - Top Layer - Top View
Figure 9-4. Atmel ATA6844-DK1 Power Board - Bottom Layer - Top View as PCB is Transparent
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
25
9.2
BLDC Application Controller Board Atmel ATA6844-DK3
Figure 9-5. Atmel ATA6844-DK3 Controller Board - Schematic
R109
PGB1010603-optional
D104
0Ω
D103
J104
5
4
D+
D-
3
R107
22Ω
2
R108
22Ω
GNDd
J105
1
VBUS
USB MiniAB
1
2
2
C108
10μF
C105
1μF
25
26
27
PB5 (PCINT5..)
PD1 (INT1..)
PB4 (T1..)
PD2 (RXD1..)
E2
21
Mounting Hole 3mm
Mounting Hole 3mm
20
E3
E4
Mounting Hole 3mm
Mounting Hole 3mm
23
22
19
18
17
PB2 MOSI..)
PD4 (INT5..)
E1
24
ISP/DebugWire
ATmega32U2
16
15
9
PB1 (SCLK..)
PB3 (MISO)
J106
J107
USB-UART Bridge
D105
USB
3
4
1
3
5
UART_TXD
SCREF
25
PC7 (..)
IL2
BEMF2N
26
PB5 (..)
PD0 (PCINT16/..)
PB7 (ADC4/..)
PB6 (ADC7/..)
27
IL1
28
IH1
PC0 (PCINT16/..)
29
IH2
15
16
BEMF1P
BEMF1N
PB2 (ADC5/..)
14
GNDd
BEMF3N
PB0 (PSCOUT2A..)
PD7 (ACMP0/..)
PC5 (ADC9/..)
PD6 (ADC3/..)
AVCC
PC3 (RXCAN/T1..)
PD5 (ADC2/..)
PC2 (T0/TXCAN/..)
R101
1kΩ
PC4 (..)
R103
23 NCOAST
1kΩ
GNDd
22 BEMF2P
AREF
21
20
19
VCC
18 SH_P
17 SH_N
C102
10nF
C103
10nF
1
3
SCK
UART_TX
Outside
X101
CON 13x2 CAB
2
4
6
8
10
12
14
16
18
20
22
24
26
J101
R104
1kΩ
1
LIN mode
2
USB-UART
Bridge
3
Interface
GNDd
JS101
Inside
GNDd
Connector to Powerboard ATA6844-DK1
26
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
1
2
Header 2
GNDd
RXD
2
J103
NRES
VCC
R105
10kΩ
R106
10kΩ
MOSI
GNDd
24 Status
GNDd
VCC
2
4
6
1
3
5
7
9
11
13
15
17
19
21
23
25
GNDd
30
AGND
PD4 (RXD/..)
8
AREF (ISRC)
13
IH3
PB3 (AMP0-/..)
BEMF3P
7
PB4 (AMP0+/..)
GND
PE2 (XTAL2/..)
6
DG3
1
3
5
ISP
D102
STATUS
VCC
12
DG2
VCC
J102
MISO
SCK
NRES
PC6 (ADC10)
PE1 (XTAL1/..)
C101
10nF
ISP/DebugWire
ATmega32M1
PC1 (PSCIN1/..)
11
D101
Power
PE0 (RESET)
SLEEP
NRES
31
32
PD1 (..)
5
PD3 (TXD/TXLIN/..)
PB1 (T2B/..)
4
VCC
PD2 (PSCIN2/..)
9
3
10
2
DG1
1kΩ
WD
R102
TXD
1
IL3
MISO
GNDd
GNDd
U101
ATmega32M1-15AZ
MOSI
2
4
6
ISP
R110
1kΩ
JS 107-1
TXD
JS 107-2
3.3V
Supply
PC5 (..)
PC4 (..)
29
28
UGND
UCAP
PD0 (INT0..)
10
USB_TX
30
PB6 (PCINT6..)
1
2
USB_RX
D+
31
PC2 (PCINT11..)
PD3 (TXD1..)
8
PB7 (PCINT7..)
PB0 (SS..)
7
PC7 (CLKO..)
VCC
14
6
GNDd
PC6 (OC1A..)
GND
PD7 (CTS..)
5
XTAL2 (PC0)
13
4
PD6 (nRTS..)
3
nReset (PC1..)
12
100nF
JS105
GNDd
XTAL1
PD5 (XCK..)
C104
2
11
1
1
22pF
D-
AVCC
Y1
8,0000-HC49-SMD
C107
UVCC
U102
ATmega32U2
22pF
2
C106
32
GNDd
5V
BEMF3P
BEMF2P
BEMF1P
IH3
IH2
IH1
DG3
DG2
DG1
NRESET
NCOAST
USCREF
GND
BEMF3N
BEMF2N
BEMF1N
IL3
IL2
IL1
SH_P
SH_N
RXD
TXD
SLEEP
WD
SHLD
JS103
Figure 9-6. Atmel ATA6844-DK3 Controller Board - Component Placement
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
27
Figure 9-7. Atmel ATA6844-DK3 Controller Board - Top Layer - Top View
Figure 9-8. Atmel ATA6844-DK3 Controller Board - Bottom Layer - Top View as PCB is Transparent
28
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
10.
Revision History
Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this
document.
Revision No.
History
9236C-AUTO-03/15
Put document in the latest template
ATA6844-DK [APPLICATION NOTE]
9236C–AUTO–03/15
29
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© 2015 Atmel Corporation. / Rev.: 9236C–AUTO–03/15
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