View detail for AT91SAM7L-EK User Guide

AT91SAM7L-EK Evaluation Board
....................................................................................................................
User Guide
6370A–ATARM–15-Feb-08
1-2
6370A–ATARM–15-Feb-08
AT91SAM7L-EK Evaluation Board User Guide
Table of Contents
Section 1
Overview .................................................................................................................... 1-1
1.1
Scope................................................................................................................................. 1-1
1.2
Deliverables ....................................................................................................................... 1-1
1.3
The AT91SAM7L-EK Evaluation Board ............................................................................. 1-1
1.3.1
Handheld Board................................................................................................... 1-1
1.3.2
Docking Board ..................................................................................................... 1-2
Section 2
Setting Up the AT91SAM7L-EK Board....................................................................... 2-1
2.1
Electrostatic Warning ......................................................................................................... 2-1
2.2
Requirements..................................................................................................................... 2-1
2.3
Layout ................................................................................................................................ 2-2
2.4
Powering Up the Board...................................................................................................... 2-4
2.5
Handheld Board in Stand-alone Mode............................................................................... 2-4
2.6
Getting Started................................................................................................................... 2-4
2.7
AT91SAM7L-EK Block Diagram ........................................................................................ 2-5
Section 3
Board Description....................................................................................................... 3-1
3.1
AT91SAM7L Microcontroller .............................................................................................. 3-1
3.2
AT91SAM7L Block Diagram .............................................................................................. 3-3
3.3
Memory .............................................................................................................................. 3-4
3.4
Clock Circuitry.................................................................................................................... 3-4
3.5
Reset Circuitry ................................................................................................................... 3-4
3.6
Supply Controller ............................................................................................................... 3-4
3.7
Power Supply Circuitry....................................................................................................... 3-4
3.8
Remote Communication .................................................................................................... 3-4
3.9
Analog Interface................................................................................................................. 3-4
3.10 User Interface .................................................................................................................... 3-4
3.11 Debug Interface ................................................................................................................. 3-5
3.12 Expansion Slot ................................................................................................................... 3-5
3.13 .......................................................................................................................... PIO Usage3-5
Section 4
Configuration .............................................................................................................. 4-1
4.1
Configuration Jumpers....................................................................................................... 4-1
AT91SAM7L-EK Evaluation Board User Guide
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6370A–ATARM–15-Feb-08
Table of Contents (Continued)
4.2
Configuration Straps on the Handheld Board .................................................................... 4-3
4.3
Configuration Straps on the Docking Board....................................................................... 4-4
4.4
Miscellaneous Configuration.............................................................................................. 4-4
4.5
Power Supply Schemes..................................................................................................... 4-5
Section 5
Schematics................................................................................................................. 5-1
5.1
Schematics ........................................................................................................................ 5-1
Section 6
Errata.......................................................................................................................... 6-1
6.1
Optimal Operation.............................................................................................................. 6-1
Section 7
Revision History ......................................................................................................... 7-1
7.1
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6370A–ATARM–15-Feb-08
Revision History ................................................................................................................. 7-1
AT91SAM7L-EK Evaluation Board User Guide
Section 1
Overview
1.1
Scope
The AT91SAM7L-EK evaluation kit enables the evaluation of and code development of applications running on an AT91SAM7L device.
The kit consists of two boards which can be connected together:
„
The Handheld Board (hereafter referred to as HB) and
„
The Docking Board (hereafter referred to as DB)
These two boards must be connected together in debug or programming mode.
This guide focuses on the AT91SAM7L-EK board as an evaluation platform.
1.2
Deliverables
The AT91SAM7L-EK package contains the following items:
„
One Handheld Board
„
One Docking Board
„
One Universal input AC/DC power supply with US, UK and European plug adapters
„
One RS232 crossed serial cable
„
One AT91SAM7L-EK dedicated CD-ROM
1.3
The AT91SAM7L-EK Evaluation Board
1.3.1
Handheld Board
The handheld board is equipped with an AT91SAM7L128 (128-lead LQFP package) together with the
following:
„
400-segment LCD Display
„
35-key Keyboard (7x5 matrix)
„
Two AAA battery clip socket
„
IrDA® transceiver
„
Weather Station Capabilities (Temperature/Pressure sensor)
„
SPI DataFlash® SD/MMC Card connector
„
ZIGBEE expansion connector (optional RZ502 board)
„
VCC level monitor
AT91SAM7L-EK Evaluation Board User Guide
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6370A–ATARM–15-Feb-08
Overview
1.3.2
„
Force Wake-up push button
„
Reset push button
„
Configuration Jumpers
Docking Board
The docking board is equipped with I/O expansion connectors and Debug devices:
„
5-Volt DC power supply input
„
Yellow Power Supply LED (software controlled)
„
Two Green User LEDs
„
JTAG/ICE interface
„
HE10 ADC connector (4 inputs)
„
Three expansion connectors (PIO A, PIO B, PIO C)
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AT91SAM7L-EK Evaluation Board User Guide
Section 2
Setting Up the AT91SAM7L-EK Board
2.1
Electrostatic Warning
The AT91SAM7L-EK evaluation board is shipped in protective anti-static packaging. The board must not
be exposed to high electrostatic potentials. A grounding strap or similar protective device should be worn
when handling the board. Avoid touching the component pins or any other metallic element.
2.2
Requirements
In order to set up the AT91SAM7L-EK evaluation board, the following items are needed:
„
The AT91SAM7L-EK evaluation board itself
„
AC/DC power adapter (5V at 2A), 2.1 mm x 5.5 mm
„
An DS732 crossed cable and/or a JTAG/ICE interface depending on the kind of development projects
to be done.
AT91SAM7L-EK Evaluation Board User Guide
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6370A–ATARM–15-Feb-08
Setting Up the AT91SAM7L-EK Board
2.3
Layout
Figure 2-1.
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6370A–ATARM–15-Feb-08
AT91SAM7L-EK Layout -Top View
AT91SAM7L-EK Evaluation Board User Guide
Setting Up the AT91SAM7L-EK Board
Figure 2-2.
AT91SAM7L-EK Layout - Bottom View
AT91SAM7L-EK Evaluation Board User Guide
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6370A–ATARM–15-Feb-08
Setting Up the AT91SAM7L-EK Board
2.4
Powering Up the Board
The AT91SAM7L-EK requires 5V DC (± 5%). DC power is supplied to the board via the 2.1 mm x 5.5
mm socket J211. Coaxial plug center positive standard.
2.5
Handheld Board in Stand-alone Mode
The user has the possibility to fit 2 x 1.5V AAA battery cells in the handheld board clip sockets in order to
use the HB in stand-alone mode (application software programmed in the AT91SAM7L microcontroller
embedded flash).
2.6
Getting Started
The AT91SAM7L-EK evaluation kit is delivered with a CD-ROM containing all necessary information and
step-by-step procedures for working with the most common development tool chains. Please refer to this
CD-ROM, or to the AT91 web site, http://www.atmel.com/products/AT91/, for the most up-to-date information on getting started with the AT91SAM7L-EK.
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AT91SAM7L-EK Evaluation Board User Guide
Setting Up the AT91SAM7L-EK Board
AT91SAM7L-EK Block Diagram
2.7
AT91SAM7L-EK Block Diagram
Figure 2-3.
Sheet 6
DB_PC[0..29]
DB_PB[0..23]
DB_PA[0..25]
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_JTAG_TDO
DB_AD[0..3]
DB_ADVREF
DB_PC[0..29]
DB_PB[0..23]
DB_PA[0..25]
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_JTAG_TDO
DB_AD[0..3]
DB_ADVREF
Docking station
Dock PIO, power
DB_ADVREF
DB_AD[0..3]
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_JTAG_TDO
DB_PA[0..25]
DB_PB[0..23]
DB_PC[0..29]
Handheld-Dock connection
ADVREF
JTAG_RST
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
AD[0..3]
PA[0..25]
PB[0..23]
PC[0..29]
BATTSEL_A
BATTSEL_B
Sheet 5
Handheld processor
PC[0..29]
PB[0..23]
PA[0..25]
AD[0..3]
JTAG_RST
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
ADVREF
Handheld device
ADVREF
JTAG_RST
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
AD[0..3]
PA[0..25]
PB[0..23]
PC[0..29]
BATTSEL_A
BATTSEL_B
AD[0..3]
PC[0..29]
BATTSEL_A
BATTSEL_B
Handheld interfaces
PA[0..25]
PB[0..23]
PC[0..29]
Handheld LCD, KBD
Sheet 2
Sheet 4
Sheet 3
2-5
AT91SAM7L-EK Evaluation Board User Guide
6370A–ATARM–15-Feb-08
Section 3
Board Description
The following paragraphs list the features available on the AT91SAM7L-EK and onto which board a particular feature has been fitted:
3.1
„
The Handheld Board (HB)
„
The Docking Board (DB)
AT91SAM7L Microcontroller
• Incorporates the ARM7TDMI® ARM® Thumb® Processor
•
•
•
•
•
•
•
•
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support
Internal High-speed Flash
– 128 Kbytes (AT91SAM7L128), Organized in 512 Pages of 256 Bytes Single Plane
– 64 Kbytes (AT91SAM7L64), Organized In 256 Pages of 256 Bytes Single Plane
– Single Cycle Access at Up to 15 MHz in Worst Case Conditions
– 128-bit Read Access
– Page Programming Time: 4.6 ms, Including Page Auto Erase, Full Erase Time: 10 ms
– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit
– Fast Flash Programming Interface for High Volume Production
Enhanced Embedded Flash Controller (EEFC)
– Interface of the Flash Block with the 32-bit Internal Bus
– Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory Interface
Internal High-speed SRAM, Single-cycle Access at Maximum Speed
– 6 kbytes
• 2 Kbytes Directly on Main Supply That Can Be Used as Backup SRAM
• 4 Kbytes in the Core
Memory Controller (MC)
– Enhanced Embedded Flash Controller, Abort Status and Misalignment Detection
Reset Controller (RSTC)
– Based on Brownout Reset and Low-power Factory-calibrated Brownout Detector
– Provides External Reset Signal Shaping and Reset Source Status
Clock Generator (CKGR)
– Low-power 32 kHz RC Oscillator, 32 kHz On-chip Oscillator, 2 MHz Fast RC Oscillator and one PLL
Supply Controller (SUPC)
– Minimizes Device Power Consumption
– Manages the Different Supplies On Chip
– Supports Multiple Wake-up Sources
Power Management Controller (PMC)
– Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode
– Three Programmable External Clock Signals
– Handles Fast Start Up
AT91SAM7L-EK Evaluation Board User Guide
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6370A–ATARM–15-Feb-08
Board Description
• Advanced Interrupt Controller (AIC)
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
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6370A–ATARM–15-Feb-08
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
Debug Unit (DBGU)
– Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access
Prevention
Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
Windowed Watchdog (WDT)
– 12-bit Key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
– Counter may be Stopped While the Processor is in Debug State or in Idle Mode
Real-time Clock (RTC)
– Two Hundred Year Calendar with Alarm
– Runs Off the Internal RC or Crystal Oscillator
Three Parallel Input/Output Controllers (PIOA, PIOB, PIOC)
– Eighty Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
Eleven Peripheral DMA Controller (PDC) Channels
One Segmented LCD Controller
– Display Capacity of Forty Segments and Ten Common Terminals
– Software Selectable LCD Output Voltage (Contrast)
Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Manchester Encoder/Decoder
– Full Modem Line Support on USART1
One Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
One Three-channel 16-bit Timer/Counter (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
One Four-channel 16-bit PWM Controller (PWMC)
One Two-wire Interface (TWI)
– Master, Multi-Master and Slave Mode Support, All Atmel® Two-wire EEPROMs and I2C compatible
Devices Supported
– General Call Supported in Slave Mode
One 4-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
SAM-BA® Boot Assistant
– Default Boot Program
– Interface with SAM-BA Graphic User Interface
– In Application Programming Function (IAP)
IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
I/Os, including Four High-current Drive I/O lines, Up to 4 mA Each
Power Supplies
– Embedded 1.8V Regulator, Drawing up to 60 mA for the Core with Programmable Output Voltage
– Single Supply 1.8V - 3.6V
– Zero-power Power-on Reset and Brownout Detector, Fully Programmable
Fully Static Operation: Up to 36 MHz at 85°C
Available in a 128-lead LQFP Green and a 144-ball LFBGA Green Package
AT91SAM7L-EK Evaluation Board User Guide
Board Description
3.2
AT91SAM7L Block Diagram
Figure 3-1.
AT91SAM7L BLock Diagram
TDI
TDO
TMS
TCK
ICE
JTAG
SCAN
Charge
Pump
ARM7TDMI
Processor
JTAGSEL
LCD
Voltage
Regulator
System Controller
2 MHz RCOSC
TST
CAPP1
CAPM1
CAPP2
CAPM2
VDDINLCD
VDD3V6
VDDLCD
VDDIO2
IRQ0-IRQ1
PIO
FIQ
1.8 V
Voltage
Regulator
AIC
PCK0-PCK2
VDDCORE
CLKIN
PLL
XIN
XOUT
VDDIO1
VDDIO2
Memory Controller
PLLRC
VDDIO1
VDDIO1
GND
VDDOUT
PMC
SRAM
OSC
Embedded
Flash
Controller
Address
Decoder
32k RCOSC
Abort
Status
Misalignment
Detection
2 Kbytes( Back-up)
4 Kbytes (Core)
VDDCORE
Flash
BOD
POR
ERASE
64/128 Kbytes
Supply
Controller
Peripheral Bridge
NRST
ROM (12 Kbytes)
Peripheral Data
Controller
11 Channels
RSTB
Fast Flash
Programming
Interface
FWUP
VDDIO1
APB
PGMRDY
PGMNVALID
PGMNOE
PGMCK
PGMM0-PGMM3
PGMD0-PGMD15
PGMNCMD
PGMEN0-PGMEN2
SAM-BA
RTC
PIT
PIO
WDT
DRXD
DTXD
DBGU
PWM0
PWM1
PWM2
PWM3
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
PWMC
PDC
PDC
Timer Counter
PIOA (26 IOs)
TC0
PIOB (24 IOs)
TC1
PDC
SEG00-SEG39
COM0-COM9
LCD Controller
TWI
PDC
PDC
SPI
PDC
USART0
PDC
PDC
PIO
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
DCD1
DSR1
DTR1
RI1
AT91SAM7L-EK Evaluation Board User Guide
PDC
PDC
ADC
USART1
PIO
TC2
PIOC (30 IOs)
TWD
TWCK
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
ADTRG
AD0
AD1
AD2
AD3
ADVREF
PDC
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6370A–ATARM–15-Feb-08
Board Description
3.3
3.4
3.5
3.6
3.7
3.8
3.9
Memory
„
128 Kbytes of Internal Flash (HB)
„
6 KBytes Internal High Speed SRAM (HB)
Clock Circuitry
„
32.768KHz standard crystal for the embedded oscillator (HB)
„
Internal RC Oscillator (HB)
Reset Circuitry
„
Internal Reset Controller with a bi-directional reset pin (HB)
„
External reset push button (HB)
Supply Controller
„
Programmable Supply Controller (HB)
„
Force Wake-Up Push Button (HB)
Power Supply Circuitry
„
Embedded 1.8V regulator (Drawing up to 60 mA for the Core) (HB)
„
On board 2 x 1.5V AAA type battery cells (not delivered in the kit) (HB)
„
On board 3.3V linear regulator (DB)
„
One VCC/VBAT Power Supply Monitoring device (HB)
Remote Communication
„
One Serial interface (DBGU COM Port) via RS-232 DB9 male socket (DB)
„
One IrDA transceiver (COM Port 0) (HB)
Analog Interface
„
3.10
Four Analog Inputs up to ADVREF input (1.8V max) via one HE10 connector (DB)
User Interface
„
One 35-key Keyboard (7x5 matrix) (HB)
„
One 400-segment LCD Display (HB)
„
One Temperature/Pressure Sensor (Weather Station Application) (HB)
„
Two user's green LEDs (DB)
„
One Yellow Power LED (software controlled) (DB)
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AT91SAM7L-EK Evaluation Board User Guide
Board Description
3.11
3.12
3.13
Debug Interface
„
20-pin JTAG/ICE interface connector (DB)
„
DBGU COM Port (DB)
Expansion Slot
„
One DataFlash, SD/MMC Card Slot (HB)
„
One ZIGBEE interface connector (dedicated to an optional RZ502 board) (HB)
„
All I/Os of the AT91SAM7L are routed to peripheral extension connectors (DB)
PIO Usage
„
The following tables present the way the PIO lines multiplexing has been used on the AT91SAM7L-EK.
Table 3-1. PIOA Usage
I/O Line
Peripheral A
Peripheral B
Comments
Peripheral Usage
Powered By
PA0
COM0
LCD Display
COM0
VDDI02
PA1
COM1
LCD Display
COM1
VDDI02
PA2
COM2
LCD Display
COM2
VDDI02
PA3
COM3
LCD Display
COM3
VDDI02
PA4
COM4
LCD Display
COM4
VDDI02
PA5
COM5
LCD Display
COM5
VDDI02
PA6
SEG0
LCD Display
SEG0
VDDI02
PA7
SEG1
LCD Display
SEG1
VDDI02
PA8
SEG2
LCD Display
SEG2
VDDI02
PA9
SEG3
LCD Display
SEG3
VDDI02
PA10
SEG4
LCD Display
SEG4
VDDI02
PA11
SEG5
LCD Display
SEG5
VDDI02
PA12
SEG6
LCD Display
SEG6
VDDI02
PA13
SEG7
LCD Display
SEG7
VDDI02
PA14
SEG8
LCD Display
SEG8
VDDI02
PA15
SEG9
LCD Display
SEG9
VDDI02
PA16
SEG10
LCD Display
SEG10
VDDI02
PA17
SEG11
LCD Display
SEG11
VDDI02
PA18
SEG12
LCD Display
SEG12
VDDI02
PA19
SEG13
LCD Display
SEG13
VDDI02
PA20
SEG14
LCD Display
SEG14
VDDI02
PA21
SEG15
LCD Display
SEG15
VDDI02
PA22
SEG16
LCD Display
SEG16
VDDI02
AT91SAM7L-EK Evaluation Board User Guide
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6370A–ATARM–15-Feb-08
Board Description
Table 3-1. PIOA Usage (Continued)
I/O Line
Peripheral A
Peripheral B
Comments
Peripheral Usage
Powered By
PA23
SEG17
LCD Display
SEG17
VDDI02
PA24
SEG18
LCD Display
SEG18
VDDI02
PA25
SEG19
LCD Display
SEG19
VDDI02
Table 3-2. PIOB Usage
I/O Line
Peripheral A
Peripheral B
Comments
Peripheral Usage
Powered by
PB0
SEG20
LCD Display
SEG20
VDDI02
PB1
SEG21
LCD Display
SEG21
VDDI02
PB2
SEG22
LCD Display
SEG22
VDDI02
PB3
SEG23
LCD Display
SEG23
VDDI02
PB4
SEG24
LCD Display
SEG24
VDDI02
PB5
SEG25
LCD Display
SEG25
VDDI02
PB6
SEG26
LCD Display
SEG26
VDDI02
PB7
SEG27
LCD Display
SEG27
VDDI02
PB8
SEG28
LCD Display
SEG28
VDDI02
PB9
SEG29
LCD Display
SEG29
VDDI02
PB10
SEG30
LCD Display
SEG30
VDDI02
PB11
SEG31
LCD Display
SEG31
VDDI02
PB12
NPCS3
SEG32
LCD Display
SEG32
VDDI02
PB13
NPCS2
SEG33
LCD Display
SEG33
VDDI02
PB14
NPCS1
SEG34
LCD Display
SEG34
VDDI02
PB15
RTS1
SEG35
LCD Display
SEG35
VDDI02
PB16
RTS0
SEG36
LCD Display
SEG36
VDDI02
PB17
DTR1
SEG37
LCD Display
SEG37
VDDI02
PB18
PWM0
SEG38
LCD Display
SEG38
VDDI02
PB19
PWM1
SEG39
LCD Display
SEG39
VDDI02
PB20
PWM2
COM6
LCD Display
COM6
VDDI02
PB21
PWM3
COM7
LCD Display
COM7
VDDI02
PB22
NPCS1
PCK1
COM8
LCD Display
COM8
VDDI02
PB23
PCK0
NPCS3
COM9
LCD Display
COM9
VDDI02
I
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AT91SAM7L-EK Evaluation Board User Guide
Board Description
Table 3-3. PIOC Usage
/O Line
Peripheral A
Peripheral B
Comments
PC0
CTS1
PWM2
WKUP0
Keypad
PC0 as Keypad ROW 0
VDDIO1
PC1
DCD1
TIOA2
WKUP1
Keypad
PC1 as Keypad ROW 1
VDDIO1
PC2
DTR1
TIOB2
WKUP2
Keypad
PC2 as Keypad ROW 2
VDDIO1
PC3
DSR1
TCLK1
WKUP3
Keypad
PC3 as Keypad ROW 3
VDDIO1
PC4
RI1
TCLK2
WKUP4
Keypad
PC4 as Keypad ROW 4
VDDIO1
PC5
IRQ1
NPCS2
WKUP5
ZIGBEE
IRQ1 with Wake-up
Capability
VDDIO1
PC6
NPCS1
PCK2
WKUP6
ZIGBEE
NPCS1
VDDIO1
PC7
PWM0
TIOA0
High drive
Green User LED 1
PWM0
VDDIO1
PC8
PWM1
TIOB0
High drive
Green User LED
2/ZIGBEE (Shared PIO)
PWM1/PC8 as RSTN
VDDIO1
PC9
PWM2
SCK0
High drive
Yellow Power
LED/ZIGBEE
(Shared PIO)
PWM3/PC15 as
SLP_TR
VDDIO1
PC10
TWD
NPCS3
High drive
Keypad
PC10 as Keypad COL 0
VDDIO1
PC11
TWCK
TCLK0
WKUP7
Keypad
PC11 as Keypad COL 1
VDDIO1
PC12
RXD0
NPCS3
WKUP8
IrDA RXD
RXD0
VDDIO1
PC13
TXD0
PCK0
WKUP9
IrDA TXD
TXD0
VDDIO1
PC14
RTS0
ADTRG
WKUP10
IrDA SD
PC14
VDDIO1
PC15
CTS0
PWM3
WKUP11
VCCSAMP (VCC Sample
for Measure)
PC15 as VCCSAMP
VDDIO1
PC16
DRXD
NPCS1
Serial Debug Com Port
DRXD
VDDIO1
PC17
DTXD
NPCS2
Serial Debug Com Port
DTXD
VDDIO1
PC18
NPCS0
PWM0
Card Socket
NPCS0
VDDIO1
PC19
MISO
PWM1
Card Socket/Pressure
Temperature
Sensor/ZIGBEE
MISO
VDDIO1
PC20
MOSI
PWM2
Card Socket/Pressure
Temperature
Sensor/ZIGBEE
MOSI
VDDIO1
PC21
SPCK
PWM3
Card Socket/Pressure
Temperature
Sensor/ZIGBE
SPCK
VDDIO1
PC22
NPCS3
TIOA1
Pressure Temperature
Sensor
NPCS3 (see AN510
INTERSEMA)
VDDIO1
PC23
PCK0
TIOB1
Pressure Temperature
Sensor
PCK0
VDDIO1
PC24
RXD1
PCK1
Card Socket
PC24 as CARD
DETECT
VDDIO1
PC25
TXD1
PCK2
Keypad
PC25 as Keypad COL 2
VDDIO1
PC26
RTS0
FIQ
Keypad
PC26 as Keypad COL 3
VDDIO1
AT91SAM7L-EK Evaluation Board User Guide
WKUP12
Peripheral Usage
Powered by
3-7
6370A–ATARM–15-Feb-08
Board Description
Table 3-3. PIOC Usage (Continued)
/O Line
Peripheral A
Peripheral B
Comments
PC27
NPCS2
IRQ0
WKUP13
Keypad
PC27 as Keypad COL 4
VDDIO1
PC28
SCK1
PWM0
WKUP14
Keypad
PC28 as Keypad COL 5
VDDIO1
PC29
RTS1
PWM1
WKUP15
Keypad
PC29 as Keypad COL 6
VDDIO1
3-8
6370A–ATARM–15-Feb-08
Peripheral Usage
Powered by
AT91SAM7L-EK Evaluation Board User Guide
Section 4
Configuration
4.1
Configuration Jumpers
The configuration jumpers are all fitted on the handheld board.
Table 4-1. Configuration Jumper Settings (See Figure 4-1)
Designation
Default
Setting
J101
Open
J103
Closed
VDDCORE (Core Power Supply) Jumper (1)
J106
Closed
VDDIO1 (I/O Lines (PIOC) and Voltage Regulator Power Supply) Jumper (1)
J107
2-3
VDDINLCD (LCD Charge Pump Supply) Jumper Select
1 - 2: Powered by VCC (3.3V)
2 - 3: Not powered (connected to GND)
J108
2-3
VDDLCD (LCD Charge Pump Intermediate Voltage) Jumper Select
1 - 2: Powered by VDD3V6 (Output of the LCD Charge Pump)
2 - 3: Powered by VCC (3.3V)
J109
Note:
Closed
Feature
Erases all internal Flash memory and the NVM Configuration Bits when the board is
powered. To do so, the user will have to close this for at least 220 ms.
VDDIO2 (LCD I/O Lines Power Supply (PIOA and PIOB)/LCD Voltage Regulator
Output) and VDDLCD (LCD Charge Pump Intermediate Voltage) Configuration
Jumper
• Closed: VDDIO2 and VDDLCD are powered by VCC (3.3V), the LCD Voltage
Regulator is not used and in this case, J108 Jumper shall be put in 2 - 3 position.
• Opened: the LCD Voltage Regulator is in use and provides VDDIO2. VDDLCD is
provided by VDD3V6 or VCC, depending on J108 Configuration.
1. These jumpers are provided for use as power consumption measurement. By default, they are closed.
To use this feature, the user has to open the strap and insert an anmeter.
AT91SAM7L-EK Evaluation Board User Guide
4-1
6370A–ATARM–15-Feb-08
Configuration
Figure 4-1.
Jumper Location
R130
R110
R109
R103
R106
R107
R108
R111
4-2
6370A–ATARM–15-Feb-08
AT91SAM7L-EK Evaluation Board User Guide
Configuration
4.2
Configuration Straps on the Handheld Board
Table 4-2. Handheld Board Configuration Strap Settings (See Figure 4-2)
Designation
Default
Setting
R130
Open
JTAGSEL Configuration: ICE Mode by Default, JTAG Mode if Soldered
R103
Open
Allows to strap J103: if fitted, connects permanently VDDCORE to VDDOUT
R106
Open
Allows to strap J106: if fitted, connects permanently VDDIO1 to VCC (3.3V)
R107
Open
Allows to strap J107 1 - 2 position: if fitted, connects permanently VDDINLCD to
VCC (3.3V)
R108
Open
Allows to strap J108 1 - 2 position: if fitted, connects permanently VDDLCD to
VDD3V6
R109
Open
Allows to strap J109: if fitted, connects permanently VDDLCD to VDDIO2
R110
Open
Allows to strap J108 2 - 3 position: if fitted, connects permanently VDDLCD to
VCC (3.3V)
R111
Open
Allows to strap J107 2 - 3 position: if fitted, connects permanently VDDINLCD to
GND
R184
Open
Allows to strap the U109/U110 device on the ZIGBEE INTERFACE. The
configuration depends on the optional RZ502 board revision
AT91SAM7L-EK Evaluation Board User Guide
Feature
4-3
6370A–ATARM–15-Feb-08
Configuration
Figure 4-2.
Strap Location
J101
J103
J106
J107
J108
J109
4.3
Configuration Straps on the Docking Board
Table 4-3. Docking Board Configuration Straps
4.4
Designation
Default
Setting
R208
Soldered
Feature
Enables the ICE NRST input by default (when soldered)
Miscellaneous Configuration
Table 4-4. Miscellaneous Configuration
4-4
6370A–ATARM–15-Feb-08
Designation
Default
Setting
TP100
N.A
GND Test point on the HB
TP250
N.A
GND Test point on the DB
Feature
AT91SAM7L-EK Evaluation Board User Guide
Configuration
4.5
Power Supply Schemes
The following figures illustrate the three typical power supply schematics of the AT91SAM7L related to
J107, J108 and J109 jumper configurations.
Figure 4-3.
The LCD Charge Pump supplies the LCD Voltage Regulator (J107 in 1 - 2 position, J108
in 1 - 2 position, J109 Opened)
VDDIO2
VDDLCD
LCD
Voltage
Regulator
CAPP1
VDD3V6
CAPM1
Charge
Pump
External supply
CAPP2
VDDINLCD
CAPM2
Figure 4-4.
The LCD Voltage Regulator is externally supplied (J107 in 2 - 3 position, J108 in 2 - 3
position, J109 Opened)
VDDIO2
External supply
VDDLCD
LCD
Voltage
Regulator
CAPP1
VDD3V6
CAPM1
Charge
Pump
CAPP2
VDDINLCD
CAPM2
AT91SAM7L-EK Evaluation Board User Guide
4-5
6370A–ATARM–15-Feb-08
Configuration
Figure 4-5.
The LCD Charge Pump and the LCD Voltage Regulator are not used (J107 in 2 - 3 position, J108 in 2 - 3 position, J109 Closed, Default Configuration)
External supply
VDDIO2
VDDLCD
LCD
Voltage
Regulator
CAPP1
VDD3V6
CAPM1
Charge
Pump
CAPP2
VDDINLCD
CAPM2
4-6
6370A–ATARM–15-Feb-08
AT91SAM7L-EK Evaluation Board User Guide
Section 5
Schematics
5.1
Schematics
This section contains the following schematics:
„
Top Level
„
Handheld: Processor
„
Handheld: LCD, KBD
„
Handheld: Interfaces
„
Handheld-dock Connection
„
Dock: PIO, Power
AT91SAM7L-EK Evaluation Board User Guide
5-1
6370A–ATARM–15-Feb-08
D
C
B
A
5
Sheet 6
DB_PC[0..29]
DB_PB[0..23]
DB_PA[0..25]
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_JTAG_TDO
DB_AD[0..3]
DB_ADVREF
4
DB_PC[0..29]
DB_PB[0..23]
DB_PA[0..25]
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_JTAG_TDO
DB_AD[0..3]
DB_ADVREF
Docking station
Dock PIO, power
DB_ADVREF
DB_AD[0..3]
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_JTAG_TDO
DB_PA[0..25]
DB_PB[0..23]
DB_PC[0..29]
Handheld-Dock connection
DB_VCC
DB_GND
ADVREF
JTAG_RST
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
AD[0..3]
PA[0..25]
PB[0..23]
PC[0..29]
BATTSEL_A
BATTSEL_B
Sheet 5
Power symbols on docking board
Refdes 1xx indicates placed on handheld board
Refdes 2xx indicates placed on docking board
DB_x signal name indicates a signal on the docking board
HH_GND
Power symbols on handheld board
VCC
3
Handheld processor
PC[0..29]
PB[0..23]
PA[0..25]
AD[0..3]
JTAG_RST
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
ADVREF
Handheld device
ADVREF
AD[0..3]
JTAG_RST
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
PA[0..25]
PB[0..23]
PC[0..29]
BATTSEL_A
BATTSEL_B
AD[0..3]
PC[0..29]
BATTSEL_A
BATTSEL_B
Handheld interfaces
PA[0..25]
PB[0..23]
PC[0..29]
Handheld LCD, KBD
2
Sheet 2
Sheet 4
Sheet 3
AT91SAM7L-EK
MODIF.
B UPDATED
A INIT EDIT
SCALE
REV
1/1
1
DES.
DATE
TMN 15-Nov-07
TMN 27-Aug-07
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
Top level
REV.
SHEET
DATE
1
6
VER.
D
C
B
A
XXX XX-XXX-XX
XXX XX-XXX-XX
B
PB[0..23]
FORCE WAKE-UP
5
VCC
C152
100n
R149
100k
R128
10k
1
R150
100k
U106
EN
VCC
OUT
3
CB3LV-3C-25M0000
HH_GND
R151
100k
4
VCC
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
R129
33R
R130
41
42
43
44
45
46
47
48
49
50
51
52
53
54
57
58
59
60
61
63
64
65
66
67
125
118
116
82
81
117
79
83
121
122
U100
3
AT91SAM7L-LQFP128
PB0_SEG20
PB1_SEG21
PB2_SEG22
PB3_SEG23
PB4_SEG24
PB5_SEG25
PB6_SEG26
PB7_SEG27
PB8_SEG28
PB9_SEG29
PB10_SEG30
PB11_SEG31
PB12/NPCS3_SEG32
PB13/NPCS2_SEG33
PB14/NPCS1_SEG34
PB15/RTS1_SEG35
PB16/RTS0_SEG36
PB17/DTR1_SEG37
PB18/PWM0_SEG38
PB19/PWM1_SEG39
PB20/PWM2_COM6
PB21/PWM3_COM7
PB22/NPSC1/PCK1_COM8
PB23/PCK0/NPCS3_COM9
CLKIN
FWUP
TDI
TMS
TCK
TDO
NRST
JTAGSEL
PLLRC
+
D
VCC
C167
100n
SW102
SKRAALE010
FWKUP
R127
100k
HH_GND
R126
0R
PLLRCGND
+
NRSTB
TST
AD3
AD2
AD1
AD0
ADVREF
PA0_COM0
PA1_COM1
PA2_COM2
PA3_COM3
PA4_COM4
PA5_COM5
PA6_SEG0
PA7_SEG1
PA8_SEG2
PA9_SEG3
PA10_SEG4
PA11_SEG5
PA12_SEG6
PA13_SEG7
PA14_SEG8
PA15_SEG9
PA16_SEG10
PA17_SEG11
PA18_SEG12
PA19_SEG13
PA20_SEG14
PA21_SEG15
PA22_SEG16
PA23_SEG17
PA24_SEG18
PA25_SEG19
AT91SAM7L64-AU
1
2
3
J107
C109
JS107
2
3
4
5
6
7
8
9
10
11
12
13
16
17
18
19
20
21
22
23
24
25
26
27
29
30
31
69
70
71
72
73
1
R199
10R
0805
VCC
JS106
R106
0R
126
10uF/10V/X5R
0805
R111
0R
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
AD3
AD2
AD1
AD0
J101
JS101
0R
R190
2
1
PA20
R133
100k
HH_GND
VDDOUT
22R
R118
MODIF.
1/1
B UPDATED
A INIT EDIT
SCALE
REV
C147
100n
HH_GND
HH_GND
VCC
AT91SAM7L-EK
1
DES.
PC[0..29]
PA[0..25]
ADVREF
AD[0..3]
VCC
RESET
R131
1k
RSTB
SW101
SKRAALE010
SHEET
DATE
2
6
REV.
D
C
B
A
XXX XX-XXX-XX
XXX XX-XXX-XX
B
VER.
HH_GND
DATE
TMN 15-Nov-07
TMN 27-Aug-07
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
Handheld: processor
2
1
C141 22n
10k
XOUT
XIN/PGMCK
GNDPLL
C165
220n
HH_GND
ERASE
R107
0R
80
128
127
123
+
C164
220n
R103
J103
0R
VDDIO2
VDDIO2
VDDIO2
Q13FC1450000614
0R
R108
10uF/16V
C108
C105
10uF/16V
GND
GND
GND
GND
GND
GND
GND
XC101
C138
6.8p
R110
CAPM2
CAPP2
CAPM1
CAPP1
R132
C149 2.2n
C140
6.8p
HH_GND
R109
0R VCC
VDDLCD
VDD3V6
35
36
37
38
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TDO
JTAG_RST
VCC
1k
JS109
0R
J108
JS108
33
34
C
B
A
2
14
40
56
68
76
86
120
1
15
32
55
1
J106
VDDOUT
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
JS103
C145 100n
C142 100n
C146 100n
C144 100n
C157 100n
C158 100n
74
2
28
62
84
100
124
2.2u
100n
100n
100n
100n
100n
100n
VDDINLCD
39
HH_GND
VDDIO1
VDDIO1
VDDIO1
C106 10uF/16V
4
3
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
75
85
119
2
3
2
1
4
VCC
GND
2
87
88
89
90
91
92
93
94
95
96
97
98
99
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
77
78
C166
C139
C133
C148
C131
C102
C103
100n
C134
PC0/CTS1/PWM2_WKUP0
PC1/DCD1/TIOA2_WKUP1
PC2/DTR1/TIOB2_WKUP2
PC3/DSR1/TCLK1_WKUP3
PC4/RI1/TCLK2_WKUP4
PC5/IRQ1/NPCS2_WKUP5
PC6/NPCS1/PCK2_WKUP6
PC7/PWM0/TIOA0
PC8/PWM1/TIOB0
PC9/PWM2/SCK0
PC10/TWD/NPCS3
PC11/TWCK/TCLK0_WKUP7
PC12/RXD0/NPCS3_WKUP8
PC13/TXD0/PCK0_WKUP9
PC14/RTS0/ADTRG_WKUP10
PC15/CTS0/PWM3_WKUP11
PC16/DRXD/NPCS1
PC17/DTXD/MPCS2
PC18/NPCS0/PWM0
PC19/MISO/PWM1
PC20/MOSI/PWM2
PC21/SPCK/PWM3
PC22/MPCS3/TIOA1
PC23/PCK0/TIOB1
PC24/RXD1/PCK1
PC25/TXD1/PCK2
PC26/RTS0/FIQ_WKUP12
PC27/NPCS2/IRQ0_WKUP13
PC28/SCK1/PWM0_WKUP14
PC29/RTS1/PWM1_WKUP15
VDDOUT
1
J109
2
2
1
4
3
SEG37
3
COM2
SEG35
46
SEG36
SEG35
COM3
4
COM3
SEG34
45
SEG34
COM4
5
COM4
SEG33
44
SEG33
COM5
6
COM5
SEG32
43
SEG32
COM6
7
COM6
SEG31
42
SEG31
COM7
8
COM7
SEG30
41
SEG30
COM8
9
COM8
SEG29
40
SEG29
COM9
10
COM9
SEG28
39
SEG28
SEG0
11
SEG0
SEG27
38
SEG27
SEG1
12
SEG1
SEG26
37
SEG26
SEG2
13
SEG2
SEG25
36
SEG25
SEG3
14
SEG3
SEG24
35
SEG24
SEG4
15
SEG4
SEG23
34
SEG23
SEG5
16
SEG5
SEG22
33
SEG22
SEG6
17
SEG6
SEG21
32
SEG21
SEG7
18
SEG7
SEG20
31
SEG20
SEG8
19
SEG8
SEG19
30
SEG19
SEG9
20
SEG9
SEG18
29
SEG18
SEG10
21
SEG10
SEG17
28
SEG17
SEG11
22
SEG11
SEG16
27
SEG16
SEG12
23
SEG12
SEG15
26
SEG15
SEG14
25
SEG14
SEG13
24
SEG13
4
SEG36
COM2
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
COM6
COM7
COM8
COM9
COM1
47
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
2
COM0
COM1
COM2
COM3
COM4
COM5
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
COM1
5
48
PC[0..29]
SEG38
SEG37
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
1
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
COM0
PB[0..23]
PA[0..25]
SEG39
49
D
C
B
A
50
SEG38
COM0
SEG39
ROW0
ROW1
ROW2
ROW3
ROW4
COL0
COL1
COL2
COL3
COL4
COL5
COL6
LCD100
Custom LCD
3
E221
FIDUCIAL
E120
FIDUCIAL
E222
FIDUCIAL
ROW0
E101
SJ-5327
E102
SJ-5327
e103
SJ-5327
E104
2
SJ-5327
E204
SJ-5327
E203
SJ-5327
E202
SJ-5327
E201
ROW3
ROW2
ROW1
ROW0
SW100
SJ-5327
1
ROW1
4
2
5
3
ROW3
ROW2
ROW4
ROW4
Keyboard 7x5
AT91SAM7L-EK
PCB1
10
9
8
7
6
COL6
COL5
COL4
COL3
COL2
COL1
COL0
1
11
DES.
DATE
TMN 15-Nov-07
TMN 27-Aug-07
12
A08-0378.B
COL0
COL1
COL2
COL3
COL4
COL5
COL6
MODIF.
B UPDATED
A INIT EDIT
SCALE
REV
1/1
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
Handheld: LCD, KBD
REV.
SHEET
DATE
D
C
B
A
XXX XX-XXX-XX
XXX XX-XXX-XX
3
6
VER.
B
5
5
VCC
MS5540B
WEATHER STATION
PRESSURE/TEMPERATURE SENSOR
+ C159
47uF/6V
U107
VDD
MCLK
VCC
R168
100k R169
100k
4
R170
100k
R171
100k
8
7
6
SPI_MISO
PC20
PC23
2
1
2
C151
100n
HH_GND
S102
AAA
1
2
VCC
3
PC19
PC22
IRQ1
SLP_TR
MOSI
NPSC1
VCC
PC9
PC20
PC6
VCC
R173
100k
R174
100k
IrDA TRANSCEIVER
PC13
PC12
PC14
J110
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
HH_GND
7
8
9
1
5
2
10
12
11
VCC
+
R193
10R
HH_GND
2
8
7
6
5
4
3
2
1
U105
VLED
TXD
RXD
SD
AGND
VCC
NC
GND
TM3201/TR2
SHIELD
VCC
PC8
PC21
13
4
3
6
14
HH_GND
VCC
9
VCC
C153
100n
VCC
R185
10k
ZIGBEE INTERFACE
RSTN
MISO
SPCK
VDD
NC
CLK
CMD
VSS1
VSS2
VSS3
SCDA1A0900
DETECT
WP
SW_COM
D0
D1
D2
D3
J111
SD/MMC CARD
SMD right angle receptacle, 2x20, 2.54mm
SPI_MISO
PC5
PC19
SPI_CLK
SPI_MOSI
SPI_CS
PC21
PC20
SPI_CARDDETECT
HH_GND
PC24
PC18
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Note: Pin 1 on Zigbee board RZ502 is pin 2 on J110 connector
NC7SZ125P5X
4
U108
HH_GND
AAA_HOLDER
S104
AAA
AAA_HOLDER
10uF/16V
DIN
S101
S103
BATTERY_CONN
PC21
+
AAA
1
1
2
AAA
+
AAA_HOLDER
1
2
AAA_HOLDER
C129
DOUT
SCLK
PC15
Q104B
8
7
100n
HH_GND
VCC
1
2
1
FDS6898A
C130
NC2
NC1
FDN304P
Q103
R192
10k
R191
10k
HH_GND
R181
3.3M
BATTERY SELECT
C180
4.7u
3
4
HH_GND
Q104A
FDS6898A
5
3
1
4
3
AD3
VCC
5
6
VCC/VBAT MONITOR
HH_GND
2
GND
Pressure
C150
100n
HH_GND
E130
LIGHT PROTECTION CAP
AD[0..3]
C132
100n
HH_GND
HH_GND
2
3
D
C
B
A
BATTSEL_B
BATTSEL_A
C
CP
D
U110
HH_GND
3
1
6
2
4
5
R184
0R
VCC
Q
GND
VCC
NC7SZ175L6X
C154
100n
HH_GND
AT91SAM7L-EK
VCC
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
2
1
VCC
UPDATED
1/1
INIT EDIT
MODIF.
HH_GND
B
A
SCALE
REV
5
4
U109
NC7SZ125P5X
VCC
PC[0..29]
SHEET
DATE
4
6
REV.
B
VER.
D
C
B
A
XXX XX-XXX-XX
XXX XX-XXX-XX
PC19
C155
100n
HH_GND
DATE
TMN 15-Nov-07
TMN 27-Aug-07
DES.
3
1
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
Handheld: interfaces
HH_GND
Temperature
D
C
B
A
PA[0..25]
PB[0..23]
PC[0..29]
AD[0..3]
ADVREF
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TDO
JTAG_RST
5
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
AD3
AD2
AD1
AD0
ADVREF
BATTSEL_A
TP100
TEST-LOOP
HH_GND
VCC
VCC
AD3
AD1
PC29
PC28
PC26
PC24
PC22
PC20
PC19
PC16
PC14
PC12
PC10
PC8
PC7
PC5
PC4
PC1
PA24
PA22
PA21
PA18
PA16
PA14
PA12
PA11
PA9
PA8
PA5
PA3
PA1
PB21
PB19
PB17
PB15
PB13
PB12
PB9
PB7
PB5
PB3
PB1
PB0
JTAG_RST
JTAG_TCK
JTAG_TMS
JTAG_TDI
4
PCI-EXP_164 Male
Guide key
J100
BATTSEL_B
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
HandHeld Board
VCC
VCC
ADVREF
AD2
AD0
PC27
PC25
PC23
PC21
PC18
PC17
PC15
PC13
PC11
PC9
PC6
PC3
PC2
PC0
PA25
PA23
PA20
PA19
PA17
PA15
PA13
PA10
PA7
PA6
PA4
PA2
PA0
PB23
PB22
PB20
PB18
PB16
PB14
PB11
PB10
PB8
PB6
PB4
PB2
JTAG_TDO
3
DB_GND
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
J200
Guide key
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
PCI-EXP_164 Female
2
DB_VCC
DB_VCC
DB_ADVREF
DB_AD2
DB_AD0
DB_PC27
DB_PC25
DB_PC23
DB_PC21
DB_PC18
DB_PC17
DB_PC15
DB_PC13
DB_PC11
DB_PC9
DB_PC6
DB_PC3
DB_PC2
DB_PC0
DB_PA25
DB_PA23
DB_PA20
DB_PA19
DB_PA17
DB_PA15
DB_PA13
DB_PA10
DB_PA7
DB_PA6
DB_PA4
DB_PA2
DB_PA0
DB_PB23
DB_PB22
DB_PB20
DB_PB18
DB_PB16
DB_PB14
DB_PB11
DB_PB10
DB_PB8
DB_PB6
DB_PB4
DB_PB2
DB_GND
DB_JTAG_TDO
Docking Board
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_PB9
DB_PB7
DB_PB5
DB_PB3
DB_PB1
DB_PB0
DB_PB21
DB_PB19
DB_PB17
DB_PB15
DB_PB13
DB_PB12
DB_PA5
DB_PA3
DB_PA1
DB_PA18
DB_PA16
DB_PA14
DB_PA12
DB_PA11
DB_PA9
DB_PA8
DB_PA24
DB_PA22
DB_PA21
DB_PC1
DB_PC16
DB_PC14
DB_PC12
DB_PC10
DB_PC8
DB_PC7
DB_PC5
DB_PC4
DB_PC29
DB_PC28
DB_PC26
DB_PC24
DB_PC22
DB_PC20
DB_PC19
DB_AD3
DB_AD1
DB_VCC
DB_VCC
PCI-STYLE CONNECTION BETWEEN
HANDHELD AND DOCKING BOARD
HH_GND
TP250
TEST-LOOP
AT91SAM7L-EK
DB_PA0
DB_PA1
DB_PA2
DB_PA3
DB_PA4
DB_PA5
DB_PA6
DB_PA7
DB_PA8
DB_PA9
DB_PA10
DB_PA11
DB_PA12
DB_PA13
DB_PA14
DB_PA15
DB_PA16
DB_PA17
DB_PA18
DB_PA19
DB_PA20
DB_PA21
DB_PA22
DB_PA23
DB_PA24
DB_PA25
DB_PB0
DB_PB1
DB_PB2
DB_PB3
DB_PB4
DB_PB5
DB_PB6
DB_PB7
DB_PB8
DB_PB9
DB_PB10
DB_PB11
DB_PB12
DB_PB13
DB_PB14
DB_PB15
DB_PB16
DB_PB17
DB_PB18
DB_PB19
DB_PB20
DB_PB21
DB_PB22
DB_PB23
DB_PC0
DB_PC1
DB_PC2
DB_PC3
DB_PC4
DB_PC5
DB_PC6
DB_PC7
DB_PC8
DB_PC9
DB_PC10
DB_PC11
DB_PC12
DB_PC13
DB_PC14
DB_PC15
DB_PC16
DB_PC17
DB_PC18
DB_PC19
DB_PC20
DB_PC21
DB_PC22
DB_PC23
DB_PC24
DB_PC25
DB_PC26
DB_PC27
DB_PC28
DB_PC29
DB_AD0
DB_AD1
DB_AD2
DB_AD3
DB_ADVREF
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_JTAG_TDO
MODIF.
B UPDATED
A INIT EDIT
SCALE
REV
1/1
1
DES.
DB_PA[0..25]
DB_PB[0..23]
DB_PC[0..29]
DB_AD[0..3]
SHEET
DATE
5
6
REV.
B
VER.
D
C
B
A
XXX XX-XXX-XX
XXX XX-XXX-XX
DB_ADVREF
DB_JTAG_RST
DB_JTAG_TCK
DB_JTAG_TMS
DB_JTAG_TDI
DB_JTAG_TDO
DATE
TMN 15-Nov-07
TMN 27-Aug-07
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
Handheld-Dock connection
D
C
B
A
5
14
7
13
8
6
T1OUT
T2OUT
R1IN
R2IN
V-
ADM3202
2 V+
DB_VCC
DB_PB0
DB_PB1
DB_PB2
DB_PB3
DB_PB4
DB_PB5
DB_PB6
DB_PB7
DB_PB8
DB_PB9
DB_PB10
DB_PB11
DB_PB12
DB_PB13
DB_PB14
DB_PB15
DB_PB16
DB_PB17
DB_PB18
DB_PB19
DB_PB20
DB_PB21
DB_PB22
DB_PB23
100n
C238
C239
100n
R215
0R
2
4
6
8
10
C240
100n
C236
100n
C237
100n
R216
100k
TP209
R217
DB_PA0
DB_PA2
DB_PA4
DB_PA6
DB_PA8
DB_PA10
DB_PA12
DB_PA14
DB_PA16
DB_PA18
DB_PA20
DB_PA22
DB_PA24
DB_VCC
3
1
DB_PB1
DB_PB3
DB_PB5
DB_PB7
DB_PB9
DB_PB11
DB_PB13
DB_PB15
DB_PB17
DB_PB19
DB_PB21
DB_PB23
DB_VCC
J206
1
3
5
7
9
11
13
15
17
19
DB_VCC
2
4
6
8
10
12
14
16
18
20
J203
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
DB_PB0
DB_PB2
DB_PB4
DB_PB6
DB_PB8
DB_PB10
DB_PB12
DB_PB14
DB_PB16
DB_PB18
DB_PB20
DB_PB22
DB_VCC
R206
100k
TP241
R208
0R
TP240
VOUT
2
DB_PC1
DB_PC3
DB_PC5
DB_PC7
DB_PC9
DB_PC11
DB_PC13
DB_PC15
DB_PC17
DB_PC19
DB_PC21
DB_PC23
DB_PC25
DB_PC27
DB_PC29
DB_VCC
DB_GND
TP238
DB_VCC
TP239
+ C242
10uF/10V
J204
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PIO C
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DB_PC0
DB_PC2
DB_PC4
DB_PC6
DB_PC8
DB_PC10
DB_PC12
DB_PC14
DB_PC16
DB_PC18
DB_PC20
DB_PC22
DB_PC24
DB_PC26
DB_PC28
DB_VCC
TSM-120-01-LM-DV
TP232
TP230
TP228
DB_GND
TP227
TP226
1
TP225
1
D204
D205
D206
B
A
2
2
2
UPDATED
INIT EDIT
MODIF.
1/1
TP223
TP222
390R
R286
390R
R285
R287
390R
DES.
TMN 15-Nov-07
TMN 27-Aug-07
DATE
DB_JTAG_TDO
DB_JTAG_RST
DB_JTAG_TDI
DB_JTAG_TMS
DB_JTAG_TCK
TP224
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
SCALE
REV
EL17-21UYC/A2
1
YELLOW POWER LED
EL17-21SYGC
1
GREEN USER LED 2
EL17-21SYGC
DB_JTAG_TDO
DB_JTAG_RST
DB_PC7
DB_PC8
DB_PC9
TP229
GREEN USER LED 1
DB_GND
TP231
DB_JTAG_TDI
DB_JTAG_TMS
DB_JTAG_TCK
TP233
AT91SAM7L-EK
TP234
Dock: PIO, power
SHEET
DATE
6
6
REV.
B
VER.
TP237
TP236
TP235
D
C
B
A
XXX XX-XXX-XX
XXX XX-XXX-XX
DB_VCC
TP220
PIO B
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
TP210
WITH NO SOLDER MASK
U201
VIN
GND
LMS8117ADTX-3.3
DB_GND
TP221
PIO A
J202
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
TSM-120-01-LM-DV
TP211
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DB_GND
TP212
ICE INTERFACE
TP213
3
TP201
TSM-120-01-LM-DV
TP214
DB_VCC
TP215
2x10, shrouded
TP216
DB_GND
TP217
DB_PA1
DB_PA3
DB_PA5
DB_PA7
DB_PA9
DB_PA11
DB_PA13
DB_PA15
DB_PA17
DB_PA19
DB_PA21
DB_PA23
DB_PA25
TP202
Fill free space of the PCB with unconnected pin holes with 1.27 mm pitch
TP218
5 SQUARE CM COPPER AREA FOR HEAT SINKING
+ C243
10uF/10V
DB_VIN
TP219
DB_VCC
TP203
DB_GND
C226
100n
TP200
DB_GND
TP204
Protoype area.
DB_VIN
DB_PC17
DB_PC16
1
MBR0520L_NL
D207
0R
TP208
2
TP205
4
11
10
12
9
4
5
1
3
DB_GND
DB_PC0
DB_PC1
DB_PC2
DB_PC3
DB_PC4
DB_PC5
DB_PC6
DB_PC7
DB_PC8
DB_PC9
DB_PC10
DB_PC11
DB_PC12
DB_PC13
DB_PC14
DB_PC15
DB_PC16
DB_PC17
DB_PC18
DB_PC19
DB_PC20
DB_PC21
DB_PC22
DB_PC23
DB_PC24
DB_PC25
DB_PC26
DB_PC27
DB_PC28
DB_PC29
U202
C1+
C1C2+
C2T1IN
T2IN
R1OUT
R2OUT
DB_GND
DB_GND
TP206
DB_PC[0..29]
DB_PA0
DB_PA1
DB_PA2
DB_PA3
DB_PA4
DB_PA5
DB_PA6
DB_PA7
DB_PA8
DB_PA9
DB_PA10
DB_PA11
DB_PA12
DB_PA13
DB_PA14
DB_PA15
DB_PA16
DB_PA17
DB_PA18
DB_PA19
DB_PA20
DB_PA21
DB_PA22
DB_PA23
DB_PA24
DB_PA25
DB_GND
DB_GND
J205
ADC
1
3
5
7
9
CD075014 2X5
J211
2
3
1
4
PJ-002AH-SMT
TP207
DB_PB[0..23]
DB_PA[0..25]
10
1
6
2
7
3
8
4
9
5
11
0R
DB_AD0
DB_AD1
DB_AD2
DB_AD3
DB_ADVREF
R214
SERIAL DEBUG PORT
J201
1-1740195-5
DB_AD[0..3]
DB_ADVREF
16
VCC
GND
15
Section 6
Errata
6.1
Optimal Operation
For optimal operation of the AT91SAM7L microcontroller within a standard application, please apply the
following recommendations:
„
Add a 100KΩ pulldown on CLKIN input (pin 125). Take care to place it very close to that pin.
„
Change ADVREF load resistor (R118) value to 180.
„
Add a 100KΩ pullup on PIO line PC22.
AT91SAM7L-EK Evaluation Board User Guide
6-1
6370A–ATARM–15-Feb-08
Section 7
Revision History
7.1
Revision History
Table 7-1.
Document
Comments
6370
First Issue
AT91SAM7L-EK Evaluation Board User Guide
Change
Request Ref.
7-1
6370A–ATARM–15-Feb-08
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