Dual Low Offset, Low Power Operational Amplifier OP200 Data Sheet PIN CONNECTIONS Low input offset voltage: 75 µV maximum Low offset voltage drift, over −55°C < TA < +125°C 0.5 µV/°C maximum Low supply current (per amplifier): 725 µA maximum High open-loop gain: 5000 V/mV minimum Low input bias current: 2 nA maximum Low noise voltage density: 11 nV/√Hz at 1 kHz Stable with large capacitive loads: 10 nF typical –IN A 1 16 OUT A +IN A 2 15 NC NC 3 14 NC V– 4 13 V+ NC 5 12 NC +IN B 6 11 NC –IN B 7 10 OUT B NC 8 9 NC NC = NO CONNECT 00322-001 FEATURES OUT A 1 –IN A 2 +IN A 3 V– 4 OP200 A B 8 V+ 7 OUT B 6 –IN B 5 +IN B 00322-002 Figure 1. 16-Lead SOIC (S-Suffix) Figure 2. 8-Lead PDIP (P-Suffix) 8-Lead CERDIP (Z-Suffix) GENERAL DESCRIPTION The OP200 is the first monolithic dual operational amplifier to offer OP77 type precision performance. Available in the industry standard 8-lead pinout, the OP200 combines precision performance with the space and cost savings offered by a dual amplifier. The OP200 features an extremely low input offset voltage of less than 75 µV with a drift below 0.5 µV/°C, guaranteed over the full military temperature range. Open-loop gain of the OP200 exceeds 5,000,000 into a 10 kΩ load; input bias current is under 2 nA; CMRR is over 120 dB; and PSRR is below 1.8 µV/V. On-chip Zener zap trimming is used to achieve the extremely low input offset voltage of the OP200 and eliminates the need for offset pulling. Rev. F Power consumption of the OP200 is low, with each amplifier drawing less than 725 µA of supply current. The total current drawn by the dual OP200 is less than one-half that of a single OP07, yet the OP200 offers significant improvements over this industry-standard op amp. The voltage noise density of the OP200, 11 nV/√Hz at 1 kHz, is half that of most competitive devices. The OP200 is an ideal choice for applications requiring multiple precision op amps and where low power consumption is critical. For a quad precision op amp, see the OP400. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©1978–2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com OP200 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 12 Pin Connections ............................................................................... 1 Dual Low Power Instrumentation Amplifier ......................... 12 General Description ......................................................................... 1 Precision Absolute Value Amplifier ......................................... 12 Revision History ............................................................................... 2 Precision Current Pump ............................................................ 12 Specifications..................................................................................... 4 Dual 12-Bit Voltage Output DAC ............................................ 13 Electrical Characteristics ............................................................. 4 Dual Precision Voltage Reference ............................................ 13 Absolute Maximum Ratings ............................................................ 7 Programmable High Resolution Window Comparator ........ 14 Thermal Resistance ...................................................................... 7 Outline Dimensions ....................................................................... 15 ESD Caution .................................................................................. 7 Ordering Guide .......................................................................... 16 Typical Performance Characteristics ............................................. 8 REVISION HISTORY 10/15—Rev. E to Rev. F 2/04—Rev. A to Rev. B. Changes to General Description .................................................... 1 Changes to Ordering Guide .......................................................... 16 OP200F Deleted .................................................................. Universal Changes to Ordering Guide .............................................................5 Changes to Figure 4 ...........................................................................8 Updated Outline Dimension ........................................................ 11 9/12—Rev. D to Rev. E Changed Table 2 Conditions from VS = 15 V to VS = ±15 V ...... 4 Updated Outline Dimensions ....................................................... 15 Changes to Ordering Guide .......................................................... 16 2/09—Rev. C to Rev. D Change to Large Signal Voltage Gain, Table 2 .............................. 4 Changes to Ordering Guide .......................................................... 16 8/08—Rev. B to Rev. C 4/02—Rev. 0 to Rev. A. Edits to Features.................................................................................1 Edits to General Description ...........................................................1 Edits to Ordering Information ........................................................1 Edits to Pin Connections ..................................................................1 Edits to Absolute Maximum Ratings ..............................................2 Edits to Package Type .......................................................................2 Updated Format .................................................................. Universal Changes to Features Section............................................................ 1 Changes to Table 1 and Table 2 ....................................................... 4 Changes to Table 3 and Table 4 ....................................................... 5 Deleted Table 7; Renumbered Sequentially................................... 5 Changes to Figure 15 ........................................................................ 9 Changes to Figure 21 ...................................................................... 10 Changes to Figure 30 and Figure 31............................................. 12 Changes to Programmable High Resolution Window Comparator Section, Figure 33, and Figure 34........................... 13 Changes to Figure 35 ...................................................................... 14 Updated Outline Dimensions ....................................................... 15 Changes to Ordering Guide .......................................................... 16 Rev. F | Page 2 of 16 Data Sheet OP200 V+ BIAS OUT VOLTAGE LIMITING NETWORK –IN V– Figure 3. Simplified Schematic (One of Two Amplifiers Shown) Rev. F | Page 3 of 16 00322-003 +IN OP200 Data Sheet SPECIFICATIONS ELECTRICAL CHARACTERISTICS VS = ±15 V, TA = 25°C, unless otherwise noted. Table 1. Parameter INPUT CHARACTERISTICS Input Offset Voltage Long-Term Input Voltage Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density 1 Input Noise Current Input Noise Current Density Input Resistance Differential Mode Input Resistance Common Mode Large Signal Voltage Gain 1 Symbol Conditions OP200A/OP200E Min Typ Max VOS IOS IB en p-p en in p-p in RIN RINCM AVO 25 0.1 0.05 0.1 0.5 22 11 15 0.4 10 125 VCM = 0 V VCM = 0 V 0.1 Hz to 10 Hz fO = 10 Hz fO = 1000 Hz 0.1 Hz to 10 Hz fO = 10 Hz VO = ±10 V RL = 10 kΩ RL = 2 kΩ 5000 2000 Min 75 80 0.1 0.05 0.1 0.5 22 11 15 0.4 10 125 1.0 2.0 36 18 12,000 3700 OP200G Typ Max 3000 1500 200 3.5 5.0 Unit μV μV/mo nA nA μV p-p nV/√Hz nV/√Hz pA p-p pA/√Hz MΩ GΩ 7000 3200 M/mV M/mV OP200A Typ Max Unit 45 0.2 0.15 0.9 125 0.5 2.5 5.0 μV μV/°C nA nA Sample tested. VS = ±15 V, −55°C ≤ TA ≤ +125°C for OP200A, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Large Signal Voltage Gain Input Voltage Range 1 Common-Mode Rejection Ratio Capacitive Load Stability POWER SUPPLY Power Supply Rejection Ratio Supply Current Per Amplifier OUTPUT CHARACTERISTICS Output Voltage Swing 1 Symbol VOS TCVOS IOS IB AVO IVR CMRR Conditions VCM = 0 V VCM = 0 V VO = 10 V RL = 10 kΩ RL = 2 kΩ VCM = ±12 V AV = 1 PSRR ISY VS = 3 V to 18 V No load VO RL = 10 kΩ RL = 2 kΩ Min 3000 1000 ±12 115 9000 2700 ±12.5 130 8 0.2 600 ±12 ±11 Guaranteed by CMRR test. Rev. F | Page 4 of 16 ±12.4 ±12 V/mV V/mV V dB nF 3.2 775 μV/V μA V V Data Sheet OP200 VS = ±15 V, TA = 25°C, unless otherwise noted. Table 3. Parameter INPUT CHARACTERISTICS Input Voltage Range 1 Common-Mode Rejection Ratio Channel Separation 2 Input Capacitance Capacitive Load Stability POWER SUPPLY Power Supply Rejection Ratio Supply Current Per Amplifier OUTPUT CHARACTERISTICS Output Voltage Swing DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product 1 2 Symbol Conditions OP200A/OP200E Min Typ Max Min IVR CMRR CS CIN VCM = ±12 V VO = 20 V p-p, fO = 10 Hz ±12 120 123 ±12 110 123 AV = 1, no oscillations ±13 135 145 3.2 10 PSRR ISY VS = ±3 V to ±18 V No load 0.4 570 VO RL= 10 kΩ RL = 2 kΩ SR GBP 1.8 725 OP200G Typ Max ±13 130 145 3.2 10 0.6 570 Unit V dB dB pF nF 5.6 725 μV/V μA ±12 ±11 ±12.6 ±12.2 ±12 ±11 ±12.6 ±12.2 V V 0.1 0.15 500 0.1 0.15 500 V/μs kHz AV = 1 Guaranteed by CMRR test. Guaranteed but not 100% tested. VS = ±15 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted. Table 4. Parameter INPUT CHARACTERISTICS Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Large-Signal Voltage Gain Input Voltage Range 1 Common-Mode Rejection Ratio Capacitive Load Stability POWER SUPPLY Power Supply Rejection Ratio Supply Current Per Amplifier OUTPUT CHARACTERISTICS Output Voltage Swing 1 Symbol VOS TCVOS IOS IB AVO IVR CMRR Conditions VCM = 0 V VCM = 0 V VO = ±10 V RL= 10 kΩ RL = 2 kΩ VCM = ±12 V AV = 1, no oscillations PSRR ISY VS = ±3 V to ±18 V No load VO RL = 10 kΩ RL = 2 kΩ Min 3000 1500 ±12 115 Rev. F | Page 5 of 16 Max 35 0.2 0.08 03 100 0.5 2.5 5.0 10,000 3200 ±12.5 130 10 0.15 600 ±12 ±11 Guaranteed by CMRR test. OP200E Typ ±12.4 ±12 Min OP200G Typ Max 110 0.6 0.1 0.5 2000 1000 ±12 105 3.2 775 5000 2500 ±12.5 130 10 0.3 600 ±12 ±11 300 2.0 6.0 10.0 ±12.4 ±12.2 Unit μV μV/°C nA nA V/mV V/mV V dB nF 10.0 775 μV/V μA V V OP200 Data Sheet 1/2 OP200 V1 20V p-p @ 10Hz 50Ω 50Ω 1/2 OP200 00322-004 CHANNEL SEPARATION = 20 log V2 V1 V2/1000 Figure 4. Channel Separation Test Circuit 1/2 OP200 10kΩ 1/2 OP200 eOUT TO SPECTRUM ANALYZER eOUT (nV/√Hz) = √2 × eOUT (nV/√Hz) × 101 Figure 5. Noise Test Schematic Rev. F | Page 6 of 16 00322-005 100Ω Data Sheet OP200 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. Parameter Supply Voltage Differential Input Voltage Input Voltage Output Short-Circuit Duration Storage Temperature Range Lead Temperature (Soldering, 60 sec) Junction Temperature Range (TJ) Operating Temperature Range OP200A OP200E, OP200G Table 6. Rating ±20 V ±30 V Supply voltage Continuous −65°C to +150°C 300°C −65°C to +150°C Package Type 8-Lead CERDIP (Z Suffix) 8-Lead Plastic DIP (P Suffix) 16-Lead SOIC (S Suffix) 1 θJC 16 37 27 Unit °C/W °C/W °C/W θJA is specified for worst-case mounting conditions, that is, θJA is specified for device in socket for CERDIP and PDIP packages; θJA is specified for device soldered to printed circuit board for SOIC package. ESD CAUTION −55°C to +125°C −40°C to +85°C θJA1 148 96 92 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. F | Page 7 of 16 OP200 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15V INPUT OFFSET CURRENT (pA) 2 250 1 200 150 100 0 0 1.0 2.0 3.0 4.0 0 –75 5.0 00322-009 50 00322-006 CHANGE IN OFFSET VOLTAGE (µV) 300 TA = 25°C VS = ±15V –50 –25 Figure 6. Warm-Up Drift 100 125 0.8 INPUT BIAS CURRENT (nA) 40 30 20 0.6 0.4 0.2 00322-007 10 –50 –25 0 25 50 75 100 0 –15 125 00322-010 INPUT OFFSET VOLTAGE (µV) 75 TA = 25°C VS = ±15V 50 –10 –5.0 0 5.0 Figure 7. Input Offset Voltage vs. Temperature 140 COMMON-MODE REJECTION (dB) 2 1 0 –1 00322-008 –2 0 25 50 75 100 120 100 80 60 40 20 0 125 TA = 25°C VS = ±15V 00322-011 VS = ±15V –25 15 Figure 10. Input Bias Current vs. Common-Mode Voltage 3 –50 10 COMON-MODE VOLTAGE (V) TEMPERATURE (°C) INPUT BIAS CURRENT (nA) 50 1.0 VS = ±15V –3 –75 25 Figure 9. Input Offset Current vs. Temperature 60 0 –75 0 TEMPERATURE (°C) TIME (Minutes) 1 10 100 1k 10k FREQUENCY (Hz) TEMPERATURE (°C) Figure 11. Common-Mode Rejection vs. Frequency Figure 8. Input Bias Current vs. Temperature Rev. F | Page 8 of 16 100k Data Sheet OP200 1.18 10 00322-012 TOTAL SUPPLY CURRENT (mA) VOLTAGE NOISE DENSITY (nV/√Hz) TA = 25°C VS = ±15V 1 10 100 TWO AMPLIFIERS TA = 25°C 1.16 1.14 1.12 1.10 1.08 00322-015 100 1.06 ±2 1k ±6 FREQUENCY (Hz) Figure 12. Voltage Noise Density vs. Frequency 1.16 TWO AMPLIFIERS VS = ±15V 00322-013 TOTAL SUPPLY CURRENT (mA) CURRENT NOISE DENSITY (fA/√Hz) 10 ±18 Figure 15. Total Supply Current vs. Supply Voltage TA = 25°C VS = ±15V 1 ±14 100 1.15 1.14 1.13 1.12 1.11 –75 1k 00322-016 1000 100 ±10 SUPPLY VOLTAGE (V) –50 –25 FREQUENCY (Hz) 0 25 50 75 100 125 TEMPERATURE (°C) Figure 13. Current Noise Density vs. Frequency Figure 16. Total Supply Current vs. Temperature 0 2 4 6 8 NEGATIVE SUPPLY 120 100 80 60 POSITIVE SUPPLY 40 20 00322-017 00322-014 NOISE VOLTAGE (400nV/DIV) POWER SUPPLY REJECTION (nA) 140 TA = 25°C 0 0.1 10 1 10 100 1k 10k FREQUENCY (Hz) TIME (SEC) Figure 14. 0.1 Hz to 10 Hz Noise Figure 17. Power Supply Rejection vs. Frequency Rev. F | Page 9 of 16 100k OP200 Data Sheet 140 TA = 25°C VS = ±15V 120 CLOSED-LOOP GAIN (dB) 0.6 0.5 0.4 0.3 100 AV = 1000 80 AV = 100 60 AV = 10 40 AV = 1 0.2 00322-018 0.1 –75 20 –50 –25 0 25 50 75 100 00322-021 POWER SUPPLY REJECTION (µV/V) 0.7 0 1 125 10 100 Figure 18. Power Supply Rejection vs. Temperature 100k 1M 30 TA = 25°C VS = ±15V VS = ±15V RL = 2kΩ 5000 25 V p-p AT 1% DISTORTION OUTPUT SWING (V) 4000 3000 2000 15 10 00322-019 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 0 10 125 1 PHASE 90 40 GAIN 135 180 0 –20 10 100 1k 10k 100k TOTAL HARMONIC DISTORTION (%) 0 60 00322-020 80 PHASE SHIFT (Degrees) 100 20 1k 10k 100k Figure 22. Maximum Output Swing vs. Frequency TA = 25°C VS = ±15V 120 100 FREQUENCY (Hz) Figure 19. Open-Loop Gain vs. Temperature 140 00322-022 5 1000 0 –75 20 1M AV = 100 AV = 10 0.1 AV = 1 0.01 TA = 25°C VS = ±15V VOUT = 10V p-p RL = 2kΩ 0.001 100 1k FREQUENCY (Hz) FREQUENCY (Hz) Figure 20. Open-Loop Gain and Phase Shift vs. Frequency Figure 23. Total Harmonic Distortion vs. Frequency Rev. F | Page 10 of 16 00322-023 OPEN-LOOP GAIN (V/mV) 10k Figure 21. Closed-Loop Gain vs. Frequency 6000 OPEN-LOOP GAIN (dB) 1k FREQUENCY (Hz) TEMPERATURE (°C) 10k Data Sheet OP200 50 TA = 25°C VS = ±15V 45 40 FALLING OVERSHOOT (%) 35 30 25 RISING 20 15 5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 5.00V CAPACITIVE LOAD (nF) 100µs TA = 25°C VS = ±15V AV = +1 00322-027 00322-024 10 Figure 27. Large Signal Transient Response Figure 24. Overshoot vs. Capacitive Load 29 TA = 25°C VS = ±15V 27 26 SINKING 25 TA = 25°C VS = ±15V AV = +1 24 SOURCING 00322-025 23 22 0 1 2 3 4 5 20mV TIME (Minutes) Figure 25. Short-Circuit Current vs. Time 00322-028 SHORT-CIRCUIT CURRENT (mA) 28 5µs Figure 28. Small Signal Transient Response 150 130 120 110 TA = 25°C VS = ±15V AV = +1 100 100 1k 10k 100k 20mV FREQUENCY (Hz) Figure 26. Channel Separation vs. Frequency 5µs Figure 29. Small Signal Transient Response, CLOAD = 1 nF Rev. F | Page 11 of 16 00322-029 90 10 00322-026 CHANNEL SEPARATION (dB) 140 OP200 Data Sheet APPLICATIONS INFORMATION The OP200 is inherently stable at all gains and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply decoupling is highly recommended. Proper supply decoupling reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP200. DUAL LOW POWER INSTRUMENTATION AMPLIFIER A dual instrumentation amplifier that consumes less than 33 mW of power per channel is shown in Figure 30. The linearity of the instrumentation amplifier exceeds 16 bits in gains of 5 to 200 and is better than 14 bits in gains from 200 to 1000. CMRR is above 115 dB (gain = 1000). Offset voltage drift is typically 0.2 μV/°C over the military temperature range, which is comparable to the best monolithic instrumentation amplifiers. The bandwidth of the low power instrumentation amplifier is a function of gain and is shown in Table 7. PRECISION ABSOLUTE VALUE AMPLIFIER The circuit in Figure 31 is a precision absolute value amplifier with an input impedance of 10 MΩ. The high gain and low TCVOS of the OP200 ensure accurate operation with microvolt input signals. In this circuit, the input always appears as a commonmode signal to the op amps. The CMRR of the OP200 exceeds 120 dB, yielding an error of less than 2 ppm. +15V C2 0.1pF R1 1kΩ C1 30pF 2 1/2 OP200AZ R2 2kΩ 00322-031 The maximum output current of the precision current pump shown in Figure 32 is ±10 mA. Voltage compliance is ±10 V with ±15 V supplies. Output impedance of the current transmitter exceeds 3 MΩ with linearity better than 16 bits. 8 1 R3 10kΩ VOUT 2 7 4 R1 10kΩ –15V 20kΩ 5kΩ 5kΩ – VIN + VOUT = 5 + 40,000 RG VIN + VREF 00322-030 RG 2 1/2 OP200EZ R5 100Ω 1 IOUT 3 +15V R4 1kΩ Figure 30. Dual Low Power Instrumentation Amplifier The output signal is specified with respect to the reference input, which is normally connected to analog ground. The reference input can be used to offset the output from −10 V to +10 V if required. R1 10kΩ 8 7 5 1/2 OP200EZ 6 IOUT = VIN VIN = = 10mA/V RS 100Ω 4 –15V Figure 32. Precision Current Pump Rev. F | Page 12 of 16 00322-032 VREF D1 1N4148 4 6 20kΩ VOUT 0V < VOUT < 10V PRECISION CURRENT PUMP 1/2 OP200AZ 1/2 OP200AZ 7 Figure 31. Precision Absolute Value Amplifier 3 – 1/2 OP200AZ –15V +15V 5 6 5 C2 0.1pF Bandwidth 150 kHz 67 kHz 7.5 kHz 500 Hz + VIN 1 3 VIN Table 7. Gain Bandwidth Gain 5 10 100 1000 D1 1N4148 8 R3 1kΩ Data Sheet OP200 DUAL 12-BIT VOLTAGE OUTPUT DAC DUAL PRECISION VOLTAGE REFERENCE The dual output DAC shown in Figure 33 is capable of providing untrimmed 12-bit accurate operation over the entire military temperature range. Offset voltage, bias current, and gain errors of the OP200 contribute less than 1/10 of an LSB error at 12 bits over the military temperature range. A dual OP200 and a REF43, a 2.5 V reference, can be used to build a ±2.5 V precision voltage reference. Maximum output current from each reference is ±10 mA with load regulation under 25 μV/mA. Line regulation is better than 15 μV/V and output voltage drift is under 20 μV/°C. Output voltage noise from 0.1 Hz to 10 Hz is typically 75 μV p-p. R1 and D1 ensure correct startup. 5V 21 VDD RFB A 3 DAC A 1/2 DAC8221 IOUT A 2 8 DAC8221 10V REFERENCE VOLTAGE 4 VREF A 2 1/2 OP200AZ 3 1 OUT A 4 V– DAC DATA BUS PIN 6 (MSB) TO PIN 17 (LSB) RFB B 23 DAC B 1/2 DAC8221 22 VREF B 18 19 DAC CONTROL 20 IOUT B 24 6 1/2 OP200AZ 7 OUT B 5 DAC A/DAC B AGND 1 CS WR 00322-033 DGND 5 Figure 33. Dual 12-Bit Voltage Output DAC +5V R1 22kΩ D1 1N914 +2.5V +5V 2 VOUT REF43 TRIM GND 4 6 5 2 3 8 1/2 OP200AZ 1 R3 10kΩ 4 –5V 6 5 1/2 OP200AZ 7 R4 5kΩ –2.5V Figure 34. Dual Precision Voltage Reference Rev. F | Page 13 of 16 00322-034 VIN R3 10kΩ OP200 Data Sheet range. A dual CMOS 12-bit DAC, the DAC8221, is used in the voltage switching mode to set the upper and lower thresholds (DAC A and DAC B, respectively). PROGRAMMABLE HIGH RESOLUTION WINDOW COMPARATOR The programmable window comparator shown in Figure 35 is easily capable of 12-bit accuracy over the full military temperature 15V VIN 21 VDD 10V REFERENCE VOLTAGE 2 IOUT A 8 DAC A 1/2 DAC8221 VREF A 3 4 R1 10kΩ 2 1/2 OP200AZ 1 D1 1N4148 DAC DATA BUS PIN 6 (MSB) TO PIN 17 (LSB) 15V– R2 10kΩ 18 DAC CONTROL SIGNALS 19 20 IOUT B DAC B 1/2 DAC8221 VREF B 22 D1 1N4148 5 6 1/2 OP200AZ 7 TTL OUT R4 10kΩ Q1 2N2222 DAC A/DAC B CS WR DGND 5 AGND 00322-035 24 4 5V R2 10kΩ 1 Figure 35. Programmable High Resolution Window Comparator Rev. F | Page 14 of 16 Data Sheet OP200 OUTLINE DIMENSIONS 0.005 (0.13) MIN 8 0.055 (1.40) MAX 5 0.310 (7.87) 0.220 (5.59) 1 4 0.100 (2.54) BSC 0.320 (8.13) 0.290 (7.37) 0.405 (10.29) MAX 0.060 (1.52) 0.015 (0.38) 0.200 (5.08) MAX 0.150 (3.81) MIN 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) SEATING PLANE 15° 0° 0.015 (0.38) 0.008 (0.20) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 36. 8-Lead Ceramic Dual In-Line Package [CERDIP] (Q-8) Z-Suffix Dimensions shown in inches and (millimeters) 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 1 5 4 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) BSC 0.060 (1.52) MAX 0.210 (5.33) MAX 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE 0.005 (0.13) MIN 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.430 (10.92) MAX COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 37. 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) P-Suffix Dimensions shown in inches and (millimeters) Rev. F | Page 15 of 16 070606-A 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) OP200 Data Sheet 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 10.65 (0.4193) 10.00 (0.3937) 8 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.75 (0.0295) 45° 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 0.51 (0.0201) 0.31 (0.0122) 8° 0° 0.33 (0.0130) 0.20 (0.0079) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 03-27-2007-B 1 Figure 38. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) S-Suffix Dimensions shown in millimeters and (inches) ORDERING GUIDE Model 1 OP200AZ OP200EZ OP200GPZ OP200GSZ OP200GSZ-REEL 1 TA = 25°C VOS Max (µV) 75 75 200 200 200 Temperature Range −55°C to +125°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C The OP200GPZ, OP200GSZ, and OP200GSZ-REEL are RoHS Compliant Parts. ©1978–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00322-0-10/15(F) Rev. F | Page 16 of 16 Package Description 8-Lead CERDIP 8-Lead CERDIP 8-Lead PDIP 16-Lead SOIC_W 16-Lead SOIC_W Package Option Z-Suffix (Q-8) Z-Suffix (Q-8) P-Suffix (N-8) S-Suffix (RW-16) S-Suffix (RW-16)