Semiconductor Qualification Test Report: PHEMT-D (QTR: 2013-00254)

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Report Title:
Qualification Test Report
Report Type:
See Attached
Date:
See Attached
Rev: 04
QTR: 2013- 00254
Wafer Process: PHEMT-D
HMC544
HMC545
HMC550
HMC574
HMC593
HMC595
HMC603
HMC604
HMC605
HMC616
HMC617
HMC618
HMC624
HMC625
HMC627
HMC629
HMC641
HMC642
HMC647
HMC648
HMC649
HMC667
HMC668
HMC669
HMC707
HMC708
HMC711
HMC715
HMC716
HMC717
HMC718
HMC719
HMC742
HMC758
HMC770
HMC784
HMC788
HMC792
HMC800
HMC801
HMC802
HMC816
HMC817
HMC818
HMC849
HMC922
HMC936
HMC939
HMC941
HMC951
HMC990
HMC1190
QTR: 2013- 00254
Wafer Process: PHEMT-D
Rev: 04
Introduction
The testing performed for this report is designed to accelerate the predominant failure mode, electro-migration
(EM), for the devices under test. The devices are stressed at high temperature and DC biased to simulate a lifetime
of use at typical operating temperatures. Using the Arrhenius equation, the acceleration factor (AF) is calculated for
the stress testing based on the stress temperature and the typical use operating temperature.
This report is intended to summarize all of the High Temperature Operating Life Test (HTOL) data for the
PHEMT-D process. The FIT/MTTF data contained in this report includes all the stress testing performed on this
process to date and will be updated periodically as additional data becomes available. Data sheets for the tested
devices can be found at www.hittite.com.
Glossary of Terms & Definitions:
1. Autoclave: Unbiased Accelerated Stress Test. Devices are subjected to 96 hours of 100% relative humidity at a
temperature of 121°C and pressure (14.7 PSIG). This test is performed in accordance with JESD22-A102.
2. HTOL: High Temperature Operating Life. This test is used to determine the effects of bias conditions and
temperature on semiconductor devices over time. It simulates the devices’ operating condition in an accelerated
way, through high temperature and/or bias voltage, and is primarily for device qualification and reliability
monitoring. This test was performed in accordance with JEDEC JESD22-A108.
3. MSL: Moisture sensitivity level pre-conditioning is performed per JESD22-A113.
4. Operating Junction Temp (Toj): Temperature of the die active circuitry during typical operation.
5. Stress Junction Temp (Tsj): Temperature of the die active circuitry during stress testing.
6. THB: Temperature Humidity Bias. Devices are subjected to 1000 hours of 85% relative humidity at a
temperature of 85°C, while DC biased. This test is performed in accordance with JESD22-A101.
Rev: 04
QTR: 2013- 00254
Wafer Process: PHEMT-D
Qualification Sample Selection:
All qualification devices used were manufactured and tested on standard production processes and met pre-stress
acceptance test requirements.
Summary of Qualification Tests:
HMC603 (QTR07002)
TEST
QTY IN
QTY OUT
PASS / FAIL
Initial Electrical
231
231
Complete
IR Reflow, MSL1 260°C
231
231
Complete
HTOL, 1000 hours
77
77
Complete
Post HTOL Electrical Test
77
77
Pass
Autoclave
77
77
Complete
Post Autoclave Electrical Test
77
77
Pass
THB, 1000 hours
77
77
Complete
Post THB Electrical Test
77
77
Pass
NOTES
Rev: 04
QTR: 2013- 00254
Wafer Process: PHEMT-D
HMC605 (QTR08007)
TEST
QTY IN
QTY OUT
PASS/FAIL
Initial Electrical
80
80
Complete
HTOL, 1424 hours
80
80
Complete
Post HTOL Electrical Test
80
80
Pass
Wirebond Pull
10
10
Pass
5
5
Pass
5
5
Pass
Cross-section Die Metal and
Dielectric Thickness
SEM Inspection
NOTES
30 wires were
pulled from 10
devices
Rev: 04
QTR: 2013- 00254
Wafer Process: PHEMT-D
HMC1190 (QTR2012-00515)
TEST
QTY IN QTY OUT
PASS / FAIL
Initial Electrical Test
333
333
Complete
HTOL
80
80
Complete
Post HTOL Electrical test
80
80
Pass
HTSL
80
80
Complete
Post HTSL Electrical Test
80
80
Pass
THB
27
27
Complete
Post THB Electrical Test
27
27
Pass
MSL-1 Preconditioning
80
80
Complete
Post MSL1 Electrical Test
80
80
Pass
Temp. Cycle (Preconditioned)
80
80
Complete
Post Temp Cycle Electrical Test
80
80
Pass
ESD Exposure
39
39
Complete
Post ESD Electrical Test
39
39
Pass
Physical Dimensions
15
15
Pass
X-Ray
6
6
Pass
Solderability
6
6
Pass
NOTES
HBM = Class 1B (500V)
CDM = Class IV (2kV)
Rev: 04
QTR: 2013- 00254
Wafer Process: PHEMT-D
HMC849 (QTR2013-00360)
TEST
QTY IN
QTY OUT
PASS/FAIL
Initial Electrical
159
159
Complete
HTOL, 1000 hours
159
159
Complete
Post HTOL Electrical Test
159
159
Pass
QTY IN
QTY OUT
PASS/FAIL
Initial Electrical
81
81
Complete
HTOL, 1080 hours
81
81
Complete
Post HTOL Electrical Test
81
81
Pass
NOTES
HMC604 (QTR2013-00426)
TEST
NOTES
QTR: 2013- 00254
Wafer Process: PHEMT-D
Rev: 04
PHEMT-D Failure Rate Estimate
Based on the HTOL test results, a failure rate estimation was determined using the following
parameters:
With device ambient case temp, Tc = 85°C
HMC603 (QTR07002)
Operating Junction Temp (Toj) =85°C(358 °K)
Stress Junction Temp (Tsj) = 125 °C(398 °K)
HMC605 (QTR08007)
Operating Junction Temp (Toj) =104°C(377 °K)
Stress Junction Temp (Tsj) = 150 °C(423 °K)
HMC1190 (QTR2012-00515)
Operating Junction Temp (Toj) =93°C(366°K)
Stress Junction Temp (Tsj) = 125°C(398°K)
HMC849 (QTR2013-00360)
Operating Junction Temp (Toj) =100°C(373°K)
Stress Junction Temp (Tsj) = 109°C(382°K)
HMC604 (QTR2013-00426)
Operating Junction Temp (Toj) =101°C(374°K)
Stress Junction Temp (Tsj) = 175°C(448°K)
Device hours:
HMC603 (QTR07002) = (77 X 1000hrs) = 77,000 hours
HMC605 (QTR08007) = (80 X 1424hrs) = 113,920 hours
HMC1190 (QTR2012-00515) = (80 X 1000hrs) = 80,000 hours
HMC849 (QTR2013-00360) = (159 X 1000hrs) = 159,000 hours
HMC604 (QTR2013-00426) = (81 X 1080hrs) = 87,480 hours
Rev: 04
QTR: 2013- 00254
Wafer Process: PHEMT-D
For PHEMT-D MMIC, Activation Energy = 1.6 eV
Acceleration Factor (AF):
HMC603 (QTR07002) Acceleration Factor = exp[1.6/8.6x10-5(1/358-1/398)] = 185.5
HMC605 (QTR08007) Acceleration Factor = exp[1.6/8.6x10-5(1/377-1/423)] = 214.1
HMC1190 (QTR2012-00515) Acceleration Factor = exp[1.6/8.6x10-5(1/366-1/398)] = 59.6
HMC849 (QTR2013-00360) Acceleration Factor = exp[1.6/8.6x10-5(1/373-1/382)] = 3.2
HMC604 (QTR2013-00426) Acceleration Factor = exp[1.6/8.6x10-5(1/374-1/448)] = 3703
Equivalent hours = Device hours x Acceleration Factor
Equivalent hours = (77,000x185.5)+(113,920x214.1)+(80,000x59.6)+(159,000x3.2)
+(87,480x3703) = 3.68x108 hours
Since there were no failures and we used a time terminated test, F=0, and R = 2F+2 = 2
The failure rate was calculated using Chi Square Statistic:
at 60% and 90% Confidence Level (CL), with 0 units out of spec
and a 85°C package backside temp;
Failure Rate
λ60 = [(χ2)60,2]/(2X 3.68x108 )] = 1.8/ 7.36x108 = 2.49x10-9 failures/hour or 2.5
FIT or MTTF = 4.02x108 Hours
λ90 = [(χ2)90,2]/(2X 3.68x108 )] = 4.6/ 7.36x108 = 6.27x10-9 failures/hour or 6.3
FIT or MTTF = 1.60x108 Hours