RT8465

®
RT8465
Constant Voltage High Power Factor PWM Boost Driver
Controller for MR16 Application
General Description
Features
The RT8465 is a constant output voltage, active high power
factor, PWM Boost driver controller. It can be used as the
first Boost stage followed by a constant current Buck
converter with input from AC/electronic transformer in
MR16/AR111 application. To achieve high power factor,
the AC input voltage from AC/electronic transformer is
sensed via the SIN pin. An internal power factor correction
circuit follows the sensed sine waveform and modulates
the external MOSFET duty cycle-by-cycle to achieve
constant output voltage.
z
The output voltage is adjustable via an output resistive
divider. By operating at 220kHz, the filter component size
can be small to fit in tight MR16 space. To drive industrial
grade MOSFET switches, the RT8465 gate driver can
deliver up to 0.8A output current with 9V gate output voltage.
z
z
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Wide Input Voltage Range : 8V to 32V
High Power Factor Correction with Simple System
Circuits
Adjustable Constant Output Voltage
Built-in High Power Factor Correction Circuit
Typical 250μ
μA Start-Up Supply Current
Low Quiescent Current : 0.1μ
μA
SOP-8 Package
RoHS Compliant and Halogen Free
Applications
z
z
MR16, AR111 Lamps
PFC Controller
Simplified Application Circuit
L
AC IN
+
~
-
D1
D2
VCC
RT8465
R1
R2
SIN
GATE
M1
C2
C1
ICOMP
C3
FB
VCOMP
R4
C4
R5
C5
R3
SENSE
GND
RS
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8465-01 March 2013
is a registered trademark of Richtek Technology Corporation.
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1
RT8465
Ordering Information
Pin Configurations
RT8465
(TOP VIEW)
Package Type
S : SOP-8
GND
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Note :
8
2
7
SIN
VCC
3
6
ICOMP
SENSE
4
5
FB
SOP-8
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
VCOMP
GATE
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT8465ZS : Product Number
RT8465
ZSYMDNN
YMDNN : Date Code
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
GND
Ground.
2
GATE
Gate Driver for External MOSFET Switch.
3
VCC
Power Supply. For good bypass, place a ceramic capacitor near the VCC pin.
SENSE
Inductor Current Sense Input. The inductor current is sensed by a resistor between
GND and SENSE pins. The sense pin signal is used as the saw tooth signal to the
PWM comparator. The comparator output will modulate the GATE turn-on duty to
achieve the output voltage regulation.
5
FB
Output Voltage Sense Input. The Output voltage is sensed through an external
resistive divider. The sensed voltage (which is tied to amplifier negative input) is
compared to an internal reference threshold at 1.2V (which is tied to amplifier
positive input).
6
ICOMP
Output of the Multiplier. To achieve high power factor, the voltage loop amplifier
output signal is modulated with the sensed input voltage through the SIN pin by an
internal multiplier. A compensation network between ICOMP and GND is needed.
7
SIN
Input Power Voltage Sensing for PFC Function. An external resistor for input
voltage sensing is connected to the power input.
8
VCOMP
Output of the Internal Voltage Loop GM Amplifier. A compensation network
between VCOMP and GND is needed.
4
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is a registered trademark of Richtek Technology Corporation.
DS8465-01 March 2013
RT8465
Function Block Diagram
+
+
VCC
10V/8V
Chip
Enable
8V
OVP
+
35V
S
R
-
PWM
Control
Circuit
GND
ICOMP
VCOMP
1.2V
FB
OSC
+
-
PFC
Control
Circuit
GATE
Q
200k
R
SENSE
SIN
Operation
The RT8465 is a floating-GND Boost PWM current mode
controller with an integrated low side floating gate driver.
The start up voltage of RT8465 is around 10V. Once VCC
is above 10V, the RT8465 will maintain operation until
VCC drops below 8V.
The RT8465's main control loop consists of a 220kHz
fixed frequency oscillator, an internal 1.2V feedback (FB)
voltage sense threshold, and the PFC control circuit with
a PWM comparator. In normal operation, the GATE turns
high when the gate driver is set by the oscillator (OSC).
When the feedback (FB) voltage is below the reference
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8465-01 March 2013
1.2V threshold, the VCOMP pin voltage will go high. The
ICOMP signal is the result of VCOMP signal multiplied
with SIN signal. Higher ICOMP voltage means longer GATE
turn-on period. The GATE does not always turn off in each
cycle. The GATE will be turned on again by OSC for the
next switching cycle.
The RT8465 provides several protections, including input
voltage Under Voltage Lockout (UVLO), Over Current
Protection (OCP) and VCC Over Voltage Protection (OVP).
Additionally, to ensure the system reliability, the RT8465
is built with internal thermal protection function.
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3
RT8465
Absolute Maximum Ratings
z
z
z
z
z
z
z
z
z
z
z
(Note 1)
VCC, SIN to GND ---------------------------------------------------------------------------------------------------------GATE to GND (Note 6) ------------------------------------------------------------------------------------------------VCOMP, ICMOP to GND -----------------------------------------------------------------------------------------------FB to GND -----------------------------------------------------------------------------------------------------------------SENSE to GND -----------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
−0.3V to 40V
−0.3V to 16V
−0.3V to 4V
−0.3V to 2V
−1V to 0.3V
SOP-8 -----------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8, θJA -----------------------------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------------MM (Machine Model) -----------------------------------------------------------------------------------------------------
0.53W
Recommended Operating Conditions
z
z
z
188°C/W
150°C
260°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage, VCC ---------------------------------------------------------------------------------------------- 8V to 32V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VCC = 24VDC, CLOAD = 1nF, RLOAD = 2.2Ω in series, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Start-Up Voltage
VST
--
10
11
V
Under Voltage Lockout Threshold
VUVLO
7
8
--
V
Under Voltage Lockout Threshold
Hysteresis
ΔVUVLO
--
2
--
V
Input Supply Current
ICC
After Start-Up, VCC = 24V
--
2
5
mA
Input Quiescent Current
IQC
Before Start-Up, VCC = 7V
--
0.1
--
μA
Switching Frequency
f SW
VSIN = 14V
190
220
250
kHz
Maximum Duty in Transient
Operation
D MAX(TR)
VC = 3V
--
--
100
%
Maximum Duty in Steady State
Operation
D MAX
--
97
--
%
Blanking Time
tBLANK
200
--
--
ns
(Note 5)
--
650
--
ns
Oscillator
Minimum Turn-Off Time
Current Sense Amplifier
Current Sense Voltage
VSENSE
VCOMP = 1V, SIN = 15V
--
−100
--
mV
Sense Input Current
ISENSE
Sense = 100mV
--
10
--
μA
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(Note 5)
is a registered trademark of Richtek Technology Corporation.
DS8465-01 March 2013
RT8465
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
No Load at GATE Pin
--
9.5
16
V
IGATE = −20mA
--
9.1
--
IGATE = −100μA
--
9.4
--
IGATE = 20mA
--
0.75
--
IGATE = 100μA
--
0.5
--
GATE Drive Rise and Fall Time
1nF Load at GATE
--
70
100
ns
GATE Drive Source and Sink
Peak Current
1nF Load at GATE
--
0.5
0.8
A
VSIN = 14V
50
60
70
VSIN = 28V
80
100
120
--
1.2
--
V
--
16
--
μA
1.1
1.2
1.3
V
--
1
--
μA
32
35
38
V
--
150
--
°C
--
200
--
kΩ
Gate Driver Output
GATE Pin Maximum Voltage
VGATE
High
VGATE_H
Low
VGATE_L
GATE Voltage
(Note 4)
V
V
Multiplier
SIN Pin Input Current
ICOMP Threshold for PWM
Switch Off
VICOMP
VC Output Current
IVCOMP
Feedback Voltage
VFB
Feedback Input Current
IFB
VFB = 1.2V
VOVP
VCC Pin
0.5V ≤ VC ≤ 2.4V
(Note 5)
(Note 5)
μA
OVP and Soft-Start
Over Voltage Protection
Thermal Protection
Thermal Shutdown
Temperature
TSD
SIN Pin Input Resistance
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guaranteed by design; not subject to production test.
Note 6. The GATE voltage is internally clamped and varies with operating conditions.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8465-01 March 2013
is a registered trademark of Richtek Technology Corporation.
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5
RT8465
Typical Application Circuit
Electronic
transformer
12V AC input
L
+
~
-
D1
D2
3
VCC
RT8465
R1
R2
7 SIN
GATE
2
M1
C2
C1
C3
6 ICOMP
8 VCOMP
R4
C4
FB
5
R5
C5
Load :
Const Current
/Const Voltage
R3
SENSE
4
GND
GND
1
RS
CC converters : RT8450/RT8471/RT8463
CC drivers : RT8482/RT8458D
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is a registered trademark of Richtek Technology Corporation.
DS8465-01 March 2013
RT8465
Typical Operating Characteristics
VCC Supply Current vs. Input Voltage
VCC Supply Current vs. Temperature
2.0
2.5
Supply Current (mA)
Supply Current (mA)
1.9
1.8
1.7
1.6
1.5
2.0
1.5
1.0
0.5
VCC = 24V
1.4
0.0
8
13
18
23
28
33
-50
-25
0
Input Voltage (V)
VCC_OVP vs. Temperature
50
75
100
125
100
125
UVLO vs. Temperature
15
38
37
13
UVLO (V)
36
VOVP (V)
25
Temperature (°C)
35
11
UVLO-H
9
34
7
33
UVLO-L
5
32
-50
-25
0
25
50
75
100
-50
125
-25
0
Temperature (°C)
25
50
75
Temperature (°C)
FB Voltage vs. Temperature
GATE Voltage High vs. Temperature
1.3
12
11
GATE Voltage (V)
FB Voltage (V)
1.3
1.2
1.2
10
IGATE = −100μA
9
IGATE = −20mA
8
7
VCC = 24V
1.1
VCC = 24V
6
-50
-25
0
25
50
75
100
Temperature (°C)
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DS8465-01 March 2013
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8465
GATE Voltage Low vs. Temperature
Switching Frequency vs. Input Voltage
230
GATE Voltage (V)
0.8
Switching Frequency (kHz)1
1.0
IGATE = 20mA
0.6
0.4
IGATE = 100μA
0.2
VSIN = 2V
220
210
VSIN = 14V
200
190
VCC = 24V
0.0
180
-50
-25
0
25
50
75
100
125
8
13
18
Temperature (°C)
28
33
SIN Voltage vs. VSENSE Threshold
Minimum On-Time vs. Temperature
700
350
VCOMP
VCOMP
VCOMP
VCOMP
VCOMP
VCOMP
VCOMP
600
330
VSENSE Threshold (mV)
Minimum On-Time (ns)
23
Input Voltage (V)
310
290
270
500
400
=
=
=
=
=
=
=
VCC = 24V
2.5V
2.2V
1.9V
1.6V
1.3V
1V
0.7V
300
200
100
VCC = 24V
0
250
-50
-25
0
25
50
75
100
0
125
5
10
20
25
30
VSENSE Threshold vs. Temperature
SIN Input Current vs. Input Voltage
70
0.10
VSIN = 14V
0.05
VSENSE Threshold (V)
60
SIN Current (μA)
15
SIN Voltage (V)
Temperature (°C)
50
40
30
20
-0.05
VSIN = 20V
-0.10
VSIN = 10V
-0.15
VSIN = 2V
10
VSIN = 5V
0.00
VCC = 24V, VCOMP = 3V
0
-0.20
8
13
18
23
28
Input Voltage (V)
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8
33
-50
-25
0
25
50
75
100
125
Temperature (°C)
is a registered trademark of Richtek Technology Corporation.
DS8465-01 March 2013
RT8465
Application Information
The RT8465 provides active power factor correction for
power systems with fewer external components.
The RT8465 can operate in both Continuous Conduction
Mode (CCM) and Discontinuous Conduction Mode (DCM)
by fixed frequency PWM control. The fixed switching
frequency is internally set at 220kHz.
where VICOMP is the reference for the current sense, k is
the multiplier gain, VCOMP is the error amplifier output
voltage and VSIN is the sinusoidal reference voltage on pin
7.
IAC
+
The IC operates with a dual control topology; the inner
current loop and the outer voltage loop. The inner current
loop of the IC controls the sinusoidal profile for the average
input current. It uses the dependency of the PWM duty
cycle on the line input voltage to determine the
corresponding input current. This means the average input
current follows the input voltage as long as the device
operates in CCM. Under light load condition, depending
on the choke inductance, the system may enter DCM. In
DCM, the average current waveform will be distorted but
the resultant harmonics are still low enough to meet the
standard of IEC61000-3-2.
VAC
-
IIN
+
VIN
~
-
RSENSE
Multiplier
The multiplier has two inputs. The SIN pin is the divided
sinusoidal voltage which makes the current sense
comparator threshold voltage vary from zero to peak value.
The other input is the output of error amplifier at VCOMP
pin. In this way, the input average current wave will be
sinusoidal as well as reflects the load status. In order to
achieve high power factor and good THD achieved, the
multiplier transfer character is designed to be linear over
a wide dynamic range, namely, 1V to 20V for SIN and
0.8V to 1.2V for FB. The relationship between the
multiplier output and inputs is described as the below
equation :
VICOMP = k × ( VCOMP − 0.7 ) × VSIN
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DS8465-01 March 2013
+
C1
M1
VOUT ROUT
-
GATE
220kHz
S
SENSE
+
PWM
Modulator
1
KS
Sinusoidal
Reference
Multiplier
ICOMP
SIN
The RT8465 employs average current control to achieve a
better input current waveform.
In Figure 1, the inductor current is sensed and filtered by
a current error amplifier of which output drives a PWM
modulator. In this way, the inner current loop tends to
minimize the error between the average input current IIN
and its reference. The converter works in CCM, so the
same considerations done with regard to the peak current
control can be applied.
IOUT
D1
L
R Q
R2
VCOMP
R5
FB
+
VREF
C5 Voltage
Error Amplifier
IIN, AVG
Figure 1. Functional Block with PFC CCM Control
Pulse Width Modulator
The IC employs an average current control scheme in CCM
to achieve the power factor correction. If the voltage loop
is working and output voltage is kept constant, the duty
cycle, DOFF, for a CCM PFC system is given as
VIN
DOFF =
VOUT
From the above equation, DOFF is proportional to VIN. The
objective of the current loop is to regulate the average
inductor current such that it is proportional to the duty
cycle, DOFF, and the input voltage, VIN. Figure 2 shows
the waveform for the control scheme.
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9
R3
RT8465
Ramp Profile
IIN
Current Sense/Current Sense Comparator
IIN, AVG
GATE
Drive
t
Figure 2. Average Current Controls in CCM
The PWM is performed by the intersection of a ramp signal
with the current error amplifier output. The PWM cycle
starts with the GATE turn on for a minimum duration about
300ns typical. In case of the inductor current reaches the
peak current limitation, the GATE will be turned off
immediately when VSENSE is triggered.
Error Amplifier
The outer voltage loop of the cascaded control scheme
regulates the PFC output bus voltage VOUT. The internal
reference on the non-inverting input of the error amplifier
is 1.2V. The error amplifier's inverting feedback FB is
connected to an external resistor divider which senses
the output voltage.
The output of the error amplifier is one of the two inputs of
the multiplier. A compensation loop is connected outside
between the error amplifier output at the VCOMP pin, and
ground of the GND pin. Normally, the compensation loop
bandwidth is very low to realize high power factor for PFC
converter. The compensation is also responsible for the
soft start function which controls an increasing AC input
current during start-up.
The PFC switch's turn-on current is sensed through an
external resistor in series with the switch. When the
sensed voltage exceeds the threshold voltage (the
multiplier output), the current sense comparator will
become low and the external MOSFET will be turned off.
This ensures a cycle-by-cycle current mode control
operation. The maximum current sense reference is 1.8V.
The max value usually occurs in start-up process or
abnormal conditions such as short load.
Under Voltage Lockout (UVLO)
The RT8465 internal UVLO block monitors the VCC power
supply with 2V hysteresis. The hysteresis behavior
guarantees a one-short startup resistor and hold-up
capacitor. The IC will then be consuming typically 150μA
when start-up and the power dissipation on resistor would
be less than 0.1W. After start-up, the operating current is
typically 1.5mA to get a better efficiency.
Over Voltage Protection (OVP)
Whenever VOUT exceeds the rated value by 5%, the over
voltage protection is activated. This is implemented by
sensing the voltage at FB pin with respect to a reference
voltage of 1.2V. This results in a lower input power to
reduce the output voltage VOUT.
VCC
10V
8V
t
IC's
State
OFF Start Normal Open Loop/
Up Operation Standby
Normal
Operation
OFF
Figure 4. State of Power VCC Operation
FB
⎛ R3 × V
⎞
OUT ⎟
⎜
⎝ R2 + R3
⎠
VCOMP
R5
+
1.2V
C5
Figure 3. Voltage Loop Amplifier
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DS8465-01 March 2013
RT8465
Thermal Considerations
Maximum Power Dissipation (W)1
0.6
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
Four-Layer PCB
0.5
0.4
0.3
0.2
0.1
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 5. Derating Curve of Maximum Power Dissipation
For recommended operating condition specifications, the
maximum junction temperature is 125°C The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 package, the thermal resistance, θJA, is 188°C/W
on a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (188°C/W) = 0.53W for
SOP-8 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 5 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
D1
VOUT
COUT
VIN
CIN
SIN
R2
C2
D2
VCC
C1
GATE
PGND
GND
GND
PGND
8
VCOMP
GATE
2
7
SIN
VCC
3
6
ICOMP
SENSE
4
5
FB
RVC CVC GND
R3 C2
R4
VOUT
Figure 6. PCB Layout Guide
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DS8465-01 March 2013
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11
RT8465
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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DS8465-01 March 2013