RT8461 - Richtek

®
RT8461
Off-Line Constant Voltage High Power Factor PWM
Floating Buck Driver Controller
General Description
Features
The RT8461 is an off-line, constant output voltage, active
power factor, PWM floating buck driver controller. With an
unique floating drive topology, the RT8461 simplifies offline high voltage system application design with minimum
number and lower price of components.





To achieve high power factor, the AC power line voltage is
sensed via the SIN pin. An internal power factor correction
circuit follows the sensed sine waveform and modulates
the external MOSFET duty cycle-by-cycle to achieve
constant output voltage.



Wide Input Voltage Range : 16V to 33V
High Power Factor Correction with Simple System
Circuits
Adjustable Constant Output Voltage
Built-in High Power Factor Correction Circuit
Typical 250μ
μA Start-Up Supply Current
Low Quiescent Current : 0.1μ
μA
SOP-8 Package
RoHS Compliant and Halogen Free
Applications
The output voltage is adjustable via an output resistor
divider. By operating at 47kHz, the switching loss is kept
minimal and the high frequency EMI is reduced. To drive
industrial grade MOSFET switches, the RT8461 gate driver
can deliver up to 0.8A output current with 12V gate output
voltage. The RT8461 provides output short protection.

E27,PAR30, Off-line LED Lamp
Marking Information
RT8461GS : Product Number
RT8461
GSYMDNN
YMDNN : Date Code
Simplified Application Circuit
+
AC IN
D1
~
Rstart
-
VCC
RT8461
R1
R2
SIN
FB
C2
GATE
M1
ICOMP
VCOMP
R3
C3
R4
C4
R5
C5
SENSE
GND
RS
L
VOUT
D2
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DS8461-02 February 2014
C1
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RT8461
Ordering Information
Pin Configurations
RT8461
(TOP VIEW)
Package Type
S : SOP-8
Lead Plating System
G : Green (Halogen Free and Pb Free)
8
GND
VCOMP
GATE
2
7
SIN
VCC
3
6
ICOMP
SENSE
4
5
FB
Note :
SOP-8
Richtek products are :

RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.

Suitable for use in SnPb or Pb-free soldering processes.
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
GND
Ground.
2
GATE
Gate Driver for External MOSFET Switch.
3
VCC
Power Supply. For good bypass, place a ceramic capacitor near the VCC pin.
SENSE
Inductor Current Sense. The inductor current is sensed by a resistor between GND
and SENSE pins. The sense pin signal is used as the saw tooth signal to the PWM
comparator. The comparator output will modulate the GATE turn-on duty to
achieve the output voltage regulation.
5
FB
Output Voltage Sense. The Output voltage is sensed through an external resistor
divider. The sensed voltage (which is tied to amplifier negative input) is compared
to an internal reference threshold at 1.2V (which is tied to amplifier positive input).
The output of this GM amplifier is the VCOMP pin.
6
ICOMP
Output of this Multiplier. To achieve high power factor, the voltage loop amplifier
output signal is modulated with the sensed input voltage through the SIN pin by an
internal multiplier. A compensation capacitor between ICOMP and GND is needed.
7
SIN
Input Power Voltage Sensing for PFC Function. An external resistor for input
voltage sensing is connected to the power input.
8
VCOMP
Output of the Internal Voltage Loop GM Amplifier. A compensation network
between VCOMP and GND is needed.
4
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2
is a registered trademark of Richtek Technology Corporation.
DS8461-02 February 2014
RT8461
Function Block Diagram
+
+
VCC
35V
16V/8V
12V
OVP
+
-
OSC
S
R
PWM
Control
Circuit
GND
ICOMP
VCOMP
1.2V
FB
Chip
Enable
+
-
PFC
Control
Circuit
GATE
Q
200k
R
SENSE
SIN
Operation
The RT8461 is a floating-GND Buck PWM current mode
controller with an integrated low side floating gate driver.
The start up voltage of RT8461 is around 10V. Once VCC
is above 16V, the RT8461 will maintain operation until
VCC drops below 8V.
The RT8461's main control loop consists of a 47kHz fixed
frequency oscillator, an internal 1.2V feedback (FB) voltage
sense threshold, and the PFC control circuit with a PWM
comparator. In normal operation, the GATE turns high
when the gate driver is set by the oscillator (OSC). When
the feedback (FB) voltage is below the reference 1.2V
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8461-02 February 2014
threshold, the VCOMP pin voltage will go high. The ICOMP
signal is the result of VCOMP signal multiplied with SIN
signal. Higher ICOMP voltage means longer GATE turnon period. The GATE does not always turn-off in each
cycle. The GATE will be turned on again by OSC for the
next switching cycle.
The RT8461 provides several fault protections, including
input voltage Under Voltage Lockout (UVLO), Over Current
Protection (OCP) and VCC Over Voltage Protection (OVP).
Additionally, to ensure the system reliability, the RT8461
is built with internal thermal protection function.
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RT8461
Absolute Maximum Ratings












(Note 1)
Supply Voltage, VCC ----------------------------------------------------------------------------------------------------SIN ---------------------------------------------------------------------------------------------------------------------------GATE (Note 6) ----------------------------------------------------------------------------------------------------------VCOMP, ICMOP ----------------------------------------------------------------------------------------------------------FB ----------------------------------------------------------------------------------------------------------------------------SENSE ---------------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
−0.3V to 40V
−0.3V to 40V
−0.3V to 16V
−0.3V to 3.5V
−0.3V to 2V
−1V to 0.3V
SOP-8 -----------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8, θJA -----------------------------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------------MM (Machine Model) -----------------------------------------------------------------------------------------------------
0.53W
Recommended Operating Conditions



188°C/W
150°C
260°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Voltage VCC ------------------------------------------------------------------------------------------------------ 16V to 33V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VCC = 24VDC, CLOAD = 1nF, RLOAD = 2.2Ω in series, TA = 25°C, unless otherwise specified)
Parameter
Min
Typ
Max
Unit
16
17
18
V
Under Voltage Lockout Threshold VUVLO
7
8
11
V
Under Voltage Lockout Threshold
VUVLO
Hysteresis
--
2
4
V
Input Start-Up Voltage
Symbol
Test Conditions
VST
Input Supply Current
ICC
After Start-Up, VCC = 24V
--
2
5
mA
Input Quiescent Current
IQC
Before Start-Up, VCC = 7V
--
0.1
--
A
Switching Frequency
fSW
VSIN = 14V
38
47
52
kHz
Maximum Duty in Transient
Operation
DMAX(TR)
VC = 3V
--
--
100
%
Maximum Duty in Steady State
Operation
DMAX
(Note 5)
--
97
--
%
Blanking Time
tBLANK
--
300
--
ns
(Note 5)
--
650
--
ns
Oscillator
Minimum Turn-Off Time
Current Sense Amplifier
Current Sense Voltage
VSENSE
VCOMP = 1V, SIN = 15V
--
100
--
mV
Sense Input Current
ISENSE
Sense = 100mV
--
10
--
A
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(Note 5)
is a registered trademark of Richtek Technology Corporation.
DS8461-02 February 2014
RT8461
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
11.8
12.5
16
V
IGATE = 20mA
--
12.1
--
IGATE = 100A
--
12.4
--
IGATE = 20mA
--
0.75
--
IGATE = 100A
--
0.5
--
GATE Drive Rise and Fall Time
GATE Drive Source and Sink
Peak Current
PFC Control
1nF Load at GATE
--
10
50
ns
--
0.5
0.8
A
SIN Pin Input Current
ICOMP Threshold for PWM
Switch Off
VC Output Current
VSIN = 14V
50
60
70
A
VICOMP
--
1.2
--
V
--
16
--
A
Feedback Voltage
VFB
1.1
1.2
1.3
V
Feedback Input Current
IFB
VFB = 1.2V
--
1
--
A
VOVP
VCC Pin
32
35
38
V
150
--
--
C
--
250
--
k
Gate Driver Output
GATE Pin Maximum Voltage
VGATE
High
VGATE_H
Low
VGATE_L
GATE Voltage
No Load at GATE Pin
1nF Load at GATE
IVCOMP
0.5V  VC  2.4V
(Note 4)
(Note 5)
(Note 5)
V
V
OVP
Over Voltage Protection
Thermal Protection
Thermal Shutdown Temperature
TSD
SIN Pin Input Resistance
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guaranteed by design; not subject to production test.
Note 6. The GATE voltage is internally clamped and varies with operating conditions.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8461-02 February 2014
is a registered trademark of Richtek Technology Corporation.
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RT8461
Typical Application Circuit
+
AC IN
~
Rstart
1.5M
-
3
VCC
D1
RT8461
R1
2M
7 SIN
R2
5 FB
6 ICOMP
C2
R3
C3
100p
GATE 2
M1
8 VCOMP
R4
C4
R5
C5
SENSE
4
GND
1
RS
VOUT
D2
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L
C1
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RT8461
Typical Operating Characteristics
Supply Current vs. Temperature
Supply Current vs. Input Voltage
2.5
2.0
2.0
Supply Current (mA)
Supply Current (mA)
1.9
1.8
1.7
1.6
1.5
1.0
0.5
1.5
VCC = 24V
0.0
1.4
8
13
18
23
28
-50
33
-25
0
25
50
75
100
125
100
125
Temperature (°C)
Input Voltage (V)
VOVP vs. Temperature
UVLO vs. Temperature
40
20
38
17
UVLO (V)
VOVP (V)
UVLO-H
36
34
32
14
11
UVLO-L
8
30
5
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
25
50
75
Temperature (°C)
FB Voltage vs. Temperature
GATE Voltage High vs. Temperature
13.5
1.30
13.2
GATE Voltage (V)
FB Voltage (V)
1.25
1.20
1.15
IGATE = −100μA
12.9
12.6
12.3
IGATE = −20mA
12.0
VCC = 24V
1.10
VCC = 24V
11.7
-50
-25
0
25
50
75
100
Temperature (°C)
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DS8461-02 February 2014
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8461
GATE Voltage Low vs. Temperature
Switching Frequency vs. Temperature
45
IGATE = 20mA
0.8
GATE Voltage (V)
Switching Frequency (kHz)1
1.0
0.6
0.4
IGATE = 100μA
0.2
43
41
39
37
VCC = 24V
VCC = 24V
0.0
35
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
50
75
100
125
Temperature (°C)
ICOMP Voltage vs. SIN Voltage
Minimum On-Time vs. Temperature
3.5
350
3.0
330
2.5
VICOMP (V)
Minimum On-Time (ns)1
25
310
290
VCOMP = 2V
VCOMP = 1.5V
2.0
VCOMP = 1V
VCOMP = 0.7V
VCOMP = 0.5V
1.5
1.0
270
0.5
VCC = 24V
VCC = 24V
0.0
250
-50
-25
0
25
50
75
100
0
125
2
4
8
VSENSE Threshold vs. Temperature
SIN Current vs. Input Voltage
0.2
110
VSENSE Threshold (V)
VSIN = 14V
100
SIN Current (µA)
6
VSIN (V)
Temperature (°C)
90
80
70
VSIN = 28V
60
VSIN = 1V
0.0
-0.2
VSIN = 10V
-0.4
VSIN = 20V
-0.6
VCC = 24V
VCC = 24V, VCOMP = 3V
-0.8
50
8
13
18
23
28
Input Voltage (V)
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33
-50
-25
0
25
50
75
100
125
Temperature (°C)
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DS8461-02 February 2014
RT8461
Application Information
The RT8461 provides active power factor correction for
universal off-line power systems with fewer external
components.
It is suitable for wide line input range applications from 85
to 265 VAC. The RT8461 can operate in both Continuous
Conduction Mode (CCM) and Discontinuous Conduction
Mode (DCM) by fixed frequency PWM control. The fixed
switching frequency is internally set at 47kHz.
VICOMP = k   VCOMP  0.7   VSIN
where VICOMP is the reference for the current sense, k is
the multiplier gain, VCOMP is the error amplifier output voltage
and VSIN is the sinusoidal reference voltage on pin 7.
IAC
IIN
+
VAC
-
RS
+
M1
~
-
The multiplier has two inputs. The SIN pin is the divided
sinusoidal voltage which makes the current sense
comparator threshold voltage vary from zero to peak value.
The other input is the output of error amplifier at VCOMP
pin. In this way, the input average current wave will be
sinusoidal as well as reflects the load status. In order to
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8461-02 February 2014
IOUT
C1
+
VOUT
GATE
-
Multiplier
L
-
SENSE
47kHz
1
KS
Sinusoidal
Reference
R2
Multiplier
ICOMP
SIN
The RT8461 employs average current control to achieve a
better input current waveform.
In Figure 1, the inductor current is sensed and filtered by
a current error amplifier which output drives a PWM
modulator. In this way, the inner current loop tends to
minimize the error between the average input current IIN
and its reference. The converter works in CCM, so the
same considerations done with regard to the peak current
control can be applied.
IL
D1
VIN
+
The IC operates with a dual control topology; the inner
current loop and the outer voltage loop. The inner current
loop of the IC controls the sinusoidal profile for the average
input current. It uses the dependency of the PWM duty
cycle on the line input voltage to determine the
corresponding input current. This means the average input
current follows the input voltage as long as the device
operates in CCM. Under light load condition, depending
on the choke inductance, the system may enter into DCM.
In DCM, the average current waveform will be distorted
but the resultant harmonics are still low enough to meet
the standard of IEC61000-3-2.
achieve high power factor and good THD, the multiplier
transfer character is designed to be linear over a wide
dynamic range, namely, 1V to 3V for SIN and 0.8V to 1.2V
for FB. The relationship between the multiplier output and
inputs is described as the below equation :
VCOMP
R5
FB
+
VREF
R3
C5
Voltage
Error Amplifier
Figure 1. Functional Block with PFC CCM Control
Pulse Width Modulator
The IC employs an average current control scheme in CCM
to achieve the power factor correction. If the voltage loop
is working and output voltage is kept constant, the duty
cycle, DON, for a CCM PFC system is given as
V
DON = OUT
VIN
From the above equation, DON is relative to VIN. The
objective of the current loop is to regulate the average
inductor current such that it is relative to the duty cycle,
DON, and the input voltage, VIN. Figure 2 shows the
waveform for the control scheme.
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RT8461
Ramp Profile
IL
Current Sense/Current Sense Comparator
IOUT, AVG
GATE
Drive
t
Figure 2. Average Current Controls in CCM
The PWM is performed by the intersection of a ramp signal
with the current error amplifier output. The PWM cycle
starts with the GATE turns on for a minimum duration
about 300ns typical. In case of the inductor current reaches
the in peak current limitation, the GATE will be turned off
immediately when VSENSE is triggered.
Error Amplifier
The outer voltage loop of the cascaded control scheme
regulates the PFC output bus voltage VOUT. The error
amplifier's inverting feedback FB is connected to an
external resistor divider which senses the output voltage.
The output of the error amplifier is one of the two inputs of
the multiplier. A compensation loop is connected outside
between the error amplifier output at the VCOMP pin, and
ground of the GND pin. Normally, the compensation loop
bandwidth is very low to realize high power factor for PFC
converter. The compensation is also responsible for the
soft-start function which controls an increasing AC input
current during start-up.
FB
 R3  V

OUT 

 R2 + R3

VCOMP
+
R5
The PFC switch's turn-on current is sensed through an
external resistor in series with the switch. When the
sensed voltage exceeds the threshold voltage (the
multiplier output), the current sense comparator will
become low and the external MOSFET will be turned off.
This insures a cycle-by-cycle current mode control
operation. The max value usually occurs in start-up
process or abnormal conditions such as short load.
Output Gate Driver
The output gate driver is a fast totem pole gate drive. It
has a built-in cross conduction current protection and a
Zener diode to protect the external transistor switch
against unexpected over voltages.
The maximum voltage at GATE is typically clamped at
12.5V.
Under Voltage Lockout (UVLO)
The RT8461 internal UVLO block monitors the VCC power
supply with 2V hysteresis. The hysteresis behavior
guarantees a one-short startup resistor and hold-up
capacitor. The IC will then be consuming typically 150μA
when start-up and the power dissipation on resistor would
be less than 0.1W. After start-up, the operating current is
typically 1.65mA to get a better efficiency.
Over Voltage Protection (OVP)
Whenever VOUT exceeds the rated value by 5%, the over
voltage protection is activated. This is implemented by
sensing the voltage at FB pin with respect to a reference
voltage of 1.25V. A FB voltage higher than 1.25V will
immediately reduce the output duty cycle and bypass the
normal voltage loop control. This results in a lower input
power to reduce the output voltage VOUT.
VCC
1.2V
10V
C5
8V
t
Figure 3. Voltage Loop Amplifier
IC's
State
OFF Start Normal Open Loop/
Up Operation Standby
Normal
Operation
OFF
Figure 4. State of Power VCC Operation
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DS8461-02 February 2014
RT8461
Layout Consideration
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
Locate the compensation components
to VCOMP pin as close as possible
AC IN
VCC
+
R1
SIN
GATE
GND
M1
C3
8
GND
C2
RS
L
D1
C1
PD(MAX) = (TJ(MAX) − TA) / θJA
-
Rstart
VCOMP
GATE
2
7
SIN
VCC
3
6
ICOMP
SENSE
4
5
FB
D2
R5
C5
GND
R4 C4
R3
R2
GND
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
PGND
Locate the input capacitor as
close to VCC pin as possible
VCC
Figure 6. PCB Layout Guide
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 package, the thermal resistance, θJA, is 188°C/W
on a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (188°C/W) = 0.53W for
SOP-8 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 5 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Maximum Power Dissipation (W)1
0.6
Four-Layer PCB
0.5
0.4
0.3
0.2
0.1
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 5. Derating Curve of Maximum Power Dissipation
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11
RT8461
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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DS8461-02 February 2014