STOD13AS 250 mA dual DC-DC converter for powering AMOLED displays Features ■ Step-up and inverter converters ■ Operating input voltage range from 2.5 V to 4.5 V ■ Synchronous rectification for both DC-DC converters ■ Minimum 250 mA output current ■ 4.6 V fixed positive output voltage ■ Programmable negative voltage by SWIRE from -2.4 V to -6.4 V at 100 mV steps ■ Typical efficiency: 85% ■ Pulse skipping mode in light load condition ■ 1.5 MHz PWM mode control switching frequency ■ TDMA noise high immunity ■ Enable pin for shutdown mode ■ Low quiescent current in shutdown mode ■ Soft-start with inrush current protection ■ Overtemperature protection ■ Temperature range: -40 °C to 85 °C ■ True-shutdown mode ■ Fast discharge outputs of the circuits after shutdown ■ Short-circuit protection ■ Package DFN12L (3 x 3 mm) 0.6 mm height DFN12L (3 x 3 mm) ■ Multimedia players Description Applications ■ Active matrix AMOLED power supply in portable devices ■ Cellular phones The STOD13AS is a dual DC-DC converter for AMOLED display panels. It integrates a step-up and an inverting DC-DC converter making it particularly suitable for battery operated products, in which the major concern is overall system efficiency. It works in pulse skipping mode during low load conditions and PWM-MODE at 1.5 MHz frequency for medium/high load conditions. The high frequency allows the value and size of external components to be reduced. The Enable pin allows the device to be turned off, therefore reducing the current consumption to less than 1 µA. The negative output voltage can be programmed by an MCU through a dedicated pin which implements single-wire protocol. Soft-start with controlled inrush current limit, thermal shutdown, and short-circuit protection are integrated functions of the device. ■ Camcorders and digital still cameras Table 1. Device summary Order code Positive voltage Negative voltage Package Packaging STOD13ASTPUR 4.6V -2.4V to -6.4V DFN12L (3 x 3mm) 3000 parts per reel January 2012 Doc ID 022733 Rev 1 1/25 www.st.com 25 Contents STOD13AS Contents 1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1 7 SWIRE features and benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1.2 SWIRE protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1.3 SWIRE basic operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Negative output voltage levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.3 Enable, SWIRE and FD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.2 External passive components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1.1 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1.2 Input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Recommended PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8.1 2/25 6.1.1 6.2 7.1 8 SWIRE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8.1.1 Multiple operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8.1.2 Pulse skipping operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8.1.3 Discontinuous conduction mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8.1.4 Continuous conduction mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8.1.5 Enable pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.1.6 Soft-start and inrush current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.1.7 Undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.1.8 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Doc ID 022733 Rev 1 STOD13AS Contents 8.1.9 Short-circuit protection during soft-start (SSD) . . . . . . . . . . . . . . . . . . . 18 8.1.10 Overload protection (OLP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.1.11 Short-circuit protection (SCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.1.12 Fast discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Doc ID 022733 Rev 1 3/25 Schematic 1 STOD13AS Schematic Figure 1. Application schematic LX1 VBAT CIN VINP LX1 VMID VINA CMID S-WIRE EN FD S-WIRE STOD13AS EN FD VREF CREF VO2 PGND AGND CO2 LX2 LX2 AM10459v1 Table 2. Typical external components Comp. Manufacturer Part number Value Size Ratings L1 (1) CoilCraft Murata LPS4012-472ML LQH3NPN4R7MM0 4.7µH 4.0 x 4.0 x 1.2 3.0 x 3.0 x 1.5 ±20%, I = 1.7A, R = 0.175Ω ±20%, I = 1.25A, R = 0.13Ω L2 (2) CoilCraft Murata LPS4012-472ML LQH3NPN4R7MM0 4.7µH 4.0 x 4.0 x 1.2 3.0 x 3.0 x 1.5 ±20%, I = 1.7A, R = 0.175Ω ±20%, I = 1.25A, R = 0.13Ω CIN Murata Taiyo YudeN GRM219R61A106KE44 LMK212BJ106KD-T 2 x 10µF 0805 ±10%, X5R, 10V ±10%, X5R, 10V CMID Murata Taiyo YudeN GRM219R61A106KE44 LMK212BJ106KD-T 10µF 0805 0805 ±10%, X5R, 10V ±10%, X5R, 10V CO2 Murata Taiyo YudeN GRM219R61A106KE44 LMK212BJ106KD-T 2 x 10µF 0805 0805 ±10%, X5R, 10V ±10%, X5R, 10V CREF Murata Taiyo YudeN GRM185R60J105KE26 JMK107BJ105KK-T 1µF 0603 0603 ±10%, X5R, 6.3V ±10%, X5R, 6.3V 1. A 250 mA load can be provided with inductor saturation current as a minimum of 0.9 A. 2. At -6.4 V, a 250 mA load can be provided with inductor saturation current as a minimum of 1.5 A. See Section 7.1.1. Note: 4/25 All the above components refer to the typical application performance characteristics. Operation of the device is not limited to the choice of these external components. Inductor values ranging from 3.3 µH to 6.8 µH can be used together with the STOD13AS. Doc ID 022733 Rev 1 STOD13AS Schematic Figure 2. Block schematic VINP L X1 DMD P1A N1 VINA RING KILLER UVLO s s s P1B VMID STEP-UP CONTROL EN LOGIC CONTROL OTP S-WIRE FAST DISCHARGE SWIRE V REF FD OSC VREF AGND DMD VINP PGND s P2 SSD SCP OLP s N2 INVERTING CONTROL LX CURRENT SENSE VO2 # # VO2 S-WIRE control FAST DISCHARGE VREF LX2 Doc ID 022733 Rev 1 AM10458v1 5/25 Pin configuration 2 STOD13AS Pin configuration Figure 3. Pin configuration (top view) Table 3. Pin description Pin name Pin n° Lx1 1 Boost converter switching node PGND 2 Power ground pin VMID 3 Boost converter output voltage FD 4 Fast discharge control pin. When pulled LOW, the fast discharge after shutdown is active. When pulled HIGH, the fast discharge is OFF AGND 5 Signal ground pin. This pin must be connected to the power ground layer VREF 6 Voltage reference output. 1 µF bypass capacitor must be connected between this pin and AGND SWIRE 7 Negative voltage setting pin EN 8 Enable control pin. High = converter on; Low = converter in shutdown mode VO2 9 Inverting converter output voltage Lx2 10 Inverting converter switching node VIN A 11 Analogic input supply voltage VIN P 12 Power input supply voltage Exposed pad 6/25 Description Internally connected to AGND. Exposed pad must be connected to ground layers in the PCB layout in order to guarantee proper operation of the device Doc ID 022733 Rev 1 STOD13AS Maximum ratings 3 Maximum ratings Table 4. Absolute maximum ratings Symbol Parameter Value Unit -0.3 to 6 V VINA, VINP DC supply voltage EN, SWIRE Logic input pins -0.3 to 4.6 V FD Logic input pin -0.3 to VINA +0.3 V ILX2 Inverting converter switching current Internally limited A LX2 Inverting converter switching node voltage -10 to VINP + 0.3 V VO2 Inverting converter output voltage -10 to AGND + 0.3 V VMID Step-up converter and LDO output voltage -0.3 to 6 V LX1 Step-up converter switching node voltage -0.3 to VMID + 0.3 V ILX1 Step-up converter switching current Internally limited A VREF Reference voltage -0.3 to 3 V PD Power dissipation Internally limited mW -65 to 150 °C Maximum junction temperature 150 °C Human body model protection ±2 kV Machine body model protection 200 V TSTG TJ Storage temperature range ESD Note: Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. The Lx1 and Lx2 have high slew rate and they can be over the absolute maximum rating during operation due to the parasitic inductance in the PCB and scope probe. An absolute maximum rating of Lx1 and Lx2 is related to voltage supplied by an external source so the internally generated Lx1 and Lx2 voltage during normal operation doesn't damage the chipset. Table 5. Symbol RthJA RthJC Thermal data Parameter Thermal resistance junction-ambient Thermal resistance junction-case (FR-4 PCB) (1) Value Unit 33 °C/W 2.12 °C/W 1. The package is mounted on a 4-layer (2S2P) JEDEC board as per JESD51-7. Doc ID 022733 Rev 1 7/25 Electrical characteristics 4 STOD13AS Electrical characteristics TJ = 25 °C, VINA = VINP = 3.7 V, IMID,O2 = 30 mA, CIN = 2 x 10 µF, CMID = 10 µF, CO2 = 2 x 10 µF, CREF = 1 µF, L1 = L2 = 4.7 µH, VEN = 2 V, VMID = 4.6 V, VO2 = -4.9 V unless otherwise specified. Table 6. Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit 2.5 3.7 4.5 V 2.22 2.25 V General section VINA, VINP Supply input voltage UVLO_H Under voltage lockout HIGH VINA rising UVLO_L Under voltage lockout LOW VINA falling Input current No load condition IQ_SH Shutdown current VEN = VSW = GND TJ = -40°C to +85°C VEN H Enable high threshold VINA=2.5V to 4.5V, TJ = -40°C to +85°C VEN L Enable low threshold IEN Enable input current VEN=VINA=4.5V; TJ = -40°C to +85°C VFD H Fast discharge high threshold VINA=2.5V to 4.5V, TJ = -40°C to +85°C VFD L Fast discharge low threshold IFD Fast discharge input current VFD=VINA=4.5V; TJ = -40°C to +85°C fs Switching frequency PWM mode D1MAX Step-up maximum duty cycle No load 87 % D2MAX Inverting maximum duty cycle No load 87 % I_VI Total system efficiency 1.9 2.18 1.7 V 2.1 mA 1 µA 1.2 V 0.4 1 1.2 µA V 0.4 1.35 1.5 IMID,O2=10 to 30mA, VMID=4.6V, VO2=-4.9V 78 IMID,O2=30 to 150mA, VMID=4.6V, VO2=-4.9V 85 IMID,O2=150 to 250mA, VMID=4.6V, VO2=-4.9V 82 VREF Reference voltage IREF=10µA IREF Reference current capability @ 98.5% of no load reference voltage 1.208 1.220 50 µA 1.65 MHz % 1.232 100 V µA Step-up converter section Positive output voltage VMID 8/25 Positive output voltage total variation 4.6 VINA=VINP=2.9V to 4.5V; IMID=5mA to 250mA, IO2 no load TJ = -40°C to +85°C Doc ID 022733 Rev 1 -0.8 V 0.8 % STOD13AS Table 6. Symbol ΔVMID LT ΔVMID T Electrical characteristics Electrical characteristics (continued) Parameter Line transient Load transient response Test conditions Min. Max. Unit VINA,P=3.4V to 2.9V, IMID=100mA; TR=TF=10µs -10 mV IMID=3 to 30mA and IMID=30 to 3mA, TR=TF=150µs ±20 mV IMID=10 to 100mA and IMID=100 to 10mA, TR=TF=150µs ±25 mV Undershoot/overshoot TDMA Noise Static variation between low and high VIN level Typ. ±20 IMID=10 to 50mA; IO2 no load mV (1) 4 IMID MAX Maximum output current VINA,P=2.9V to 4.5V 250 I-L1MAX Step-up inductor peak current VMID 10% below nominal value 1.08 mA 1.32 A Step-up converter section RDSONP1 P-channel static drain-source ON resistance VINA=VINP=3.7V, ISW-P1=100mA 1.0 2.0 Ω RDSONN1 N-channel static drain-source ON resistance VINA=VINP=3.7V, ISW-N1=100mA 0.4 1.0 Ω -2.4 V Inverting converter section 41 different values set by Negative output voltage range SWIRE pin (see Section 6.1.2) VO2 ΔVO2 LT ΔVO2 T -6.4 Negative output voltage -4.9 Negative output voltage total variation VINA=VINP=2.9V to 4.5V; IO2=5mA to 250mA, IMID no load TJ = -40°C to +85°C Line transient VINA,P=3.4V to 2.9V, IO2=100mA, TR=TF=10µs +10 mV IO2=3 to 30mA and IO2=30 to 3mA, TR=TF=150µs ±20 mV IO2=10 to 100mA and IO2=100 to 10mA, TR=TF=150µs ±25 mV Load transient response -1.7 Undershoot/overshoot TDMA Noise Static variation between low and high VIN level 1.7 % ±20 IO2=10 to 50mA; IMID no load mV (1) 5 IO2 MAX Maximum output current VINA,P=2.9V to 4.5V -250 I-L2MAX Inverting peak current VO2 below 10% of nominal value -1.6 P-channel static drain-source ON resistance VINA=VINP=3.7V, ISW-P2=100mA RDSONP2 V Doc ID 022733 Rev 1 mA 0.42 -1.3 A 0.8 Ω 9/25 Electrical characteristics Table 6. STOD13AS Electrical characteristics (continued) Symbol Parameter RDSONN2 N-channel static drain-source ON resistance Test conditions VINA=VINP=3.7V, ISW-N2=100mA Min. Typ. Max. Unit 0.43 0.8 Ω Thermal shutdown OTP Overtemperature protection 140 °C OTPHYST Overtemperature protection hysteresis 15 °C Discharge resistor RDIS Resistor value No load, EN=SW=FD=Low 400 Ω TDIS Discharge time No load, EN=SW=FD=Low, VMID-VO2 at 10% of nominal value 10 ms 1. VINA,P = 4.2 to 3.7 V, 3.7 to 3.2 V, 3.4 to 2.9 V, f = 200 Hz; tON = 3.65 ms; tOFF = 1.25 ms; TR = TF = 10 µs, pulse signal. 10/25 Doc ID 022733 Rev 1 STOD13AS 5 Typical performance characteristics Typical performance characteristics VINA = VINP = 3.7 V, VO2 = -4.9 V, TJ = 25 °C; See Table 1 for external components used in the tests below. Figure 4. Maximum power output vs. input voltage Figure 5. Efficiency vs. output current 4.50 90.0 4.25 87.5 4.00 3.75 85.0 3.50 82.5 3.00 2.75 Efficiency [%] P_OUT [W] 3.25 Po1,2 MAX 2.50 80.0 77.5 75.0 3.4 V 3.7 V 72.5 3.8 V 2.25 2.00 4V 1.75 4.2 V 70.0 4.5 V 1.50 67.5 1.25 65.0 1.00 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 5 20 35 Figure 6. 50 65 95 110 125 140 155 170 185 200 215 230 245 260 ILOAD [mA] V_IN [V] Total system efficiency vs. ILOAD Figure 7. Soft-start and inrush current 90.0 87.5 85.0 82.5 Efficiency [%] 80.0 77.5 Coilcra LPS4012 at 3.7 V 75.0 muRata LQH3NPN at 3.7 V 72.5 70.0 67.5 65.0 5 25 45 65 85 105 125 145 165 185 205 225 245 ILOAD [mA] Doc ID 022733 Rev 1 11/25 Typical performance characteristics Figure 8. Fast discharge no load, EN=SW=FD=Low STOD13AS Figure 9. Switching and output waveforms VINA = VINP = 2.9 V, IMID,O2 = 250 mA, TJ = 85 °C Figure 10. Step-up CCM operation Figure 11. Inverting CCM operation VINA = VINP = 2.9 V, IMID = 100 mA, TJ = 25 °C VINA = VINP = 2.9 V, IMID = 100 mA, TJ = 25 °C 12/25 Doc ID 022733 Rev 1 STOD13AS Detailed description 6 Detailed description 6.1 SWIRE 6.1.1 6.1.2 6.1.3 ● Protocol: to digitally communicate over a single cable with single-wire components ● Single-wire's 3 components: 1. an external MCU 2. wiring and associated connectors 3. the STOD13AS device with a dedicated single-wire pin. SWIRE features and benefits ● Fully digital signal ● No handshake needed ● Protection against glitches and spikes though an internal low pass filter acting on falling edges ● Uses a single wire (plus analog ground) to accomplish both communication and power control transmission ● Simplify design with an interface protocol that supplies control and signaling over a single-wire connection to set the output voltages. SWIRE protocol ● Single-wire protocol uses conventional CMOS/TTL logic levels (maximum 0.6 V for logic “zero” and a minimum 1.2 V for logic “one”) with operation specified over a supply voltage range of 2.5 V to 4.5 V ● Both master (MCU) and slave (STOD13AS) are configured to permit bit sequential data to flow only in one direction at a time; master initiates and controls the device ● Data is bit-sequential with a START bit and a STOP bit ● Signal is transferred in real time ● System clock is not required; each single-wire pulse is self-clocked by the oscillator integrated in the master and is asserted valid within a frequency range of 250 kHz (maximum). SWIRE basic operations ● The negative output voltage levels are selectable within a wide range (steps of 100 mV) ● The device can be enabled / disabled via SWIRE in combination with the Enable pin. Doc ID 022733 Rev 1 13/25 Detailed description STOD13AS 6.2 Negative output voltage levels Table 7. Negative output voltage levels Pulse VO2 Pulse VO2 Pulse VO2 Pulse VO2 1 -6.4 11 -5.4 21 -4.4 31 -3.4 2 -6.3 12 -5.3 22 -4.3 32 -3.3 3 -6.2 13 -5.2 23 -4.2 33 -3.2 4 -6.1 14 -5.1 24 -4.1 34 -3.1 5 -6.0 15 -5.0 25 -4.0 35 -3.0 6 -5.9 16 (1) -4.9 26 -3.9 36 -2.9 7 -5.8 17 -4.8 27 -3.8 37 -2.8 8 -5.7 18 -4.7 28 -3.7 38 -2.7 9 -5.6 19 -4.6 29 -3.6 39 -2.6 10 -5.5 20 -4.5 30 -3.5 40 -2.5 41 -2.4 1. Default value. 6.3 Enable, SWIRE and FD Table 8. Enable and SWIRE operation table (1) Enable SWIRE Action Low Low Device off Low High Negative output set by SWIRE High Low Default negative output voltage High High Default negative output voltage 1. The Enable pin must be set to AGND while using the SWIRE function. Table 9. Fast discharge operation table FD pin 14/25 Action Low Fast discharge active after IC shutdown High No fast discharge function Doc ID 022733 Rev 1 STOD13AS Application information 7 Application information 7.1 External passive components 7.1.1 Inductor selection Magnetic shielded low ESR power inductors must be chosen as the key passive components for switching converters. For the step-up converter an inductance between 4.7 µH and 6.8 µH is recommended. For the inverting stage the suggested inductance ranges from 3.3 µH to 4.7 µH. It is very important to select the right inductor according to the maximum current the inductor can handle to avoid saturation. The step-up and the inverting peak current can be calculated as follows: Equation 1 IPEAK −BOOST = VMID × IOUT VINMIN × (VMID − VINMIN ) + η1× VINMIN 2 × VMID × fs × L1 Equation 2 I PEAK - INVERTING = (VINMIN - VO2MIN ) x I OUT VINMIN x VO 2 MIN + η 2 x VINMIN 2 x (VO 2MIN - VINMIN ) x fs xL2 where VMID: step-up output voltage, fixed at 4.6 V; VO2: inverting output voltage including sign (minimum value is the absolute maximum value); IO: output current for both DC-DC converters; VIN: input voltage of the STOD13AS; fs: switching frequency. Use the minimum value of 1.35 MHz for the worst case; η1: efficiency of step-up converter. Typical value is 0.70; η2: efficiency of inverting converter. Typical value is 0.60. The negative output voltage can be set via SWIRE at -6.4 V. Accordingly, the inductor peak current, at the maximum load condition, increases. A proper inductor, with a saturation current as a minimum of 1 A, is preferred. 7.1.2 Input and output capacitor selection It is recommended to use X5R or X7R low ESR ceramic capacitors as input and output capacitors in order to filter any disturbance present in the input line and to obtain stable operation for the two switching converters. A minimum real capacitance value of 6 µF must be guaranteed for CMID and CO2 in all conditions. Considering tolerance, temperature variation and DC polarization, a 10 µF, 10 V ±10% capacitor as CMID and 2 x 10 µF, 10 V ±10% as CO2, can be used to achieve the required 6 µF. Doc ID 022733 Rev 1 15/25 Application information 7.2 STOD13AS Recommended PCB layout The STOD13AS is a high frequency power switching device and therefore requires a proper PCB layout in order to obtain the necessary stability and optimize line/load regulation and output voltage ripple. Analog input (VINA) and power input (VINP) must be kept separated and connected together at the CIN pad only. The input capacitor must be as close as possible to the IC. In order to minimize the ground noise, a common ground node for power ground and a different one for analog ground must be used. In the recommended layout, the AGND node is placed close to CREF ground while the PGND node is centered at CIN ground. They are connected by a separated layer routing on the bottom through vias. The exposed pad is connected to AGND through vias. Figure 12. Top layer and silk-screen (top view, not to scale) Figure 13. Bottom layer and silk-screen (top view, not to scale) 16/25 Doc ID 022733 Rev 1 STOD13AS Detailed description 8 Detailed description 8.1 General description The STOD13AS is a high efficiency dual DC-DC converter which integrates a step-up and inverting power stage suitable for supplying AMOLED panels. Thanks to the high level of integration it needs only 6 external components to operate and it achieves very high efficiency using a synchronous rectification technique for each of the two DC-DC converters. The controller uses an average current mode technique in order to obtain good stability and precise voltage regulation in all possible conditions of input voltage, output voltage, and output current. In addition, the peak inductor current is monitored in order to avoid saturation of the coils. The STOD13AS implements a power saving technique in order to maintain high efficiency at very light load and it switches to PWM operation as the load increases in order to guarantee the best dynamic performance and low noise operation. The STOD13AS avoids battery leakage thanks to the true-shutdown feature and it is self protected from overtemperature. Undervoltage lockout and soft-start guarantee proper operation during startup. 8.1.1 Multiple operation modes Both the step-up and the inverting stage of the STOD13AS operate in three different modes: pulse skipping (PSM), discontinuous conduction mode (DCM) and continuous conduction mode (CCM). It switches automatically between the three modes according to input voltage, output current, and output voltage conditions. 8.1.2 Pulse skipping operation The STOD13AS works in pulse skipping mode when the load current is below some tens of mA. The load current level at which this way of operation occurs depends on input voltage only for the step-up converter and on input voltage and negative output voltage (VO2) for the inverting converter. 8.1.3 Discontinuous conduction mode When the load increases above a few mA, the STOD13AS enters DCM operation. In order to obtain this type of operation the controller must avoid the inductor current going negative. The discontinuous mode detector (DMD) blocks sense the voltage across the synchronous rectifiers (P1B for the step-up and N2 for the inverting) and turn off the switches when the voltage crosses a defined threshold which, in turn, represents a certain current in the inductor. This current can vary according to the slope of the inductor current which depends on input voltage, inductance value, and output voltage. 8.1.4 Continuous conduction mode At medium/high output loads, the STOD13AS enters full CCM at constant switching frequency mode for each of the two DC-DC converters. Doc ID 022733 Rev 1 17/25 Detailed description 8.1.5 STOD13AS Enable pin The device operates when the EN pin is set high. If the EN pin is set low, the device stops switching, and all the internal blocks are turned off. In this condition the current drawn from VINP/VINA is below 1 µA in the whole temperature range. In addition, the internal switches are in an OFF state so the load is electrically disconnected from the input, this avoids unwanted current leakage from the input to the load. 8.1.6 Soft-start and inrush current limiting After the EN pin is pulled high, or after a suitable voltage is applied to VINP, VINA and EN, the device initiates the start-up phase. As a first step, the CMID capacitor is charged and the P1B switch implements a current limiting technique in order to keep the charge current below 400 mA. This avoids the battery overloading during startup. After VMID reaches the VINP voltage level, the P1B switch is fully turned on and the soft-start procedure for the step-up is started. After around 2 ms the soft-start for the inverting is started. The positive and negative voltages are under regulation at around 13 ms after the EN pin is asserted high. 8.1.7 Undervoltage lockout The undervoltage lockout function avoids improper operation of the STOD13AS when the input voltage is not high enough. When the input voltage is below the UVLO threshold the device is in shutdown mode. The hysteresis of 50 mV avoids unstable operation when the input voltage is close to the UVLO threshold. 8.1.8 Overtemperature protection An internal temperature sensor continuously monitors the IC junction temperature. If the IC temperature exceeds 140 °C, typical, the device stops operating. As soon as the temperature falls below 125 °C, typical, normal operation is restored. 8.1.9 Short-circuit protection during soft-start (SSD) During device soft-start on the positive output, an internal comparator checks if the panel is damaged. In this case, soft-start is stopped and the device is parked in power-off. To reset the normal functionality (assuming that the anomalous load condition is removed), it is necessary to restart the converter through an enable transient. If the panel is not damaged it is possible to proceed with the soft-start of the negative output and both reach their final value, therefore ensuring normal output voltages and functionality. 8.1.10 Overload protection (OLP) The output current is internally limited. An overload condition, as a short-circuit between the two outputs or between each output and GND, produces the device power-off. To reset the 18/25 Doc ID 022733 Rev 1 STOD13AS Detailed description normal functionality (assuming that the short condition is removed), it is necessary to restart the converter through an enable transient. 8.1.11 Short-circuit protection (SCP) When short-circuit occurs, the device is able to detect the voltage difference between VIN and VOUT. Overshoots are limited, decreasing the inductor current. After that, the output stages of the device are turned off. This status is maintained, avoiding current flowing to the load. A new ENABLE transition is needed to restart the device. During startup the shortcircuit protection is active. 8.1.12 Fast discharge When ENABLE turns from high to low level, the device goes into shutdown mode LX1 and LX2 stop switching. If the FD pin is low, a resistor of about 400 Ω is connected between VMID and VO2 to discharge quickly CMID and CO2 capacitors, lowering in about 10 ms the differential output voltage (VMID-VO2) below 10% of nominal value. When the output voltages are discharged to 0 V, the switches turn off and the outputs are high impedance. When the FD pin is high, the fast discharge after shutdown is off. Doc ID 022733 Rev 1 19/25 Package mechanical data 9 STOD13AS Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 20/25 Doc ID 022733 Rev 1 STOD13AS Package mechanical data Table 10. DFN12L (3 x 3) mechanical data mm. inch. Dim. Min. Typ. Max. Min. Typ. Typ. A 0.51 0.55 0.60 0.020 0.022 0.024 A1 0 0.02 0.05 0 0.001 0.002 A3 0.20 0.008 b 0.18 0.25 0.30 0.007 0.010 0.012 D 2.85 3 3.15 0.112 0.118 0.124 D2 1.87 2.02 2.12 0.074 0.080 0.083 E 2.85 3 3.15 0.112 0.118 0.124 E2 1.06 1.21 1.31 0.042 0.048 0.052 e L 0.45 0.30 0.40 0.018 0.50 0.012 0.016 0.020 Figure 14. DFN12L (3 x 3) drawing 8085116-A Doc ID 022733 Rev 1 21/25 Package mechanical data STOD13AS Tape & reel QFNxx/DFNxx (3x3) mechanical data mm. inch DIM. MIN. TYP A MIN. TYP. 330 C 12.8 D 20.2 N 99 13.2 MAX. 12.992 0.504 0.519 0.795 101 T 22/25 MAX. 3.898 3.976 14.4 0.567 Ao 3.3 0.130 Bo 3.3 0.130 Ko 1.1 0.043 Po 4 0.157 P 8 0.315 Doc ID 022733 Rev 1 STOD13AS Package mechanical data Figure 15. DFN12L (3 x 3 mm) footprint recommended data Doc ID 022733 Rev 1 23/25 Revision history STOD13AS 10 Revision history Table 11. Document revision history Date Revision 27-Jan-2012 1 24/25 Changes Initial release. Doc ID 022733 Rev 1 STOD13AS Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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