LT4356MP-1/LT4356MP-2 - Surge Stopper

LT4356MP-1/LT4356MP-2
Surge Stopper
FEATURES
DESCRIPTION
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The LT®4356 surge stopper protects loads from high voltage
transients. It regulates the output during an overvoltage
event, such as load dump in automobiles, by controlling
the gate of an external N-channel MOSFET. The output
is limited to a safe value thereby allowing the loads to
continue functioning. The LT4356MP also monitors the
voltage drop between the VCC and SNS pins to protect
against overcurrent faults. An internal amplifier limits the
current sense voltage to 50mV. In either fault condition, a
timer is started inversely proportional to MOSFET stress.
If the timer expires, the FLT pin pulls low to warn of an
impending power-down. If the condition persists, the
MOSFET is turned off. After a cooldown period, the GATE
pin pulls up turning on the MOSFET again.
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Stops High Voltage Surges
Adjustable Output Clamp Voltage
Overcurrent Protection
Wide Operation Range: 4V to 80V
Reverse Input Protection to –60V
Low 7μA Shutdown Current, LT4356-1
Adjustable Fault Timer
Controls N-channel MOSFET
Shutdown Pin Withstands –60V to 100V
Fault Output Indication
Guaranteed Operation –55°C to 125°C
Auxiliary Amplifier for Level Detection Comparator or
Linear Regulator Controller
Available in 10-Pin MSOP or 16-Pin SO Packages
APPLICATIONS
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Automotive/Avionic Surge Protection
Hot Swap/Live Insertion
High Side Switch for Battery Powered Systems
Intrinsic Safety Applications
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. Hot Swap, No RSENSE and ThinSOT are trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
The auxiliary amplifier may be used as a voltage detection
comparator or as a linear regulator controller driving an
external PNP pass transistor.
Back-to-back FETs can be used in lieu of a Schottky diode
for reverse input protection, reducing voltage drop and
power loss. A shutdown pin reduces the quiescent current
to less than 7μA for the LT4356-1 during shutdown. The
LT4356-2 differs from the LT4356-1 during shutdown by
reducing the quiescent current to 60μA and keeping alive
the auxiliary amplifier for uses such as an undervoltage
lockout or always-on regulator.
TYPICAL APPLICATION
4A, 12V Overvoltage Output Regulator
10mΩ
VIN
12V
IRLR2908
VOUT
80V INPUT SURGE
10Ω
383k
Overvoltage Protector Regulates Output at
27V During Transient
VCC
SNS
GATE
CTMR = 6.8μF
ILOAD = 500mA
102k
VIN
20V/DIV
OUT
FB
SHDN
IN+
4.99k
DC-DC
CONVERTER
LT4356S
100k
SHDN GND
EN
UNDERVOLTAGE
AOUT
GND
TMR
VCC
FLT
FAULT
12V
27V ADJUSTABLE CLAMP
VOUT
20V/DIV
12V
100ms/DIV
4356mp12 TA01b
4356mp12 TA01
0.1μF
4356mp12fb
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LT4356MP-1/LT4356MP-2
ABSOLUTE MAXIMUM RATINGS (Notes 1 and 2)
VCC, SHDN ................................................ –60V to 100V
SNS............................. VCC – 30V or –60V to VCC + 0.3V
OUT, AOUT, FLT, EN ..................................... –0.3V to 80V
GATE (Note 3) .................................–0.3V to VOUT + 10V
FB, TMR, IN+ ................................................ –0.3V to 6V
AOUT, EN, FLT, IN+ ..................................................–3mA
Operating Temperature Range
LT4356M ............................................–55°C to 125°C
Storage Temperature Range
MS, SO ..............................................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS, SO ............................................................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
FB
OUT
GATE
SNS
VCC
1
2
3
4
5
10
9
8
7
6
TMR
GND
EN
FLT
SHDN
TMR 1
16 IN+
FB 2
15 NC
NC 3
14 AOUT
OUT 4
GATE 5
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 160°C/W
13 NC
12 GND
NC 6
11 EN
SNS 7
10 FLT
VCC 8
9
SHDN
S PACKAGE
16-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 100°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT4356MPMS-1#PBF
LT4356MPMS-1#TRPBF
LTFGD
10-Lead Plastic MSOP
–55°C to 125°C
LT4356MPS-1#PBF
LT4356MPS-1#TRPBF
LT4356MPS-1
16-Lead Plastic SO
–55°C to 125°C
LT4356MPS-2#PBF
LT4356MPS-2#TRPBF
LT4356MPS-2
16-Lead Plastic SO
–55°C to 125°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT4356MPMS-1
LT4356MPMS-1#TR
LTFGD
10-Lead Plastic MSOP
–55°C to 125°C
LT4356MPS-1
LT4356MPS-1#TR
LT4356MPS-1
16-Lead Plastic SO
–55°C to 125°C
LT4356MPS-2
LT4356MPS-2#TR
LT4356MPS-2
16-Lead Plastic SO
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
4356mp12fb
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LT4356MP-1/LT4356MP-2
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V unless otherwise noted.
SYMBOL
PARAMETER
VCC
Operating Voltage Range
ICC
VCC Supply Current
CONDITIONS
MIN
l
TYP
MAX
4
UNITS
80
V
VSHDN = Float
l
1
1.5
mA
VSHDN = 0V, IN+ = 1.3V, LT4356MP-1
LT4356MP-1
l
7
7
25
40
μA
μA
VSHDN = 0V, IN+ = 1.3V, LT4356MP-2
LT4356MP-2
l
60
60
70
250
μA
μA
0.3
0.8
1
2
mA
mA
8
16
V
V
–38
–50
μA
μA
IR
Reverse Input Current
VSNS = VCC = –30V, SHDN Open
VSNS = VCC = VSHDN = –30V
l
l
ΔVGATE
GATE Pin Output High Voltage
VCC = 4V; (VGATE – VOUT)
80V ≥ VCC ≥ 8V; (VGATE – VOUT)
l
l
4.5
10
IGATE(UP)
GATE Pin Pull-Up Current
VGATE = 12V; VCC = 12V
VGATE = 48V; VCC = 48V
l
l
–4
–4.5
–23
–30
IGATE(DN)
GATE Pin Pull-Down Current
Overvoltage, VFB = 1.4V, VGATE = 12V
Overcurrent, VCC – VSNS = 120mV, VGATE = 12V
Shutdown Mode, VSHDN = 0V, VGATE = 12V
l
l
l
75
5
1.5
150
10
5
VFB
FB Pin Servo Voltage
VGATE = 12V; VOUT = 12V
l
1.215
1.25
1.275
V
IFB
FB Pin Input Current
VFB = 1.25V
l
0.3
1
μA
ΔVSNS = (VCC – VSNS), VCC = 12V
ΔVSNS = (VCC – VSNS), VCC = 48V
l
l
42.5
43
50
51
55
56
mV
mV
5
10
ΔVSNS
Overcurrent Fault Threshold
ISNS
SNS Pin Input Current
VSNS = VCC = 12V to 48V
l
ILEAK
FLT, EN Pins Leakage Current
AOUT Pin Leakage Current
FLT, EN = 80V
AOUT = 80V
l
ITMR
TMR Pin Pull-Up Current
VTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 0.5V
VTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 75V
VTMR = 1.3V, VFB = 1.5V
VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 0.5V
VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 80V
l
l
l
l
l
–1.5
–44
–3.5
–2.5
–195
TMR Pin Pull-Down Current
VTMR = 1V, VFB = 1V, ΔVSNS = 0V
l
VTMR
TMR Pin Thresholds
FLT From High to Low, VCC = 5V to 80V
VGATE From Low to High, VCC = 5V to 80V
l
l
ΔVTMR
Early Warning Period
From FLT Going Low to GATE Going Low, VCC = 5V to 80V
l
80
VIN+
IN+ Pin Threshold
l
1.22
IIN
IN+ Pin Input Current
VOL
+
+ = 1.25V
mA
mA
mA
22
μA
2.5
4.5
μA
μA
–2.5
–50
–5.5
–4.5
–260
–4
–56
–8.5
–6.5
–315
μA
μA
μA
μA
μA
1.5
2.2
2.7
μA
1.22
0.48
1.25
0.5
1.28
0.52
V
V
100
120
mV
1.25
1.28
V
VIN
l
0.3
1
μA
FLT, EN Pins Output Low
ISINK = 2mA
ISINK = 0.1mA
l
l
2
300
8
800
V
mV
AOUT Pin Output Low
ISINK = 2mA
ISINK = 0.1mA
l
l
2
200
8
400
V
mV
4356mp12fb
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LT4356MP-1/LT4356MP-2
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IOUT
OUT Pin Input Current
VOUT = VCC = 12V
VOUT = VCC = 12V, VSHDN = 0V
l
l
ΔVOUT
OUT Pin High Threshold
ΔVOUT = VCC – VOUT; EN from Low to High
l
VSHDN
SHDN Pin Threshold
VCC = 12V to 48V
VSHDN(FLT) SHDN Pin Float Voltage
MIN
TYP
MAX
UNITS
200
6
300
14
μA
mA
0.25
0.5
0.7
V
l
0.6
0.4
1.4
1.7
2.1
V
V
VCC = 12V to 48V
l
0.6
1.2
2.1
V
ISHDN
SHDN Pin Current
VSHDN = 0V
l
–1
–4
–8
μA
tOFF(OC)
Overcurrent Turn-Off Delay Time
GATE from High to Low, ΔVSNS = 0 → 120mV
l
2
4
μs
GATE from High to Low, VFB = 0 → 1.5V
l
0.25
1
μs
Overvoltage Turn-Off Delay Time
tOFF(OV)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 3: An internal clamp limits the GATE pin to a minimum of 10V above
the OUT pin. Driving this pin to voltages beyond the clamp may damage
the device.
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C unless otherwise noted.
ICC (Shutdown) vs VCC
ICC vs VCC
1000
60
400
200
LT4356-1
50
100
40
80
ICC (μA)
600
ICC (μA)
ICC (μA)
800
ICC (Shutdown) vs VCC
120
30
0
10
20
30
40 50
VCC (V)
60
70
80
4356mp12 G01
60
20
40
10
20
0
0
0
10
20
30
40 50
VCC (V)
60
70
80
4356mp12 G02
LT4356-2
IN+ = 1.3V
0
0
10
20
30
40 50
VCC (V)
60
70
80
4356mp12 G03
4356mp12fb
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LT4356MP-1/LT4356MP-2
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C unless otherwise noted.
300
30
20
ICC (μA)
ICC (μA)
25
15
10
25
75
0
50
TEMPERATURE (°C)
100
LT4356-2
250
5
200
4
150
2
50
1
0
–50
125
0
50
25
75
TEMPERATURE (°C)
–25
4356mp12 G04
35
35
30
15
20
15
0
20
30
40 50
VCC (V)
60
70
0
–50
80
140
100
125
100
–50
ΔVGATE (V)
6
4
2
100
125
4356mp12 G10
–25
0
50
25
75
TEMPERATURE (°C)
12
12
10
10
8
6
2
2
4
6
10
IGATE (μA)
8
12
14
16
4356mp12 G11
VCC = 8V
6
4
0
IGATE = –1μA
8
4
2
125
ΔVGATE vs Temperature
14
VOUT = 12V
0
100
4356mp12 G09
ΔVGATE vs IGATE
8
0
50
25
75
TEMPERATURE (°C)
25
75
0
50
TEMPERATURE (°C)
14
OVERCURRENT CONDITION
ΔVSNS = 120mV
–25
160
4356mp12 G08
10
0
–50
–25
4356mp12 G07
GATE Pull-Down Current
vs Temperature
12
OVERVOLTAGE CONDITION
VFB = 1.5V
180
ΔVGATE (V)
10
125
120
5
5
100
200
10
10
220
VGATE = VOUT = 12V
IGATE(DOWN) (mA)
20
0
50
25
75
TEMPERATURE (°C)
GATE Pull-Down Current
vs Temperature
25
IGATE (μA)
IGATE (μA)
30
25
–25
4356mp12 G06
GATE Pull-Up Current
vs Temperature
40
0
0
–50
125
4356mp12 G05
GATE Pull-Up Current vs VCC
IGATE(DOWN) (mA)
100
VSHDN = 0V
3
100
5
–25
6
ISHDN (μA)
LT4356-1
0
–50
SHDN Current vs Temperature
ICC (Shutdown) vs Temperature
ICC (Shutdown) vs Temperature
35
0
–50
VCC = 4V
–25
0
50
25
75
TEMPERATURE (°C)
100
125
4356mp12 G12
4356mp12fb
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LT4356MP-1/LT4356MP-2
TYPICAL PERFORMANCE CHARACTERISTICS
Overvoltage TMR Current
vs (VCC – VOUT)
ΔVGATE vs VCC
48
16
12
280
OVERVOLTAGE CONDITION
VOUT = 5V
40 VTMR = 1V
TA = 130°C
14
OVERCURRENT CONDITION
VOUT = 0V
240 VTMR = 1V
TA = –45°C
200
32
TA = 25°C
8
6
ITMR (μA)
10
ITMR (μA)
ΔVGATE (V)
Overcurrent TMR Current
vs (VCC – VOUT)
24
16
8
60
70
0
80
10
20
30 40 50
VCC – VOUT (V)
60
4356mp12 G13
70
0
80
0
TMR Pull-Down Current
vs Temperature
3.0
14
OVERVOLTAGE, EARLY
WARNING PERIOD
12 VFB = 1.5V
VTMR = 1.3V
10
10
20
4356mp12 G14
30 40 50
VCC – VOUT (V)
60
70
80
4356mp12 G15
Output Low Voltage vs Current
4.0
VTMR = 1V
3.5
2.5
AOUT
3.0
ITMR (μA)
2.0
8
6
2.5
VOL (V)
40 50
VCC (V)
Warning Period
TMR Current vs VCC
ITMR (μA)
40
0
30
120
80
4
2 I
GATE = –1μA
VOUT = VCC
0
0
10 20
160
1.5
EN
1.5
1.0
4
FLT
2.0
1.0
0.5
2
0
–50
0
0
10
20
30
40 50
VCC (V)
60
70
80
0
–25
0
25
50
75
TEMPERATURE (°C)
4356mp12 G16
100
0
125
0.5
2.0
1.0
1.5
CURRENT (mA)
Overcurrent Turn-Off Time
vs Temperature
4.0
OVERVOLTAGE CONDITION
VFB = 1.5V
2.5
3.0
4356mp12 G18
4356mp12 G17
Overvoltage Turn-Off Time
vs Temperature
500
0.5
Reverse Current
vs Reverse Voltage
–20
OVERCURRENT CONDITION
ΔVSNS = 120mV
VCC = SNS
3.5
400
–15
200
ICC (mA)
300
tOFF (μs)
tOFF (ns)
3.0
2.5
–10
2.0
–5
100
0
–50
1.5
–25
0
25
50
75
TEMPERATURE (°C)
100
125
4356mp12 G19
1.0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
4356mp12 G20
0
0
–20
–40
–60
–80
VCC (V)
4356mp12 G21
4356mp12fb
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LT4356MP-1/LT4356MP-2
PIN FUNCTIONS
AOUT (SO Package Only): Amplifier Output. Open collector
output of the auxiliary amplifier. It is capable of sinking
up to 2mA from 80V. The negative input of the amplifier
is internally connected to a 1.25V reference.
OUT: Output Voltage Sense Input. This pin senses the
voltage at the source of the N-channel MOSFET and sets
the fault timer current. When the OUT pin voltage reaches
0.7V away from VCC, the EN pin goes high impedance.
EN: Open-Collector Enable Output. The EN pin goes high
impedance when the voltage at the OUT pin is above (VCC
– 0.7V), indicating the external MOSFET is fully on. The
state of the pin is latched until the OUT pin voltage resets
at below 0.5V and goes back up above 2V. The internal
NPN is capable of sinking up to 3mA of current from 80V
to drive an LED or opto-coupler.
SHDN: Shutdown Control Input. The LT4356 can be shut
down to a low current mode by pulling the SHDN pin below
0.4V. Pull this pin above 2.1V or disconnect it and allow
the internal current source to turn the part back on. The
leakage current to ground at the pin should be limited to
no more than 1μA if no pull-up device is used to turn the
part on. The SHDN pin can be pulled up to 100V or below
GND by 60V without damage. In shutdown, the auxiliary
amplifier turns off in the LT4356-1 but continues operating
in the LT4356-2.
FB: Voltage Regulator Feedback Input. Connect this pin
to the center tap of the output resistive divider connected
between the OUT pin and ground. During an overvoltage
condition, the GATE pin is servoed to maintain a 1.25V
threshold at the FB pin. This pin is clamped internally to
7V. Tie to GND to disable the OV clamp.
FLT: Open-Collector Fault Output. This pin pulls low
after the voltage at the TMR pin has reached the fault
threshold of 1.25V. It indicates the pass transistor is
about to turn off because either the supply voltage has
stayed at an elevated level for an extended period of
time (voltage fault) or the device is in an overcurrent
condition (current fault). The internal NPN is capable of
sinking up to 3mA of current from 80V to drive an LED or
opto-coupler.
GATE: N-channel MOSFET Gate Drive Output. The GATE pin
is pulled up by an internal charge pump current source and
clamped to 14V above the OUT pin. Both voltage and current amplifiers control the GATE pin to regulate the output
voltage and limit the current through the MOSFET.
GND: Device Ground.
IN+ (SO Package Only): Positive Input of the Auxiliary
Amplifier. This amplifier can be used as a level detection
comparator with external hysteresis or linear regulator
controlling an external PNP transistor. This pin is clamped
internally to 7V. Connect to ground if unused.
SNS: Current Sense Input. Connect this pin to the output of
the current sense resistor. The current limit circuit controls
the GATE pin to limit the sense voltage between VCC and
SNS pins to 50mV. At the same time the sense amplifier
also starts a current source to charge up the TMR pin.
This pin can be pulled below GND by up to 60V, though
the voltage difference with the VCC pin must be limited to
less than 30V. Connect to VCC if unused.
TMR: Fault Timer Input. Connect a capacitor between this
pin and ground to set the times for early warning, fault
and cooldown periods. The current charging up this pin
during fault conditions depends on the voltage difference
between the VCC and OUT pins. When VTMR reaches 1.25V,
the FLT pin pulls low to indicate the detection of a fault
condition. If the condition persists, the pass transistor
turns off when VTMR reaches the threshold of 1.35V. As
soon as the fault condition disappears, the pull-up current
stops and a 2μA current starts to pull the TMR pin down.
When VTMR reaches the retry threshold of 0.5V, the GATE
pin pulls high turning back on the pass transistor.
VCC: Positive Supply Voltage Input. The positive supply
input ranges from 4V to 80V for normal operation. It
can also be pulled below ground potential by up to 60V
during a reverse battery condition, without damaging the
part. The supply current is reduced to 7μA with all the
functional blocks off.
4356mp12fb
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LT4356MP-1/LT4356MP-2
BLOCK DIAGRAM
VCC
GATE
+
–
14V
CHARGE
PUMP
+
OUT
FB
+
50mV
SNS
–
VA
IA
1.25V
–
SHDN
FLT
AOUT
OC
1.25V
AUXILIARY
AMPLIFIER
SHDN
RESTART
OUT
OV
EN
CONTROL
LOGIC
GATEOFF
FLT
–
+
IN+
1.35V
–
VCC
+
0.5V
+
ITMR
–
+
2μA
1.25V
TMR
–
GND
4356mp12 BD
4356mp12fb
8
LT4356MP-1/LT4356MP-2
OPERATION
Some power systems must cope with high voltage surges
of short duration such as those in automobiles. Load
circuitry must be protected from these transients, yet
high availability systems must continue operating during
these events.
The potential at the TMR pin starts decreasing as soon as
the overvoltage condition disappears. When the voltage
at the TMR pin reaches 0.5V the GATE pin begins rising,
turning on the MOSFET. The FLT pin will then go to a high
impedance state.
The LT4356 is an overvoltage protection regulator that
drives an external N-channel MOSFET as the pass transistor. It operates from a wide supply voltage range of 4V to
80V. It can also be pulled below ground potential by up
to 60V without damage. The low power supply requirement of 4V allows it to operate even during cold cranking
conditions in automotive applications. The internal charge
pump turns on the N-channel MOSFET to supply current
to the loads with very little power loss. Two MOSFETs can
be connected back to back to replace an inline Schottky
diode for reverse input protection. This improves the efficiency and increases the available supply voltage level
to the load circuitry during cold crank.
The fault timer allows the load to continue functioning
during short transient events while protecting the MOSFET
from being damaged by a long period of supply overvoltage, such as a load dump in automobiles. The timer period
varies with the voltage across the MOSFET. A higher voltage
corresponds to a shorter fault timer period, ensuring the
MOSFET operates within its safe operating area (SOA).
Normally, the pass transistor is fully on, powering the
loads with very little voltage drop. When the supply voltage surges too high, the voltage amplifier (VA) controls
the gate of the MOSFET and regulates the voltage at the
source pin to a level that is set by the external resistive
divider from the OUT pin to ground and the internal 1.25V
reference. A current source starts charging up the capacitor connected at the TMR pin to ground. If the voltage at
the TMR pin, VTMR, reaches 1.25V, the FLT pin pulls low
to indicate impending turn-off due to the overvoltage
condition. The pass transistor stays on until the TMR
pin reaches 1.35V, at which point the GATE pin pulls low
turning off the MOSFET.
The LT4356 senses an overcurrent condition by monitoring the voltage across an optional sense resistor placed
between the VCC and SNS pins. An active current limit
circuit (IA) controls the GATE pin to limit the sense voltage to 50mV. A current is also generated to start charging
up the TMR pin. This current is about 5 times the current
generated during an overvoltage event. The FLT pin pulls
low when the voltage at the TMR pin reaches 1.25V and
the MOSFET is turned off when it reaches 1.35V.
An auxiliary amplifier is provided with the negative input
connected to an internal 1.25V reference. The output pulldown device is capable of sinking up to 2mA of current
allowing it to drive an LED or opto coupler. This amplifier
can be configured as a linear regulator controller driving
an external PNP transistor or a comparator function to
monitor voltages.
A shutdown pin turns off the pass transistor and reduces
the supply current to less than 7μA for the LT4356-1. The
supply current drops down to 60μA while keeping the
internal reference and the auxiliary amplifier active for the
LT4356-2 version during shutdown.
4356mp12fb
9
LT4356MP-1/LT4356MP-2
APPLICATIONS INFORMATION
The LT4356 can limit the voltage and current to the load
circuitry during supply transients or overcurrent events.
The total fault timer period should be set to ride through
short overvoltage transients while not causing damage
to the pass transistor. The selection of this N-channel
MOSFET pass transistor is critical for this application.
It must stay on and provide a low impedance path from
the input supply to the load during normal operation and
then dissipate power during overvoltage or overcurrent
conditions.
The following sections describe the overcurrent and the
overvoltage faults, and the selection of the timer capacitor
value based on the required warning time. The selection
of the N-channel MOSFET pass transistor is discussed
next. Auxiliary amplifier, reverse input, and the shutdown
functions are covered after the MOSFET selection. External
component selection is discussed in detail in the Design
Example section.
Overvoltage Fault
The LT4356 limits the voltage at the OUT pin during an
overvoltage situation. An internal voltage amplifier regulates the GATE pin voltage to maintain a 1.25V threshold at
the FB pin. During this period of time, the power MOSFET
is still on and continues to supply current to the load. This
allows uninterrupted operation during short overvoltage
transient events.
When the voltage regulation loop is engaged for longer
than the time-out period, set by the timer capacitor connected from the TMR pin to ground, an overvoltage fault is
detected. The GATE pin is pulled down to the OUT pin by a
150mA current. After the fault condition has disappeared
and a cooldown period has transpired, the GATE pin starts
to pull high again. This prevents the power MOSFET from
being damaged during a long period of overvoltage, such
as during load dump in automobiles.
Overcurrent Fault
The LT4356 features an adjustable current limit that
protects against short circuits or excessive load current.
During an overcurrent event, the GATE pin is regulated to
limit the current sense voltage across the VCC and SNS
pins to 50mV.
An overcurrent fault occurs when the current limit circuitry
has been engaged for longer than the time-out delay set
by the timer capacitor. The GATE pin is then immediately
pulled low by a 10mA current to GND turning off the
MOSFET. After the fault condition has disappeared and a
cooldown period has transpired, the GATE pin is allowed
to pull back up and turn on the pass transistor.
Fault Timer
The LT4356 includes an adjustable fault timer pin. Connecting a capacitor from the TMR pin to ground sets the
delay timer period before the MOSFET is turned off. The
same capacitor also sets the cooldown period before the
MOSFET is allowed to turn back on after the fault condition has disappeared.
Once a fault condition, either overvoltage or overcurrent,
is detected, a current source charges up the TMR pin. The
current level varies depending on the voltage drop across
the drain and source terminals of the power MOSFET(VDS),
which is typically from the VCC pin to the OUT pin. This
scheme takes better advantage of the available Safe
Operating Area (SOA) of the MOSFET than would a fixed
timer current. The timer function operates down to VCC =
5V across the whole temperature range.
4356mp12fb
10
LT4356MP-1/LT4356MP-2
APPLICATIONS INFORMATION
Fault Timer Current
The timer current starts at around 2μA with 0.5V or less
of VDS, increasing linearly to 50μA with 75V of VDS during an overvoltage fault (Figure 1). During an overcurrent
fault, it starts at 4μA with 0.5V or less of VDS but increases
to 260μA with 80V across the MOSFET (Figure 2). This
arrangement allows the pass transistor to turn off faster
during an overcurrent event, since more power is dissipated
during this condition. Refer to the Typical Performance
Characteristics section for the timer current at different
VDS in both overvoltage and overcurrent events.
When the voltage at the TMR pin, VTMR, reaches the 1.25V
threshold, the FLT pin pulls low to indicate the detection
of a fault condition and provide warning to the load of
the impending power loss. In the case of an overvoltage
fault, the timer current then switches to a fixed 5μA. The
interval between FLT asserting low and the MOSFET turning off is given by:
t WARNING =
CTMR • 100mV
5μA
VTMR(V)
ITMR = 5μA
ITMR = 5μA
1.35
1.25
VDS = 75V
(ITMR = 50μA)
VDS = 10V
(ITMR = 8μA)
0.50
TIME
tFLT
= 15ms/μF
tWARNING
= 20ms/μF
tFLT = 93.75ms/μF
tWARNING
= 20ms/μF
TOTAL FAULT TIMER = tFLT + tWARNING
4356mp12 F01
Figure 1. Overvoltage Fault Timer Current
VTMR(V)
1.35
1.25
VDS = 80V
(ITMR = 260μA)
0.50
tFLT
= 2.88ms/μF
VDS = 10V
(ITMR = 35μA)
TIME
tWARNING
= 0.38ms/μF
tFLT = 21.43ms/μF
TOTAL FAULT TIMER = tFLT + tWARNING
tWARNING
= 2.86ms/μF
4356mp12 F02
Figure 2. Overcurrent Fault Timer Current
4356mp12fb
11
LT4356MP-1/LT4356MP-2
APPLICATIONS INFORMATION
This fixed early warning period allows the systems to perform necessary backup or house-keeping functions before
the power supply is cut off. After VTMR crosses the 1.35V
threshold, the pass transistor turns off immediately. Note
that during an overcurrent event, the timer current is not
reduced to 5μA after VTMR has reached 1.25V threshold,
since it would lengthen the overall fault timer period and
cause more stress on the power MOSFET.
As soon as the fault condition has disappeared, a 2μA
current starts to discharge the timer capacitor to ground.
When VTMR reaches the 0.5V threshold, the internal charge
pump starts to pull the GATE pin high, turning on the
MOSFET. The TMR pin is then actively regulated to 0.5V
until the next fault condition appears. The total cooldown
timer period is given by:
tCOOL
C
• 0.85V
= TMR
2μA
MOSFET Selection
The LT4356 drives an N-channel MOSFET to conduct the
load current. The important features of the MOSFET are
on-resistance RDS(ON), the maximum drain-source voltage
V(BR)DSS, the threshold voltage, and the SOA.
The maximum allowable drain-source voltage must be
higher than the supply voltage. If the output is shorted
to ground or during an overvoltage event, the full supply
voltage will appear across the MOSFET.
The gate drive for the MOSFET is guaranteed to be more
than 10V and less than 16V for those applications with VCC
higher than 8V. This allows the use of standard threshold
voltage N-channel MOSFETs. For systems with VCC less
than 8V, a logic level MOSFET is required since the gate
drive can be as low as 4.5V.
The SOA of the MOSFET must encompass all fault conditions. In normal operation the pass transistor is fully on,
dissipating very little power. But during either overvoltage
or overcurrent faults, the GATE pin is servoed to regulate either the output voltage or the current through the
MOSFET. Large current and high voltage drop across the
MOSFET can coexist in these cases. The SOA curves of
the MOSFET must be considered carefully along with the
selection of the fault timer capacitor.
Transient Stress in the MOSFET
During an overvoltage event, the LT4356 drives a series
pass MOSFET to regulate the output voltage at an acceptable
level. The load circuitry may continue operating throughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
Most transient event specifications use the model shown
in Figure 3. The idealized waveform comprises a linear
ramp of rise time tr, reaching a peak voltage of VPK and
exponentially decaying back to VIN with a time constant
of t. A common automotive transient specification has
constants of tr = 10μs, VPK = 80V and τ = 1ms. A surge
condition known as “load dump” has constants of tr =
5ms, VPK = 60V and τ = 200ms.
VPK
T
VIN
tr
4356mp12 F03
Figure 3. Prototypical Transient Waveform
4356mp12fb
12
LT4356MP-1/LT4356MP-2
APPLICATIONS INFORMATION
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heatsink
thermal mass. This is analyzed by simulation, using the
MOSFET thermal model.
For short duration transients of less than 100ms, MOSFET
survival is increasingly a matter of safe operating area
(SOA), an intrinsic property of the MOSFET. SOA quantifies the time required at any given condition of VDS and
ID to raise the junction temperature of the MOSFET to its
rated maximum. MOSFET SOA is expressed in units of
watt-squared-seconds (P2t). This figure is essentially constant for intervals of less than 100ms for any given device
type, and rises to infinity under DC operating conditions.
Destruction mechanisms other than bulk die temperature
distort the lines of an accurately drawn SOA graph so that
P2t is not the same for all combinations of ID and VDS.
In particular P2t tends to degrade as VDS approaches the
maximum rating, rendering some devices useless for
absorbing energy above a certain voltage.
Calculating Transient Stress
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
which shall not interrupt operation. It is then a simple matter
to chose a device which has adequate SOA to survive the
maximum calculated stress. P2t for a prototypical transient
waveform is calculated as follows (Figure 4).
Let
a = VREG – VIN
b = VPK – VIN
(VIN = Nominal Input Voltage)
Then
3
⎡
⎞⎤⎥
1 ⎛ 2 b
2
2
2
2 ⎢ 1 (b – a )
P t = ILOAD
tr
+ τ ⎜2a ln + 3a +b − 4ab⎟
⎠⎥⎦
⎢⎣ 3
b
2 ⎝
a
VPK
T
VREG
VIN
tr
4356mp12 F04
Figure 4. Safe Operating Area Required to Survive Prototypical
Transient Waveform
Typically VREG ≈ VIN and τ >> tr simplifying the above to
P2 t =
1
2
ILOAD 2 ( VPK – VREG ) τ
2
(W 2s)
For the transient conditions of VPK = 80V, VIN = 12V, VREG
= 16V, tr = 10μs and τ = 1ms, and a load current of 3A, P2t
is 18.4W2s—easily handled by a MOSFET in a D-pak package. The P2t of other transient waveshapes is evaluated by
integrating the square of MOSFET power versus time.
Calculating Short-Circuit Stress
SOA stress must also be calculated for short-circuit conditions. Short-circuit P2t is given by:
P2t = (VIN • ΔVSNS/RSNS)2 • tTMR
(W2s)
where, ΔVSNS is the SENSE pin threshold, and tTMR is the
overcurrent timer interval.
For VIN = 14.7V, VSNS = 50mV, RSNS = 12mΩ and CTMR
= 100nF, P2t is 6.6W2s—less than the transient SOA
calculated in the previous example. Nevertheless, to
account for circuit tolerances this figure should be doubled
to 13.2W2s.
Limiting Inrush Current and GATE Pin Compensation
The LT4356 limits the inrush current to any load capacitance
by controlling the GATE pin voltage slew rate. An external
capacitor can be connected from GATE to ground to slow
down the inrush current further at the expense of slower
turn-off time. The gate capacitor is set at:
C1 =
IGATE(UP)
IINRUSH
• CL
4356mp12fb
13
LT4356MP-1/LT4356MP-2
APPLICATIONS INFORMATION
The LT4356 does not need extra compensation components at the GATE pin for stability during an overvoltage or
overcurrent event. With transient input voltage step faster
than 5V/μs, a gate capacitor, C1, to ground is needed to
prevent self enhancement of the N-channel MOSFET.
The extra gate capacitance slows down the turn-off time
during fault conditions and may allow excessive current
during an output short event. An extra resistor, R1, in series
with the gate capacitor can improve the turn-off time. A
diode, D1, should be placed across R1 with the cathode
connected to C1 as shown in Figure 5.
The amplifier can also be configured as a low dropout
linear regulator controller. With an external PNP transistor,
such as 2N2905A, it can supply up to 100mA of current
with only a few hundred mV of dropout voltage. Current
limit can be easily included by adding two diodes and one
resistor (Figure 6).
RLIM
*4.7Ω
INPUT
2N2905A OR
BCP53
10μF
R6
100k
* OPTIONAL FOR
CURRENT LIMIT
D1*
BAV99
11
AOUT
Q1
LT4356S
D1
IN4148W
2.5V OUTPUT
≈ 150mA MAX
VOUT 1.25
R4
249k
12
IN+
4356 F06
R3
47nF
ILIM z
R4 R5
R5
0.7
RLIM
R5
249k
R1
C1
GATE
LT4356S
Figure 6. Auxiliary LDO Output with Optional Current Limit
Reverse Input Protection
4356mp F05
Figure 5
Auxiliary Amplifier
An uncommitted amplifier is included in the LT4356 to
provide flexibility in the system design. With the negative
input connected internally to the 1.25V reference, the amplifier can be connected as a level detect comparator with
external hysteresis. The open collector output pin, AOUT,
is capable of driving an opto or LED. It can also interface
with the system via a pull-up resistor to a supply voltage
up to 80V. Another use is to implement undervoltage
lockout, as shown in the typical application “Overvoltage
Regulator with Undervoltage Lockout.” In shutdown, the
auxiliary amplifier turns off in the LT4356-1 but continues
operating in the LT4356-2.
A blocking diode is commonly employed when reverse
input potential is possible, such as in automotive applications. This diode causes extra power loss, generates heat,
and reduces the available supply voltage range. During
cold crank, the extra voltage drop across the diode is
particularly undesirable.
The LT4356 is designed to withstand reverse voltage
without damage to itself or the load. The VCC, SNS, and
SHDN pins can withstand up to 60V of DC voltage below
the GND potential. Back-to-back MOSFETs must be used
to eliminate the current path through their body diodes
(Figure 7). Figure 8 shows the approach with a P-channel
MOSFET in place of Q2.
4356mp12fb
14
LT4356MP-1/LT4356MP-2
APPLICATIONS INFORMATION
RSNS
10mΩ
VIN
12V
Q2
IRLR2908
D2*
SMAJ58CA
R4 R5
10Ω 1M
Q3
2N3904
VOUT
12V, 3A
CLAMPED
AT 16V
R3
10Ω
R1
59k
D1
1N4148
8
Shutdown
Q1
IRLR2908
R7
10k
7
SNS
4
OUT
5
GATE
VCC
FB
2
R2
4.99k
LT4356S
9
14
16
SHDN
FLT
AOUT
IN+
GND
EN
TMR
12
1
*DIODES INC.
10
RSNS
10mΩ
Q2
Si4435
Supply Transient Protection
4356mp12 F07
CTMR
0.1μF
Q1
IRLR2908
VOUT
12V, 3A
CLAMPED
AT 16V
D1
1N5245
15V
D2*
SMAJ58CA
R3
10Ω
R6
10k
7
SNS
8
5
GATE
The LT4356 is guaranteed to be safe from damage with
supply voltages up to 100V. Nevertheless, voltage transients above 100V may cause permanent damage. During
a short-circuit condition, the large change in current flowing
through power supply traces and associated wiring can
cause inductive voltage transients which could exceed
100V. To minimize the voltage transients, the power trace
parasitic inductance should be minimized by using wide
traces. A small surge suppressor, D2, in Figure 9, at the
input will clamp the voltage spikes.
R1
59k
4
OUT
FB
VCC
The SHDN pin can be pulled up to VCC or below GND by
up to 60V without damaging the pin. Leaving the pin open
allows an internal current source to pull it up and turn
on the part while clamping the pin to 2.5V. The leakage
current at the pin should be limited to no more than 1μA
if no pull-up device is used to help turn it on.
11
Figure 7. Overvoltage Regulator with N-channel MOSFET
Reverse Input Protection
VIN
12V
The LT4356 can be shut down to a low current mode when
the voltage at the SHDN pin goes below the shutdown
threshold of 0.6V. The quiescent current drops to 7μA for
the LT4356-1 and 60μA for the LT4356-2 which leaves the
auxiliary amplifier on.
RSNS
10mΩ
VIN
CL*
22μF
D2
SMAJ58A
2
R2
4.99k
9
14
16
LT4356S
8
SHDN
FLT
AOUT
IN+
GND
12
*DIODES INC.
EN
TMR
1
Q1
IRLR2908
10
R4
383k
11
4356mp12 F08
CTMR
0.1μF
9
16
VCC
FB
UNDERVOLTAGE
IN+
R2
4.99k
LT4356S
EN
AOUT
GND
12
Figure 8. Overvoltage Regulator with P-channel MOSFET
Reverse Input Protection
2
SHDN
R5
100k
14
R1
59k
R3
10Ω
7
5
4
SNS GATE OUT
TMR
1
FLT
11
10
VCC
DC-DC
CONVERTER
SHDN GND
FAULT
4356mp12 F09
*SANYO 25CE22GA
CTMR
47nF
Figure 9. Overvoltage Regulator with Low-Battery Detection
4356mp12fb
15
LT4356MP-1/LT4356MP-2
APPLICATIONS INFORMATION
A total bulk capacitance of at least 22μF low ESR electrolytic is required close to the source pin of MOSFET Q1. In
addition, the bulk capacitance should be at least 10 times
larger than the total ceramic bypassing capacitor on the
input of the DC/DC converter.
Layout Considerations
To achieve accurate current sensing, Kelvin connection
to the current sense resistor (RSNS in Figure 9) is recommended. The minimum trace width for 1oz copper foil is
0.02" per amp to ensure the trace stays at a reasonable
temperature. 0.03" per amp or wider is recommended.
Note that 1oz copper exhibits a sheet resistance of about
530μΩ/square. Small resistances can cause large errors in
high current applications. Noise immunity will be improved
significantly by locating resistive dividers close to the pins
with short VCC and GND traces.
RSNS =
As a design example, take an application with the following specifications: VCC = 8V to 14V DC with transient up
to 80V, VOUT ≤ 16V, current limit (ILIM) at 5A, low battery
detection at 6V, and 1ms of overvoltage early warning
(Figure 9).
First, calculate the resistive divider value to limit VOUT to
16V during an overvoltage event:
1.25V • (R1 + R2)
=16V
R2
Set the current through R1 and R2 during the overvoltage
condition to 250μA.
1.25V
R2 =
= 5k
250μA
50mV 50mV
=
= 10mΩ
ILIM
5A
CTMR is then chosen for 1ms of early warning time:
CTMR =
1ms • 5μA
= 50nF
100mV
The closest standard value for CTMR is 47nF.
Finally, calculate R4 and R5 for the 6V low battery threshold
detection:
6V =
1.25V • (R4 + R5)
R5
Choose 100k for R5.
R4 =
Design Example
VREG =
Next calculate the sense resistor, RSNS, value:
(6V – 1.25V ) • R5
1.25V
= 380k
Select 383k for R4.
The pass transistor, Q1, should be chosen to withstand
the output short condition with VCC = 14V.
The total overcurrent fault time is:
tOC =
47nF • 0.85V
= 0.878ms
45.5μA
The power dissipation on Q1 equals to:
P=
14V • 50mV
= 70W
10mΩ
These conditions are well within the Safe Operating Area
of IRLR2908.
Choose 4.99k for R2.
R1 =
(16V – 1.25V ) • R2
1.25V
= 58.88k
The closest standard value for R1 is 59k.
4356mp12fb
16
LT4356MP-1/LT4356MP-2
TYPICAL APPLICATIONS
Wide Input Range 5V to 28V Hot Swap with Undervoltage Lockout
RSNS
20mΩ
Q1
SUD50N03-10
VIN
VOUT
100μF
R3
10Ω
R6
118k
C1
47nF
8
VCC
9
14
16
7
SNS
5
GATE
4
OUT
SHDN
FB
2
AOUT
IN+
LT4356S-1
R7
49.9k
FLT
GND
12
TMR
1
EN
10
11
4356mp12 TA02
CTMR
1μF
24V Overvoltage Regulator Withstands 150V at VIN
VIN
24V
Q1
IRF640
R9
1k
1W
VOUT
CLAMPED AT 32V
R3
10Ω
5
GATE
7
SNS
8
VCC
FB
D2*
SMAT70A
2
R2
4.99k
9
10
11
LT4356S
SHDN
FLT
EN
GND
12
*DIODES INC.
R1
118k
4
OUT
TMR
1
4356mp12 TA03
CTMR
0.1μF
4356mp12fb
17
LT4356MP-1/LT4356MP-2
TYPICAL APPLICATIONS
Overvoltage Regulator with Undervoltage Lockout
RSNS
20mΩ
Q1
IRLR2908
VOUT
CLAMPED AT 16V
VIN
D2*
SMAJ58A
R6
280k
R4
1M
9
R5
1M
14
16
8
7
VCC
SNS
R3
10Ω
5
GATE
R1
59k
4
OUT
SHDN
FB
2
R2
4.99k
AOUT
+
LT4356S-2
IN
R7
100k
FLT
GND
*DIODES INC.
EN
TMR
12
10
11
4356mp12 TA04
1
CTMR
0.1μF
Overvoltage Regulator with Low Battery Detection and Output Keep Alive During Shutdown
1k
0.5W
RSNS
10mΩ
VIN
12V
D2*
SMAJ58A
Q1
IRLR2908
R3
10Ω
R4
402k
8
16
R5
105k
9
*DIODES INC.
7
SNS
5
GATE
VOUT
12V, 4A
CLAMPED AT 16V
Q2
VN2222
4
OUT
VCC
FB
LT4356S
AOUT
FLT
SHDN
12
2
R2
VDD
24.9k
R6
47k
IN+
GND
R1
294k
D1
1N4746A
18V
1W
EN
TMR
1
14
LBO
10
11
4356mp12 TA05
CTMR
0.1μF
4356mp12fb
18
LT4356MP-1/LT4356MP-2
TYPICAL APPLICATIONS
2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V and UV Shutdown at 35V
RSNS
15mΩ
VIN
48V
Q1
FDB3632
D2*
SMAT70A
R4
140k
R3
10Ω
VOUT
48V
2.5A
R6
100k
CL
300μF
C1
6.8nF
8
VCC
D1
1N4714
BV = 33V
9
7
5
SNS GATE
4
OUT
16
IN+
SHDN
R5
4.02k
R8
47k
LT4356S
10
11
R7
1M
FB
R1
226k
2
R2
4.02k
FLT
EN
GND
*DIODES INC.
AOUT
TMR
12
1
14
PWRGD
4356mp12 TA06
CTMR
0.1μF
2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V and UV Shutdown at 15V
RSNS
15mΩ
VIN
28V
Q1
FDB3632
D2*
SMAT70A
R4
113k
R3
10Ω
VOUT
28V
2.5A
R6
27k
CL
300μF
C1
6.8nF
D1
1N4700
BV = 13V
9
8
VCC
7
5
SNS GATE
4
OUT
16
IN+
SHDN
R5
4.02k
R8
47k
LT4356S
10
11
*DIODES INC.
FB
2
R1
110k
R2
4.02k
FLT
EN
R7
1M
GND
12
TMR
1
AOUT
14
PWRGD
4356mp12 TA07
CTMR
0.1μF
4356mp12fb
19
LT4356MP-1/LT4356MP-2
TYPICAL APPLICATIONS
Overvoltage Regulator with Reverse Input Protection Up to –80V
RSNS
10mΩ
Q2
IRLR2908
VIN
12V
Q3
2N3904
D2*
R4 SMAJ58CA
10Ω
R5
1M
8
D1
1N4148
Q1
IRLR2908
R7
10k
R3
10Ω
5
GATE
7
SNS
VCC
VOUT
12V, 3A
CLAMPED
AT 16V
4
OUT
FB
2
R1
59k
R2
4.99k
D3**
IN4148
LT4356S
9
14
16
SHDN
FLT
AOUT
IN+
* DIODES INC.
** OPTIONAL COMPONENT FOR
REDUCED STANDBY CURRENT
GND
12
EN
TMR
1
10
11
4356mp12 TA08
CTMR
0.1μF
4356mp12fb
20
LT4356MP-1/LT4356MP-2
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.497 ± 0.076
(.0196 ± .003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS) 0307 REV E
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
4356mp12fb
21
LT4356MP-1/LT4356MP-2
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.386 – .394
(9.804 – 10.008)
NOTE 3
.045 p.005
.050 BSC
16
N
15
14
13
12
11
10
9
N
.245
MIN
.160 p.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
1
.030 p.005
TYP
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
1
.010 – .020
s 45o
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
2
3
4
5
.053 – .069
(1.346 – 1.752)
NOTE:
1. DIMENSIONS IN
.014 – .019
(0.355 – 0.483)
TYP
7
8
.004 – .010
(0.101 – 0.254)
0o – 8o TYP
.016 – .050
(0.406 – 1.270)
6
.050
(1.270)
BSC
S16 0502
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4356mp12fb
22
LT4356MP-1/LT4356MP-2
REVISION HISTORY
(Revision history begins at Rev A)
REV
DATE
DESCRIPTION
PAGE NUMBER
A
05/10
Revised Features and Description
1
Added parameters to VOL in the Electrical Characteristics section
3
Rearranged Typical Performance Characteristics
4
Revised Pin Functions section
7
Made minor text edits to the Operation section
Replaced Figure 6 and text edits in the Applications Information section
B
01/12
Revised Max value for IGATE(UP) current at VCC = 12V
Correct part number
9
13-20
3
10, 14
4356mp12fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT4356MP-1/LT4356MP-2
TYPICAL APPLICATION
Overvoltage Regulator with Linear Regulator Up to 100mA
Q2
2N2905A
2.5V, 100mA
RSNS
10mΩ
VIN
12V
Q1
IRLR2908
D2*
SMAJ58A
8
VOUT
12V, 3A
CLAMPED AT 16V
R3
10Ω
5
GATE
7
SNS
R6
100k
C5
10μF
R1
59k
4
OUT
VCC
FB
2
R2
4.99k
14
9
LT4356S
AOUT
16
IN+
SHDN
FLT
*DIODES INC.
GND
12
TMR
1
EN
10
R4
249k
C3
47nF
R5
249k
11
4356mp12 TA09
CTMR
0.1μF
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Positive High Voltage Hot Swap Controller with
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Ideal MOSFET ORing Diode
External N-channel MOSFETs Replace ORing Diodes, 0V to 18V Operation
LTC4354
Negative Voltage Diode-OR Controller
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Hot Swap, No RSENSE and ThinSOT are trademarks of Linear Technology Corporation.
4356mp12fb
24
Linear Technology Corporation
LT 0112 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2009