80387DX Math Coprocessor 80387 Memory Logic Diagram FEATURES: DESCRIPTION: • 80-Bit numeric processor • RAD-PAK® radiation hardened against natural space radiation • Total dose hardness: - > 100 krad (Si) - dependant upon space mission • Single Event Effects: - SEU Threshold is ~ 3.38 MeV/mg/cm2 - SEL Threshold = 37.1 - 59.9 MeV/mg/cm2 • Package: 68-pin RAD-PA® quad flat pack • Eight 80-bit numeric registers, usable as individual addressable general registers or as a register stack • Data types include: - 32-, 64-, 80-bit floating point - 32-, 64-bit integers - 18-digit BCD operands • 5 V Only power • Built-in exception handling • Upward object code compatible with All 80X87DX microprocessors • Full-range transcendental operations for SINE, COSINE, TANGENT, ARCTANGENT and LOGARITHM Maxwell's 80387DX high speed microcircuit features a greater than 100 kilorad (Si) total dose tolerance. Using Maxwell's radiation hardened RAD-PAK® packaging technology, the 80387DX is a high-performance numerics processor that extends the 80386DX architecture with floating point, extended integer and BCD data types. The computing system fully conforms to the ANSI/IEEE floating-point standard. Using a numerics oriented architecture, the 80387DX adds over seventy mnemonics to the 80386DX instruction set, making the 80386DX/80387DX a complete solution for high-performance numerics processing. Maxwell Technologies' patented RAD-PAK packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S. 05.07.02 REV 1 (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com All data sheets are subject to change without notice 1 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor TABLE 1. PINOUT DESCRIPTION PIN SYMBOL DESCRIPTION 1, 12, 19, 21, 35, 49, 53, 56 VSS Ground 2, 13, 20, 32, 36, 39, 52, 68 VCC Positive Power Supply 3-11, 18, 22-31, 33, 34, 37, D4-D12, D15, D16-25, D26, D27, Data Bus 38, 40, 41, 64-67 D28, D29, D30, D31, D0-D3 CKM Clock Mode 43 386CLK2 386 CPU Clock 2 44 387CLK2 387 MCP Clock 2 45 RESETIN System Reset 46 NC Not Connected 47 59 Tie High Tie High 48 READY Bus Ready Input 50 CMD0 Command 51 ADS Address Strobe 54 NPS2 MCP Select #2 55 NPS1 MCP Select #1 57 W/R Write/Read 58 STEN Status Enable 60 READYO Ready Output 61 BUSY Busy Status 62 ERROR Error Status 63 PEREQ Processor Extension Request Memory 42 TABLE 2. ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN MAX UNIT Voltage, any pin, with respect to Ground VCC -0.5 VCC+0.5 V Power Dissipation PD -- 1.5 W Storage Temperature Range TS -65 150 °C Operating Temperature Range TA -55 125 °C -- 260 °C Lead Temperature (soldering 10 seconds) 05.07.02 REV 1 All data sheets are subject to change without notice 2 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor TABLE 3. DELTA LIMITS PARAMETER VARIATION ILI ± 1.5 µ A ILO ±1.5 µ A ICC CLK2 = 32 MHz ±25 mA ICC CLK2 = 50 MHz ±39 mA TABLE 4. RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN MAX UNIT Supply Voltage VCC 4.75 5.25 V Input Low Voltage VIL -0.3 0.8 V Input High Voltage VIH 2.0 VCC +0.3 V Operating Temperature TA -55 125 °C Memory TABLE 5. 80387DX DC ELECTRICAL CHARACTERISTICS (VCC = 4.75V TO 5.25V; TA = -55 TO +125°C, UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL TEST CONDITIONS MIN MAX UNIT Input Low Voltage VIL1 --- 0.8 -- V Input High Voltage VIH1 2.0 -- V 386 CLK2 Input Low Voltage VCL -- 0.8 V 386 CLK2 Input High Voltage VCH 3.7 -- V Output Low Voltage VOL IOL = 4 mA, D0-D31, IOL = 2.5 mA READYO , ERROR, BUSY, PEREQ -- 0.45 V Output High Voltage VOH IOH = -1 mA, D0-D31, IOH = -0.6 mA READYO, READYO, ERROR, BUSY, PEREQ 2.4 -- V ±15 µA Input Leakage Current ILI 0V < VIN < VCC Output Leakage Current ILO 0.45V < VOUT < VCC -- ±15 µA Power Supply Current ICC CLK2 = 32 MHz CLK2 = 40 MHz CLK2 = 50 MHz2 ---- 250 310 390 mA Input Capacitance3 CIN FC = 1 MHz -- 10 pF CO FC = 1 MHz -- 12 pF CCLK FC = 1 MHz -- 20 pF Output CLK2 Capacitance3 Capacitance3 1. This parameter is for all inputs, including 387CLK2 but excluding 386CLK2. 2. Icc is measured at steady state, maximum capacitive loading on the outputs, and worst-case DC level at the inputs; 386CLK2 at the same frequency as 387CLK2. 3. Guaranteed By Design 05.07.02 REV 1 All data sheets are subject to change without notice 3 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor TABLE 6. 80387DX COMBINATIONS OF BUS INTERFACE AND EXECUTION SPEEDS (VCC = 4.75V TO 5.25V; TA = -55 TO +125°C, UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL TEST CONDITIONS MIN MAX Bus INterface Unit -16 -20 -25 16 20 25 ---- Execution Unit -16 -20 -25 16 20 25 ---- UNIT MHz MHz TABLE 7. 80387DX TIMING REQUIREMENTS OF THE EXECUTION UNIT (VCC = 4.75V TO 5.25V; TA = -55 TO +125°C, UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL t1 387CLK2 High Time -16 -20 -25 t2a 387CLK2 High Time1 -16 -20 -25 t2b 387CLK2 Low Time -16 -20 -25 t3a 387CLK2 Low Time1 -16 -20 -25 t3b 387CLK2 Fall Time1 -16 -20 -25 t4 387CLK2 Rise Time1 -16 -20 -25 1. Guaranteed By Design t5 MIN MAX 31 25 20 125 125 125 9 8 7 ---- 5 5 4 ---- 9 8 7 ---- 7 6 5 ---- ---- 8 8 7 ---- 8 8 7 ns At 2V ns At 2V ns At 3.7V ns At 2V ns At 0.8V ns At 3.7V to 0.8V ns At 0.8V to 3.7V 05.07.02 REV 1 UNIT Memory 387CLK2 Period1 -16 -20 -25 TEST CONDITION All data sheets are subject to change without notice 4 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor TABLE 8. 80387DX TIMING REQUIREMENTS OF THE BUS INTERFACE UNIT (OUTPUT TRIP LEVEL = 1.5V) (VCC = 4.75V TO 5.25V; TA = -55 TO +125°C, UNLESS OTHERWISE SPECIFIED) PARAMETER CONDITIONS At 2.0V 386CLK2 High Time -16 -20 -25 At 2.0V 386CLK2 High Time1 -16 -20 -25 At 3.7V 386CLK2 Low Time -16 -20 -25 At 2V 386CLK2 Low Time1 -16 -20 -25 At 0.8V 386CLK2 Fall Time1 -16 -20 -25 At 3.7V to 0.8V 386CLK2 Rise Time1 -16 -20 -25 At 0.8V to 3.7V PEREQ, ERROR Out Delay -16 -20 -25 CL = 50 pF BUSY Out Delay -16 -20 -25 CL = 50 pF 31 25 20 125 125 125 9 8 7 ---- 5 5 4 ---- 9 8 7 ---- 7 6 5 ---- ---- 8 8 7 ---- 8 8 7 10/16 14/10 4 3 3 34 31 24 5 5 4 34 34 33 5 5 4 34 29 29 ns t2b ns t3a ns t3b ns t4 ns t5 ns -ns t7 ns t7 ns t7 05.07.02 REV 1 UNIT ns t2a -CL = 50 pF MAX t1 386 CLK2/387CLK2 Ratio READYO Out Delay -16 -20 -25 MIN Memory 386CLK2 Period1 -16 -20 -25 SYMBOL All data sheets are subject to change without notice 5 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor TABLE 8. 80387DX TIMING REQUIREMENTS OF THE BUS INTERFACE UNIT (OUTPUT TRIP LEVEL = 1.5V) (VCC = 4.75V TO 5.25V; TA = -55 TO +125°C, UNLESS OTHERWISE SPECIFIED) PARAMETER D31 - D0 Out Delay -16 -20 -25 CONDITIONS CL = 50 pF SYMBOL MIN MAX 1 1 0 54 54 50 UNIT ns t8 D31 - D0 Setup Time t10 11 ns D31 - D0 Hold Delay t11 11 ns CL = 50 pF2 PEREQ, BUSY, ERROR, READYO Float Time1 -16 -20 -25 CL = 50 pF1 ns t12 6 6 5 33 27 24 ns t13 ADS, W/R Setup Time -16 -20 -25 t14 ADS, W/R Hold Time -16 -20 -25 t15 READY SetupTime -16 -20 -25 t16 READY Hold Time -16 -20 -25 t17 CMDO SetupTime -16 -20 -25 t16 CMDO HoldTime -16 -20 -25 t17 NPS1, NPS2 Setup Time -16 -20 -25 t16 05.07.02 REV 1 1 1 1 60 50 40 26 21 16 ---- 5 5 4 ---- 21 12 9 ---- 4 4 4 ---- 21 19 16 ---- 2 4 4 ---- 21 19 16 ---- Memory D31 - D0 Float Time -16 -20 -25 ns ns ns ns ns ns ns All data sheets are subject to change without notice 6 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor TABLE 8. 80387DX TIMING REQUIREMENTS OF THE BUS INTERFACE UNIT (OUTPUT TRIP LEVEL = 1.5V) (VCC = 4.75V TO 5.25V; TA = -55 TO +125°C, UNLESS OTHERWISE SPECIFIED) PARAMETER CONDITIONS SYMBOL t17 STEN Setup Time -16 -20 -25 t16 STEN Hold Time -16 -20 -25 t17 RESETIN Setup Time -16 -20 -25 t18 MAX 2 2 4 ---- 21 21 15 ---- 2 2 4 ---- 13 12 10 ---- 4 4 3 ---- UNIT ns ns ns ns t19 RESETIN Hold Time -16 -20 -25 1. Guaranteed By Design Memory NPS1, NPS2 Hold Time -16 -20 -25 MIN ns 2. Float condition occurs when maximum output current becomes less than ILO in magnitude. Float Delay is not tested. TABLE 9. 80387DX TIMING REQUIREMENT OF OTHER PARAMETER PARAMETER SYMBOL MIN RESETIN Duration t30 40 (387 CLK2) RESETIN Inactive to First Opcode Write t31 50 (387 CLK2) BUSY Duration t32 6 (386 CLK2) ERROR Inactive to BUSY Inactive t33 6 (386 CLK2) PEREQ Inactive to ERROR Active t34 6 (386 CLK2) READY Active to Busy Active t35 4 READY Minimum Time from Opcode Write to Opcode to Opcode/ Operand Write t36 6 (386 CLK2) READY Minimum Time from Operand Write to Operand Write t37 8 (386 CLK2) 05.07.02 REV 1 MAX 4 UNIT (386 CLK2) All data sheets are subject to change without notice 7 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor FIGURE 1. TIMING DIAGRAMS - FAST TRANSITIONS TO AND FROM PIPELINED CYCLES Memory 05.07.02 REV 1 All data sheets are subject to change without notice 8 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor FIGURE 2. TIMING DIAGRAM – NON-PIPELINED READ AND WRITE CYCLES Memory 05.07.02 REV 1 All data sheets are subject to change without notice 9 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor FIGURE 3. TIMING DIAGRAM – PIPLINED CYCLES WITH WAIT STATES Memory FIGURE 4. TIMING DIAGRAM – STEN, BUSY, AND PEREQ TIMING RELATIONSHIP 05.07.02 REV 1 All data sheets are subject to change without notice 10 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor FIGURE 5. TIMING DIAGRAM – 386CLK2/387CLK2 WAVEFORM AND MEASUREMENT POINTS FOR INPUT/ OUTPUT AC SPECIFICATIONS Memory FIGURE 6. TIMING DIAGRAM – TEST CIRCUIT 05.07.02 REV 1 All data sheets are subject to change without notice 11 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor FIGURE 7. TIMING DIAGRAM – RESET 05.07.02 REV 1 Memory FIGURE 8. TIMING DIAGRAM – OUTPUT All data sheets are subject to change without notice 12 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor FIGURE 9. TIMING DIAGRAM – INPUT AND I/O SIGNALS Memory 05.07.02 REV 1 All data sheets are subject to change without notice 13 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor FIGURE 10. TIMING DIAGRAM – FLOAT FROM STEN FIGURE 11. TIMING DIAGRAM – OTHER PARAMETERS Memory 05.07.02 REV 1 All data sheets are subject to change without notice 14 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor Memory 14 PIN RAD-PAK® FLAT PACKAGE SYMBOL DIMENSION MIN NOM MAX A 0.121 0.135 0.145 b 0.016 0.018 0.020 c 0.008 0.010 0.012 D 0.940 0.950 0.960 D1 0.800 BSC e 0.050 BSC S1 0.013 0.066 -- F1 0.645 0.650 0.655 F2 0.645 0.650 0.655 L 0.477 0.487 0.497 A1 0.080 0.090 0.100 N 68 Note: All dimensions in inches. Q68-01 05.07.02 REV 1 All data sheets are subject to change without notice 15 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor Important Notice: These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts. Memory 05.07.02 REV 1 All data sheets are subject to change without notice 16 ©2002 Maxwell Technologies All rights reserved. 80387DX Math Coprocessor Product Ordering Options Model Number 80387DX RP Q X Option Details Feature Monolithic S = Maxwell Class S B = Maxwell Class B E = Engineering (testing @ +25°C) I = Industrial (testing @ -55°C, +25°C, +125°C) Package Q = Quad Flat Pack Radiation Feature RP = RAD-PAK® package Base Product Nomenclature Math Coprocessor 05.07.02 REV 1 All data sheets are subject to change without notice Memory Screening Flow 17 ©2002 Maxwell Technologies All rights reserved.