LTC3444 Micropower Synchronous Buck-Boost DC/DC Converter for WCDMA Applications DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC®3444 is a highly efficient, fixed frequency, buckboost DC/DC converter, which operates from input voltages above, below, and equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for a single Lithium-Ion or multi-cell applications where the output voltage can vary over a wide range. Optimized Features for WCDMA Handsets Regulated Output with Input Voltages Above, Below, or Equal to the Output 0.5V to 5V Output Range Up to 400mA Continuous Output Current From a Single Lithium-Ion Cell Minimal External Components 1.5MHz Fixed Frequency Operation Internal Loop Compensation for Fast Response <25μs Full Scale Output Slewing; COUT 4.7μF Output Disconnect in Shutdown 2.75V to 5.5V Input <1μA Shutdown Current Internal Soft-Start Output Overvoltage Protection Single Inductor, No Schottky Diodes Required Small, Thermally Enhanced 8-Lead (3mm × 3mm) DFN Package The LTC3444 has been optimized for use in 3G WCDMA applications. A unique design yields high efficiency at very low output voltages while also eliminating external components. The high speed error amplifier provides the fast transient response required to slew the RF power amplifier from standby to transmit and transmit to stand by power levels. Output overvoltage protection protects the RF power amplifier. Operating frequency is internally set to 1.5MHz to minimize external component size while maximizing efficiency. U APPLICATIO S ■ ■ WCDMA Applications–3G Handsets with High Speed Data Rate Capability MP3 Players Digital Cameras , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6404251, 6166527. U ■ Other features include <1μA shutdown current, internal soft-start, peak current limit and thermal shutdown. The LTC3444 is available in a small, thermally enhanced 8-lead (3mm × 3mm) DFN package. TYPICAL APPLICATIO 2.2μH LTC3444 Dynamic Response VOUT 0.8V TO 4.2V LTC3444 340k SW1 SW2 VIN VOUT 3.1V TO 4.2V FB GND VC VOUT VCONTROL 4.7μF Li-Ion 1V/DIV + SHDN 4.7μF 205k 267k 10μs/DIV VIN = 3.6V, VOUT = 0.8V TO 4.2V VCONTROL = 2.36V TO 0.28V, ILOAD = 100mA VCONTROL DAC 3444 G16a 3444 TA01 3444fb 1 LTC3444 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) VIN,VOUT Voltages .......................................... –0.3 to 6V SW1,SW2 Voltages DC .................................. –0.3 to 6V Pulsed <100ns ............... –0.3 to 7V SHDN Voltage ................................................ –0.3 to 6V Operating Temperature (Note 2) .............. –40°C to 85°C Maximum Junction Temperature (Note 4) ............ 125°C Storage Temperature Range .................. –65°C to 125°C TOP VIEW SHDN 1 8 SW1 2 7 VC 6 VIN 5 VOUT GND 3 SW2 4 9 ORDER PART NUMBER FB LTC3444EDD DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN DD PART MARKING TJMAX = 125°C, θJA = 43°C/W, 4-LAYER BOARD θJC = 2.96°C/W EXPOSED PAD IS GND (PIN 9) MUST BE SOLDERED TO PCB LBVZ Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VIN = VOUT = 3.6V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS 2.55 2.65 2.75 V 5 V 1.22 1.25 V 1 50 nA Input Start-Up Voltage ● Output Voltage Adjust Range ● 0.5 Feedback Voltage ● 1.19 Feedback Input Current VFB = 1.22V Quiescent Current - Shutdown SD = 0V, VOUT = 0V Not Including Switch Leakage 0.1 1 μA Quiescent Current - Active (Note 3) 700 1100 μA NMOS Switch Leakage Switches B and C 0.1 7 μA PMOS Switch Leakage Switches A and D 0.1 10 μA NMOS Switch On Resistance Switches B and C 0.19 Ω PMOS Switch On Resistance Switches A and D 0.22 Ω PMOS Switch On Resistance Switch D VIN = 3.6, VOUT = 1V 0.4 Ω 3.5 A Input Current Limit ● 2.5 Reverse Current Limit ● 3 ● ● 70 100 Max Duty Cycle Boost (%Switch C On) Buck (% Switch A On) Min Duty Cycle ● Frequency Accuracy ● VC = 1.5V, FB = 0V Error Amp Sink Current VC = 1.5V, FB = 1.5V Internal Soft-Start Time SHDN Going High Output OV Threshold 82 % % 0 1.2 Error Amp AVOL Error Amp Source Current A 1.5 1.8 5.1 MHz 65 dB 8 μA 230 μA μs 250 ● % 5.3 5.5 V 3444fb 2 LTC3444 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VIN = VOUT = 3.6V unless otherwise noted. PARAMETER CONDITIONS SHDN Threshold (On) IC is Enabled ● MIN SHDN Threshold (Off) IC is Disabled ● TYP MAX UNITS 1.4 V 0.4 V SHDN Input Current VSHDN = 3.6V 0.01 1 μA VC Output Current VC = GND 0.5 2 μA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3444E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Current measurements are performed when the outputs are not switching. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. U W TYPICAL PERFOR A CE CHARACTERISTICS Li-Ion to 1V Efficiency Li-Ion to 3.3V Efficiency 90 VOUT = 1.0V 80 75 IOUT = 65mA 70 IOUT = 50mA 60 0.10 40 0.08 VIN = 3.6V 0.06 VIN = 4.4V PLOSS 10 60 3.1 3.3 3.5 3.7 3.9 VIN (V) 4.1 4.5 4.3 VIN = 3.1V 0 1 3444 G03 0.25 40 0.20 30 0.15 VIN = 4.4V 10 PLOSS 1 10 100 OUTPUT CURRENT (mA) 0.10 0.05 VIN = 3.1V 0 30 0.04 20 0.02 10 PLOSS VIN = 3.1V 1 10 100 OUTPUT CURRENT (mA) 0 1000 3444 G04 0 1000 3444 G05 Operating Frequency 1.8 1.7 15 13 11 9 7 0.05 VIN = 3.6V 0 FREQUENCY (MHz) 0.30 E/A SOURCE CURRENT (μA) EFFICIENCY (%) 60 POWER LOSS (W) 0.35 20 0.10 40 17 0.40 VIN = 4.4V 0.15 VIN = 4.4V 50 19 0.45 70 50 0.20 VIN = 3.6V 3444 G06 0.50 VIN = 3.1V 80 60 Error Amp Source Current VIN = 3.6V 90 VIN = 3.1V 70 0 1000 10 100 OUTPUT CURRENT (mA) Li-Ion to 4.2V Efficiency 100 0.12 VIN = 4.4V 30 80 0.14 50 20 65 90 0.25 POWER LOSS (W) EFFICIENCY (%) 70 0.16 POWER LOSS (W) EFFICIENCY (%) IOUT = 100mA VIN = 3.1V 0.18 100 EFFICIENCY (%) Efficiency vs VIN 85 80 (TA = 25°C unless otherwise specified) –25 1.5 1.4 1.3 VC = 1V FB = 0V 5 –55 1.6 35 65 5 TEMPERATURE (°C) 95 125 3444 G07 1.2 –55 –25 0 35 65 TEMPERATURE (°C) 95 125 3444 G08 3444fb 3 LTC3444 U W TYPICAL PERFOR A CE CHARACTERISTICS PMOS RDS(ON) (TA = 25°C unless otherwise specified) Boost Maximum Duty Cycle NMOS RDS(ON) 0.30 0.30 0.25 0.25 90 0.20 85 SWITCH C 0.20 0.15 DUTY CYCLE (%) RDS(ON) (Ω) RDS(ON) (Ω) SWITCH B 75 0.15 0.10 –55 –25 5 35 65 TEMPERATURE (°C) 95 0.10 –55 125 –25 5 35 65 TEMPERATURE (°C) 95 3444 G09 800 370 360 95 700 650 600 1.23 1.22 1.21 1.20 500 –55 125 125 1.24 550 5 35 65 TEMPERATURE (°C) 95 1.25 VIN = VOUT = 3.6V FEEDBACK VOLTAGE (V) 380 5 35 65 TEMPERATURE (°C) Feedback Voltage 750 VIN + VOUT CURRENT (μA) E/A SINK CURRENT (μA) VIN = VOUT = 3.6V VC = 2V, FB = 3.6V 390 –25 3444 G11 Active Quiescent Current 400 –25 70 –55 125 3444 G10 Error Amp Sink Current 350 –55 80 –25 5 65 35 TEMPERATURE (°C) 95 3444 G12 125 3444 G13 1.19 –55 –25 5 35 65 TEMERATURE (°C) 95 125 3444 G14 Minimum Start Voltage 2.85 2.80 START VOLTAGE (V) 2.75 2.70 2.65 2.60 2.55 2.50 2.45 2.40 –55 –25 5 35 65 TEMPERATURE (°C) 95 125 3444 G15 3444fb 4 LTC3444 U U U PI FU CTIO S SHDN (Pin 1): Shutdown Function. A logic low input shuts down the IC. A logic high input enables the IC and starts the internal soft-start function by limiting the rise time of the internal PWM command. VOUT (Pin 5): Output of the Synchronous Rectifier. A filter capacitor is placed from VOUT to GND. A ceramic bypass capacitor is recommended as close to the VOUT and GND pins as possible. SW1 (Pin 2): Switch Pin Where the Internal Switches A and B are Connected. Connect inductor from SW1 to SW2. An optional Schottky diode can be connected from ground to SW1 for a moderate efficiency improvement. Minimize trace length to minimize EMI. VIN (Pin 6): Input Supply Pin. Internal VCC for the IC. A 4.7μF ceramic capacitor is recommended as close to VIN and GND as possible. GND (Pin 3): Ground Pin for the IC. SW2 (Pin 4): Switch Pin Where the Internal Switches C and D are Connected. An optional Schottky diode can be connected from SW2 to VOUT for a moderate efficiency improvement. Minimize trace length to keep EMI down. VC (Pin 7): Error Amp Output. Pull VC to ground to select internal loop compensation. External compensation may be connected from VC to FB. Internal compensation will be disabled if VC is tied to an external compensation network. FB (Pin 8): Feedback Pin. Connect resistive divider tap here. The output voltage can be adjusted from 0.5V to 5V. The feedback reference voltage is typically 1.22V. GND (Pin 9, Exposed Pad): Solder to Board GND. 3444fb 5 LTC3444 W BLOCK DIAGRA SW1 SW2 2 2.75V TO 5.5V VIN 4 A VOUT D 6 B VOUT 5 3A GATE DRIVERS AND ANTI-CROSS CONDUCTION C PEAK REVERSE CURRENT LIMIT OUTPUT OV PWM LOGIC AND OUTPUT PHASING 335k + – 1.22V 100k + – 3.5A + – PEAK CURRENT LIMIT 1.8V PWM COMPARATORS + – + – 2.65V EA UVLO + – 1.22V INTERNAL COMPENSATION THERMAL SHUTDOWN GND = INTERNAL COMP FLOAT = EXTERNAL COMP OSC SOFTSTART THERMAL SHUTDOWN GND 3 FB 8 UVLO VC 7 1 INTERNAL SOFTSTART VIN SHDN VCONTROL 2.5A + – OUTLOW + – + INPUT CURRENT LIMIT 3444 BD 3444fb 6 LTC3444 U OPERATIO The LTC3444 is a highly efficient, fixed frequency, buckboost DC/DC converter, which operates from input voltages above, below, and equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for single Lithium-Ion or multi-cell applications where the output voltage can vary over a wide range. The LTC3444 is designed to provide dynamic voltage control in space constrained 3G WCDMA applications. Due to the high operating frequency and integrated loop compensation a complete WCDMA application requires only six additional components; input and output capacitors (ceramic), an inductor, and three resistors. The high speed error amplifier and integrated loop compensation provide the fast transient response required to slew the RF power amplifier’s voltage rail from standby to transmit and transmit to standby levels in < 25μs while minimizing output overshoot or undershoot. Efficiency under low output voltage conditions (standby mode) is improved by using an N-channel MOSFET in parallel to P-channel MOSFET switch D. This parallel MOSFET eliminates the need for an external Schottky. Output overvoltage protection protects the RF power amplifier from voltages greater than 5.5V. When used with the proper inductance and output capacitance, the LTC3444 internal compensation is designed to be consistent with the transient requirements of a typical WCDMA application. External compensation can be used with other combinations of inductance and output capacitance, however, the transient response may not be consistent with typical WCDMA requirements. Output voltage programming is accomplished via a summing resistor input to the feedback resistive divider string. The output voltage varies inversely with the command voltage. When using the internal loop compensation, resistor R1 in the feedback resistive divider string must be 340k. There are no constraints on R1 when using external compensation. However, lower value resistors will decrease the resistance value required for programming the output voltage. Care must be taken not to load down the control voltage source. 3444fb 7 LTC3444 U OPERATIO Error Amp Internal Current Limit The LTC3444 error amplifier is a voltage mode amplifier. The internal loop compensation is designed to optimize transient response to control input change when the proper output L-C and R1 values are used. Refer to Figure 1. There are two different current limit circuits in the LTC3444. The two circuits have internally fixed thresholds. The first circuit sources current out of the FB pin to drop the output voltage once the peak input current exceeds 2.5A minimum. During conditions where VOUT is near ground, such as during a short circuit or during startup, this threshold is cut in half, providing current foldback protection. Internal loop compensation is selected by grounding the VC pin. The loop is designed to exhibit a single pole roll-off (–20dB/dec) with a crossover frequency of ~100KHz. External compensation can be used by connecting the compensation components from FB to VC. The VC pin must be allowed to float when using external compensation. If external compensation is used the internal compensation is automatically disabled. A Type III compensation network is typically required to meet the output transient requirements of WCDMA. The second circuit is a high-speed peak current limit amplifier that shuts off P-channel MOSFET switch A if the input current exceeds 3.5A typical. The delay to output for this amplifier is typically 50ns. During start-up, the ramp rate of the error amp output is controlled to provide a soft-start function. Refer to Figure 2. VOUT ERROR AMP 20μA TO PWM COMPARATORS + – VC R1 1.22V FB 8 R3 VCONTROL R2 INTERNAL COMPENSATION NETWORK INT ON VOUT VIN 0.5μA VC 7 GND = INTERNAL OPEN = EXTERNAL 3444 F01 Figure 1. Error Amplifier with Compensation Select Function 3444fb 8 LTC3444 U OPERATIO Reverse Current Limit The LTC3444 always operates in forced continuous conduction mode. The reverse current limit amplifier monitors the inductor current from the output through switch D. Once the negative inductor current exceeds 3A minimum, the LTC3444 will shut off switch D. The high reverse current is required to meet the transient slew requirements for WCDMA power amplifiers. Output Overvoltage Protection The LTC3444 provides output overvoltage protection. If the output voltage exceeds 5.3V typical, P-channel MOSFET switches A and D are turned off and N-channel MOSFET switches B and C are turned on. Normal switching will VIN resume once the output voltage drops below ~5.1V. If the condition which caused the output overvoltage is still present the output will charge up to 5.3V again and the overvoltage cycle will be repeat. Normal output regulation will resume once the condition responsible for the output overvoltage is removed. Soft-Start The soft-start function is initiated when the SHDN pin is brought above 1.4V and the LTC3444 is out of UVLO (above minimum input operating specs). The LTC3444 is enabled but the PWM duty cycle is clamped via the error amp output. The soft-start time is internally set to 250μs to minimize output overshoot. A detailed diagram of this function is shown in Figure 2. ERROR AMP 20μA SOFT-START CLAMP + – 1.22V FB VC 8 7 TO PWM VCI COMPARATORS ISS + – CSS SHDN 1 1V 3444 F02 Figure 2. Soft-Start Circuitry 3444fb 9 LTC3444 U OPERATIO Buck-Boost Four-Switch Control Figure 3 shows a simplified diagram of how the four internal switches are connected to the inductor, VIN, VOUT and GND. Figure 4 shows the regions of operation for the LTC3444 as a function of the internal control voltage, VCI. Depending on the control voltage, the LTC3444 will operate in either buck, buck-boost or boost mode. The VCI VIN VOUT 6 5 PMOS A voltage is a level shifted voltage from the output of the error amp (VC pin) (see Figure 2). The four power switches are properly phased so the transfer between operating modes is continuous, smooth and transparent to the user. The buck-boost region is reached when VIN approaches VOUT. The conduction time of the four switch region is typically 125ns. The three operating modes of the four switch buck-boost converter are described below. Please refer to Figures 3 and 4. 88% DMAX BOOST V4 (~1.16V) A ON, B OFF PWM CD SWITCHES BOOST REGION DMIN BOOST PMOS D V3 (~0.73V) FOUR SWITCH PWM SW1 SW2 2 4 NMOS B DMAX BUCK NMOS C 0% DUTY CYCLE 3444 F03 D ON, C OFF PWM AB SWITCHES BUCK-BOOST REGION V2 (~0.49V) BUCK REGION V1 (OV) INTERNAL CONTROL VOLTAGE, VCI 3444 F04 Figure 3. Simplified Diagram of Output Switches Figure 4. Switch Control vs Internal Control Voltage, VCI 3444fb 10 LTC3444 U OPERATIO Buck Region (VIN > VOUT) Buck-Boost or Four Switch (VIN ~ VOUT) Switch D is always on and switch C is always off during this mode. When the internal control voltage, VCI, is above voltage V1, Switch A is on. During the off time of switch A, synchronous switch B turns on for the remainder of the time. Switches A and B will alternate similar to a typical synchronous buck regulator. As the control voltage increases, the duty cycle of switch A increases until the maximum duty cycle of the converter in buck mode reaches DMAX_BUCK, given by: When the internal control voltage, VCI, is above voltage V2, but below V3, switch pair AD remain on for duty cycle DMAX_BUCK, and the switch pair AC begins to phase in. As switch pair AC phases in, switch pair BD phases out accordingly. When the VCI voltage reaches the edge of the buck-boost range, at voltage V3, the AC switch pair completely phase out the BD pair, and the boost phase begins at duty cycle D4SW. The input voltage, VIN, where the four switch region begins is given by: DMAX_BUCK = 100% – D4SW where D4SW = duty cycle % of the four switch range. D4SW = (125ns • f) • 100 % VIN = VOUT V 1– (125ns • f) where f = operating frequency, Hz. Beyond this point the “four switch,” or Buck-Boost region is reached. The point at which the four switch region ends is given by: VIN = VOUT(1–D) = VOUT(1–125ns • f) V 3444fb 11 LTC3444 U OPERATIO Boost Region (VIN < VOUT) Switch A is always on and switch B is always off during this mode. When the internal control voltage, VCI, is above voltage V3, switch pair CD will alternately switch to provide a boosted output voltage. This operation is typical to a synchronous boost regulator. The maximum duty cycle of the converter is limited to 82% typical and is reached when VCI is above V4. control voltage range. When using the internal loop compensation, VC = GND, R1 must be 340k. For external compensation R1 should be chosen first and R2 and R3 calculated from the following equations. The resistor values are given by: R3 = ( VCON(MAX ) – VCON(MIN) ) VO(MAX ) – VO(MIN) • R1 Ω CONTROLLING THE OUTPUT VOLTAGE The output voltage is controlled via a summing resistor input at the feedback (FB) resistive divider string. Refer to Figure 1. The output voltage has an inverse relation to the control voltage as shown in Figure 5. The resistor values are dependent on the desired output voltage range and the R2 = 1.22 Ω ( VCON(MAX ) – 1.22) (1.22 – VO(MIN) ) – R3 R1 4.5 4 3.5 VOUT 3 2.5 2 1.5 1 0.5 0 0.5 1 1.5 VCONTROL 2 2.5 3444 G01 Figure 5. VOUT vs VCONTROL with R1 = 340k, R2 = 249k, and R3 = 182k, VCONTROL = 0.5V to 2.5V 3444fb 12 LTC3444 U OPERATIO Table 1. Shows some typical resistor value combinations for several VCONTROL vs VOUT voltage ranges. One percent (1%) resistor tolerances were assumed. COMPONENT SELECTION Recommended Component Placement Figure 6. Shows a recommended component placement. Traces carrying high current should be made short and wide. Trace area at FB and VC pins should be minimized. Lead lengths to the battery should be kept short. VOUT and VIN ceramic capacitors should be placed close to the IC pins. Multiple vias should be used between layers. Table 1. Typical Resistor Values for VOUT vs VCONTROL VCONTROL(V) VOUT (V) RESISTANCE (kΩ) MIN MAX MIN MAX R1 R2 R3 0.35 2.4 0.8 4.2 340 271 205 0.35 2.5 0.5 5.0 340 210 162 0.8 2.35 0.8 4.2 340 200 154 0.5 2.5 0.5 4.2 340 249 182 VCONTROL LTC3444 VIN 1 SHDN FB 8 2 SW1 VC 7 VIN 3 GND VIN 6 4 SW2 VOUT 5 VOUT 3444 F06 MULTIPLE VIAS Figure 6. Recommended Component Placement 3444fb 13 LTC3444 U OPERATIO Inductor Selection The high frequency operation of the LTC3444 allows the use of small surface mount inductors. The internal loop compensation is designed to work with a 2.2μH inductor (1.5μH for VIN < 3.1V). The 2.2μH inductor was selected to optimize the transient response to the control input. The use of a 2.2μH inductor pushes out the right half plane (RHP) zero frequency and allows the loop crossover to occur at frequencies higher than the output L-C double pole. For external compensation the inductor selection is based on the desired inductor ripple current. The inductor ripple current is typically set to 20% to 40% of the average inductor current. Increased inductance results in lower ripple current, however, higher inductance pulls in the RHP zero frequency and limits the maximum crossover frequency possible. Refer to Closing the Feedback Loop for more information on the RHP zero. For a given ripple the inductance terms are given as follows: LBOOST > VIN(MIN) • ( VOUT – VIN(MIN) ) f • IOUT(MAX ) • ΔIL • VOUT H LBUCK > VOUT • ( VIN(MAX) – VOUT ) f • IOUT(MAX) • ΔIL • VIN(MAX) H where f = operating frequency, Hz ΔIL = inductor ripple current, A VIN(MIN) = minimum input voltage, V VIN(MAX) = maximum input voltage, V VOUT = output voltage, V IOUT(MAX) = maximum output load current In most cases, the boost configuration will be used to determine the minimum inductance allowed for a given ripple current. For high efficiency, choose a ferrite inductor with a high frequency core material to reduce core loses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. To minimize radiated noise, use a shielded inductor. See Table 2 for a suggested list of inductor suppliers. Table 2. Inductor Vendor Information SUPPLIER PHONE FAX WEB SITE Coilcraft (847) 639-6400 (847) 639-1469 www.coilcraft.com CoEv Magnetics (800) 227-7040 (650) 361-2508 www.circuitprotection.com/magnetics.asp COOPER Bussmann (636) 394-2877 1-800-544-2570 www.coooperET.com Murata (814) 237-1431 (800) 831-9172 (814) 238-0490 www.murata.com Sumida USA: (847) 956-0666 Japan: 81(3) 3607-5111 USA: (847) 956-0702 Japan: 81(3) 3607-5144 www.sumida.com TDK (847) 803-6100 (847) 803-6296 www.component.tdk.com TOKO (847) 297-0070 (847) 699-7864 www.tokoam.com 3444fb 14 LTC3444 U OPERATIO Output Capacitor Selection A 4.7μF, X5R or X7R type ceramic capacitor should be used when using the internal loop compensation. When using external compensation, larger values of output capacitance can be used, however, larger output capacitance will increase the time needed to slew the output voltage as required in typical WCDMA applications. The bulk value of the output filter capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The steady state ripple due to charge is given by: % RIPPLE _ BOOST = IOUT • ( VOUT – VIN(MIN) ) • 100 2 The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR capacitors should be used to minimize output voltage ripple. For surface mount applications, Taiyo Yuden or TDK ceramic capacitors, AVX TPS series tantalum capacitors or Sanyo POSCAP are recommended. See Table 3 for contact information. % COUT • VOUT • f % RIPPLE _ BUCK = IOUT(MAX) • ( VIN(MAX) – VOUT ) • 100 COUT • VIN(MAX) • VOUT • f In a typical application the output capacitance may be many times larger than that calculated above in order to handle the transient load response requirements of the converter. For a rule of thumb, the ratio of the operating frequency to the unity-gain bandwidth of the converter is the amount the output capacitance will have to increase from the above calculations in order to maintain the desired transient response. However, in WCDMA applications the output capacitance should be kept at a minimum to maximize the output slew rate. Refer to the Loop Compensation Networks section of this datasheet. Ceramic output capacitors should use case size 1206 or larger. Smaller case sizes have a larger voltage coefficient that can greatly reduce the output capacitance value at higher output voltages. % where C OUT = output filter capacitor in farads f = switching frequency in Hz. Input Capacitor Selection Since the VIN pin is the supply voltage for the LTC3444, as well as the input to the power stage of the converter, it is recommended to place at least a 4.7μF, X5R or X7R ceramic bypass capacitor close to the VIN and GND pins. It is also important to minimize any stray resistance from the converter to the battery or other power source. Table 3. Capacitor Vendor Information SUPPLIER PHONE FAX WEB SITE AVX (803) 448-9411 (803) 448-1943 www.avxcorp.com Sanyo (619) 661-6322 (619) 661-1055 www.sanyovideo.com Taio Yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com TDK (847) 803-6100 (847) 803-6296 www.component.tdk.com 3444fb 15 LTC3444 U OPERATIO Optional Schottky Diodes A troublesome problem when operating in boost mode is dealing with the right-half plane zero (RHP), given by: Schottky diodes across the synchronous switches B and D are not required, but provide a lower drop during the break-before-make time (typically 15ns) of the NMOS to PMOS transition, improving efficiency. Use a surface mount Schottky diode such as an MBRM120T3 or equivalent. Do not use ordinary rectifier diodes, since the slow recovery times will compromise efficiency. f RHPZ = The RHP zero has a +20dB/dec gain typical of a zero but the –90° phase lag of a pole. This causes the loop gain to flatten out while the phase margin decreases. The only way to combat a RHP zero is to roll off the loop well before the RHP zero frequency. Closing the Feedback Loop The LTC3444 incorporates voltage mode PWM control. The control to output gain varies with operation region (buck, boost, buck-boost), but is usually ~20dB. The output filter exhibits a double pole response, as given by: f FILTER_ POLE = LOOP COMPENSATION NETWORKS A simple Type I compensation network, refer to Figure 7, can be incorporated to stabilize the loop, but at a cost of reduced bandwidth and slower transient response. To ensure proper phase margin using Type I compensation, the loop must be crossed over at least a decade before the output LC double pole frequency. The unity-gain frequency of the error amplifier with the Type I compensation is given by: 1 Hz 2 • π • L • C OUT (in buck mod e ) VIN Hz 2 • VOUT • π • L • C OUT (in boost mod e ) f FILTER_ POLE = f UG= The output filter zero is given by: 1 2 • π • RESR • C OUT 1 Hz 2 • π • R1• C 2 WCDMA applications demand an improved transient response to the input control voltage. In other applications, the output capacitor can be increased to meet help meet the load transient requirements. where L is in Henries and COUT is in farads. f FILTER_ ZERO = VIN2 Hz 2 • π • IOUT • L • VOUT Hz where RESR is the equivalent series resistance of the output cap. C2 – 7 FB R1 VOUT 8 VC VREF R2 + 3444 F07 Figure 7. Error Amplifier with Type I Compensation 3444fb 16 LTC3444 U OPERATIO 7 1 = Hz 2 • π • R5 • C 2 FB R4 R1 VOUT 8 VC VREF R2 3444 F08 Figure 8, Error Amplifier with Type III Compensation GAIN (db) 1 f ZERO1 = Hz 2 • π • R1• C1 f ZERO2 C1 1 Hz 2 • π • R5 • C 3 1 = Hz 2 • π • R4 • C1 R5 80 360 60 270 40 180 20 90 fUO 0 0 –20 –90 –40 –180 –60 –270 –80 1e 1e1 1e2 1e3 1e4 1e5 1e6 FREQUENCY (Hz) 1e7 PHASE (DEG) f POLE2 C2 + f POLE1 ≅ C3 – However, due to the output voltage slewing requirements found in WCDMA applications the output filter capacitor must be minimized. To maximize the transient response, while minimizing the output capacitance, a higher bandwidth, Type III compensation is required. A Type III compensation network, refer to Figure 8, has a double zero to cancel the double pole of the output LC filter and a double pole to compensate for the ESR zero and RHP zero of the boost topology. In addition to the double poles, the Type III network also has a single pole at DC. The Type III compensation provides a maximum 135° phase boost and allows the loop crossover to occur at frequencies higher than the output LC. Refer to Figure 9. Referring to Figure 8, the location of the poles and zeros are given by: Assume C2 >> C3, R1 >> R4. –360 1e8 3444 G02 And the unity gain frequency (fUG) of the Type III compensation is given by: f UG = Figure 9. Frequency Response for LTC3444 Error Amplifier with a Typical Type III Compensation Network 1 Hz 2 • π • R1• C2 where resistance is in ohms and capacitance is in farads. Note: Bias resistor, R2, does not affect the Pole/Zero placement. 3444fb 17 LTC3444 U TYPICAL APPLICATIO S Example of Internal Compensation Transient Response for a Command Voltage Change LTC3444 Dynamic Response LTC3444 Dynamic Response VOUT 1V/DIV 1V/DIV VOUT VCONTROL VCONTROL 10μs/DIV 10μs/DIV VIN = 3.6V, VOUT = 0.8V TO 4.2V VCONTROL = 2.36V TO 0.28V, ILOAD = 100mA VIN = 3.6V, VOUT = 4.2V TO 0.8V VCONTROL = 0.28V TO 2.36V, ILOAD = 100mA !""" /% 3444 G16a Internally Compensated WCDMA Application. Singe Cell, 2.7V to 4.2V Input, 0.8V to 4.2V at 400mA Output. 1.5μH L1 VOUT 0.8V TO 4.2V LTC3444 SW1 SW2 VIN VOUT R1 340k 2.7V TO 4.2V + CIN 4.7μF SHDN FB GND VC Li-Ion COUT 4.7μF R2 267k R3 205k VCONTROL DAC 3444 TA02 CIN = MURATA:GRM31CR61C475K COUT = MURATA:GRM31CR61C475K L1 = COOPER BUSSMAN SD12-2R2 3444fb 18 LTC3444 U TYPICAL APPLICATIO S Single Li-Ion, 3.1V to 4.2V Input, 3.3V at 400mA Output with Internal Compensation 2.2μH L1 VOUT 3.3V AT 400mA LTC3444 SW1 SW2 VIN VOUT R1 340k 3.1V TO 4.4V + CIN 4.7μF SHDN FB GND VC Li-Ion COUT 4.7μF R2 200k 3444 TA04 CIN = MURATA:GRM31CR61C475K COUT = MURATA:GRM31CR61C475K L1 = COOPER BUSSMAN SD12-2R2 U PACKAGE DESCRIPTIO DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.38 ± 0.10 8 0.675 ±0.05 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) 3.00 ±0.10 (4 SIDES) PACKAGE OUTLINE 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD) DFN 1203 0.25 ± 0.05 0.200 REF 0.50 BSC 2.38 ±0.05 (2 SIDES) 0.75 ±0.05 0.00 – 0.05 4 0.25 ± 0.05 1 0.50 BSC 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 3444fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3444 U TYPICAL APPLICATIO Externally Compensated WCDMA Application. Singe Cell, 3.1V to 4.2V Input, 0.8V to 4.2V at 400mA Output. 3.3μH L1 VOUT 0.8V TO 4.2V LTC3444 SW1 SW2 VIN VOUT R4 47.5k 3.1V TO 4.2V + CIN 4.7μF Li-Ion SHDN FB GND VC C1 10pF R5 47.5k C2 220pF C3 10pF DAC R1 340k VCONTROL R2 267k COUT 4.7μF R3 205k 3444 TA03 CIN = MURATA:GRM31CR61C475K COUT = MURATA:GRM31CR61C475K L1 = COOPER BUSSMAN SD12-3R3 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3403 1.5MHz, 600mA, Synchronous Step-Down Regulator with Bypass Transistor 96% Efficiency, VIN: 2.5V to 5V, VOUT: 0.3V to 3.5V, ISD <1μA, (3mm × 3mm) DFN Package LTC3408 1.5MHz, 600mA, Synchronous Step-Down Regulator with Bypass Transistor 96% Efficiency, VIN: 2.5V to 5V, VOUT: 0.3V to 3.5V, ISD <1μA, (3mm × 3mm) DFN Package LTC3440 Up to 2MHz, 600μA, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, ISD <1μA, IQ = 25μA, 10-Lead MS Package LTC3441 1MHz, 1.2A, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V VOUT(MIN) = 2.5V, ISD <1μA, IQ = 25μA, 12-Lead (4mm × 3mm) DFN Package LTC3442 Up to 2MHz, 1.2A, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, ISD <1μA, IQ = 25μA, 12-Lead (4mm × 3mm) DFN Package LTC3443 600MHz, 1.2A Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, ISD <1μA, IQ = 25μA, 12-Lead (4mm × 3mm) DFN Package 3444fb 20 Linear Technology Corporation LT 0507 REV B • PRINTED IN THE USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005