LTC3448 1.5MHz/2.25MHz, 600mA Synchronous Step-Down Regulator with LDO Mode DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC®3448 is a high efficiency, monolithic, synchronous buck regulator using a constant frequency, current mode architecture. Supply current during operation is only 32µA (linear regulator mode) and drops to <1µA in shutdown. The 2.5V to 5.5V input voltage range makes the LTC3448 ideally suited for single Li-Ion battery-powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. At moderate output load levels, PWM pulse skipping mode operation provides very low output ripple voltage for noise sensitive applications. High Efficiency: Up to 96% Very Low Quiescent Supply Current: 32µA During Linear Regulator Operation 600mA Output Current (Buck Converter) Optionally Operates as Linear Regulator Below 3mA—External or Automatic ON/OFF 2.5V to 5.5V Input Voltage Range 1.5MHz or 2.25MHz Constant Frequency Operation or External Synchronization No Schottky Diode Required Low Dropout Operation: 100% Duty Cycle 0.6V Reference Allows Low Output Voltages Shutdown Mode Draws < 1µA Supply Current Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Low Profile (3mm × 3mm) 8-Lead DFN and 8-Lead MSOP Packages The LTC3448 automatically switches into linear regulator operation at very low load currents to maintain <5mVP-P output voltage ripple. Supply current in this mode is typically 32µA. The switch to linear regulator mode occurs at a threshold of 3mA. Linear regulator operation can be set to on, off or automatic turn on/off. Switching frequency is selectable at either 1.5MHz or 2.25MHz, allowing the use of small surface mount inductors and capacitors. U APPLICATIO S ■ ■ ■ ■ ■ ■ Cellular Telephones Personal Information Appliances Wireless and DSL Modems Digital Still Cameras MP3 Players Portable Instruments The internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. Low output voltages are easily supported with the 0.6V feedback reference voltage. The LTC3448 is available in a low profile 3mm × 3mm DFN package or thermally enhanced 8-lead MSOP. , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131. Others pending. U Efficiency and Power Loss vs Load Current TYPICAL APPLICATIO 100 90 1.5V High Efficiency Regulator with Automatic LDO Mode SW VOUT RUN LTC3448 MODE VFB FREQ SYNC GND 3448 TA01a 22pF 474k COUT 4.7µF EFFICIENCY (%) VOUT 1.5V 60 50 EFFICIENCY POWER LOSS 0.01 40 30 316k POWER LOSS (W) VIN CIN 4.7µF 0.1 70 2.2µH VIN 2.5V TO 5.5V 80 1 VIN = 3.6V VOUT = 1.5V TA = 25°C 0.001 20 10 0 0.0001 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) 1 23448 TA01b 3448f 1 LTC3448 U W W W ABSOLUTE AXI U RATI GS (Note 1) Input Supply Voltage .................................. – 0.3V to 6V RUN, SYNC Voltages ................... – 0.3V to (VIN + 0.3V) MODE Voltage ............................. – 0.3V to (VIN + 0.3V) FREQ, VFB Voltages...................... – 0.3V to (VIN + 0.3V) SW Voltage .................................. – 0.3V to (VIN + 0.3V) VOUT Voltage ................................ – 0.3V to (VIN + 0.3V) P-Channel Switch Source Current (DC) ............. 800mA N-Channel Switch Sink Current (DC) ................. 800mA VOUT (LDO) Source Current .................................. 25mA Peak SW Sink and Source Current ........................ 1.3A Operating Temperature Range (Note 2) .. – 40°C to 85°C Junction Temperature (Notes 3, 7) ...................... 125°C Storage Temperature Range ................ – 65°C to 125°C Lead Temperature (Soldering, 10 sec) MSOP Only ...................................................... 300°C U U W PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER TOP VIEW VFB 1 VOUT 2 MODE 3 8 9 VIN 4 7 RUN LTC3448EDD SYNC 6 FREQ 5 SW DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TOP VIEW VFB 1 VOUT 2 MODE 3 VIN 4 DD PART MARKING TJMAX = 125°C, θJA = 43°C/ W EXPOSED PAD (PIN 9) IS GND MUST BE SOLDERED TO PCB ORDER PART NUMBER LBMJ 9 8 7 6 5 LTC3448EMS8E RUN SYNC FREQ SW MS8E PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 40°C/ W EXPOSED PAD (PIN 9) IS GND MUST BE SOLDERED TO PCB MS8 PART MARKING LTBMK Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VIN = 3.6V unless otherwise specified. SYMBOL PARAMETER IVFB Feedback Current CONDITIONS MIN VFB Regulated Feedback Voltage (Note 4) TA = 25°C 0°C ≤ TA ≤ 85°C –40°C ≤ TA ≤ 85°C ● ∆VFB Reference Voltage Line Regulation VIN = 2.5V to 5.5V (Note 4) ● ∆VOVL Output Overvoltage Lockout ∆VOVL = VOVL – VFB ∆VOVL = (VOVL – VOUT) • 100/VOUT ∆VOUT Output Voltage Line Regulation VIN = 2.5V to 5.5V (LDO) IPK Peak Inductor Current VFB = 0.5V or VOUT = 90%, Duty Cycle < 35% VLOADREG Output Voltage Load Regulation LDO, 1mA to 10mA VOUT(MAX) Maximum Output Voltage (Note 9) VIN Input Voltage Range TYP MAX UNITS ±30 nA 0.6 0.6 0.6 0.6120 0.6135 0.6150 V V V 0.2 0.4 %/V 35 5.8 55 9.2 mV % 0.1 0.8 %/V 1 1.3 A ● 0.5880 0.5865 0.5850 15 2.5 0.7 0.5 %/V VIN – 0.7 VIN – 0.3 ● 2.5 V 5.5 V 3448f 2 LTC3448 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VIN = 3.6V unless otherwise specified. SYMBOL PARAMETER CONDITIONS IS Input DC Bias Current Active Mode (Pulse Skip, No LRO) MIN TYP MAX UNITS VIN = 3.6V (Note 5) VFB = 0.5V or VOUT = 90%, ILOAD = 0A, 1.5MHz VFB = 0.5V or VOUT = 90%, ILOAD = 0A, 2.25MHz 250 275 375 400 µA µA Linear Regulator Operation (LRO) ILOAD ≤ ILDO(ON) 32 43 µA Shutdown VRUN = 0V, VIN = 5.5V 0.1 1 µA fOSC Oscillator Frequency FREQ = Low, VIN = 3.6V FREQ = High 1.5 2.25 1.8 2.7 MHz MHz fSYNC Synchronization Frequency (Note 6) >4 MHz VTH(SYNC) SYNC Activation Input Threshold RPFET RDS(ON) of P-Channel FET ISW = 100mA 0.4 Ω RNFET RDS(ON) of N-Channel FET ISW = –150mA 0.35 Ω ILSW SW Leakage VRUN = 0V, VSW = 0V or 5V, VIN = 5V VRUNH RUN Threshold High ● VRUNL RUN Threshold Low ● IRUN RUN Leakage Current ● VFREQH FREQ Threshold High ● VFREQL FREQ Threshold Low ● IFREQ FREQ Leakage Current ● VMODEH MODE Threshold High ● VMODEL MODE Threshold Low ● IMODE MODE Leakage Current ● ±0.1 ±1 µA ISYNC SYNC Leakage Current ● ±0.01 ±1 µA ILDO(ON) LRO ON Load Current Threshold 3 5 mA ILDO(OFF) LRO OFF Load Current Threhold 11 17 mA ● ● 1.2 1.8 1.5 1 ±0.01 ±1 1.5 ±0.01 µA 0.3 V ±1 µA V ±0.01 1 V ±1 µA VIN – 0.15 V 0.12 8 V V VIN – 1 2.2mH Inductor (Note 8) Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC3448E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD)(43°C/W) Note 4: The LTC3448 is tested in a proprietary test mode that connects VFB to the output of the error amplifier. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. LRO is “linear regulator operation.” 1.3 V Note 6: 4MHz operation is guaranteed by design but is not production tested and is subject to duty cycle limitations. Note 7: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 8: The load current below which the switching regulator turns off and the LDO turns on is, to first order, inversely proportional to the value of the inductor. This effect is covered in more detail in the Operation section. This parameter is not production tested but is guaranteed by design. Note 9: For 2.5V < VIN < 2.7V the output voltage is limited to VIN – 0.7V to ensure regulation in linear regulator mode. This parameter is not production tested but is guaranteed by design. 3448f 3 LTC3448 U W TYPICAL PERFOR A CE CHARACTERISTICS (From Figure1a Except for the Resistive Divider Resistor Values) 100 VOUT = 1.8V TA = 25°C 90 IOUT = 30mA 85 80 EFFICIENCY (%) EFFICIENCY (%) 90 IOUT = 600mA 75 70 80 70 60 50 40 65 20 55 10 3 4 5 INPUT VOLTAGE (V) 0.001 0.01 0.1 LOAD CURRENT (A) 0.615 60 50 40 30 20 1.70 VIN = 3.6V 1.60 0.605 0.600 0.595 50 25 75 0 TEMPERATURE (°C) 1.30 –50 125 OUTPUT VOLTAGE (V) 1.5 1.4 1.3 1.2 6 3448 G07 0 50 75 25 TEMPERATURE (°C) VIN = 3.6V 1.520 TA = 25°C 0.38 1.515 0.36 1.510 0.34 1.505 1.500 1.495 125 SYNCHRONOUS SWITCH 0.28 0.26 0.24 1.480 0.22 1.475 0.0001 0.20 3448 G08 MAIN SWITCH 0.30 1.490 1 TA = 25°C 0.32 1.485 0.01 0.001 0.1 LOAD CURRENT (A) 100 RDS(ON) vs Input Voltage 0.40 RDS(ON) (Ω) TA = 25°C 1.6 –25 3448 G06 Output Voltage vs Load Current 1.7 FREQUENCY (MHz) 100 1.525 3 4 5 SUPPLY VOLTAGE (V) 1.45 3448 G05 Oscillator Frequency vs Supply Voltage 2 1.50 1.35 23448 G04 1.8 1.55 1.40 0.585 –50 –25 1 VIN = 3.6V 1.65 10 0.01 0.1 0.001 LOAD CURRENT (A) 1 Oscillator Frequency vs Temperature 0.590 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) 23448 G03 FREQUENCY (MHz) REFERENCE VOLTAGE (V) EFFICIENCY (%) 0 0.0001 1 0.610 70 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 Reference Voltage vs Temperature VIN = 2.7V VOUT = 2.5V TA = 25°C 80 40 23448 G02 Efficiency vs Load Current (Switcher Only) 90 50 20 VIN = 2.7V VIN = 3.6V VIN = 4.2V 3448 G01 100 60 30 0 0.0001 6 VOUT = 1.5V TA = 25°C 90 70 60 2 VOUT = 1.2V TA = 25°C 80 30 50 100 EFFICIENCY (%) IOUT = 100mA 95 Efficiency vs Load Current Efficiency vs Load Current Efficiency vs Input Voltage 100 2 3 4 5 INPUT VOLTAGE (V) 6 3448 G09 3448f 4 LTC3448 U W TYPICAL PERFOR A CE CHARACTERISTICS (From Figure1a Except for the Resistive Divider Resistor Values) Dynamic Supply Current vs Supply Voltage 0.6 DYNAMIC SUPPLY CURRENT (µA) 340 0.5 RDS(ON) (Ω) 0.4 0.3 0.2 0.1 MAIN SWITCH SYNCH SWITCH 2.5V 2.5V 3.6V 3.6V 4.2V 4.2V 0 –50 50 25 75 0 TEMPERATURE (°C) –25 100 Dynamic Supply Current vs Temperature 320 ILOAD = 0A TA = 25°C 320 DYNAMIC SUPPLY CURRENT (µA) RDS(ON) vs Temperature 300 280 2.25MHz 260 1.5MHz 240 220 200 125 3 2 4 SWITCH LEAKAGE (nA) SWITCH LEAKAGE (nA) VIN = 5.5V RUN = 0V 250 MAIN SWITCH 150 100 50 0 –50 –25 SYNCHRONOUS SWITCH 1.5MHz 240 220 100 125 RUN = 0V TA = 25°C 100 125 Start-Up from Shutdown MAIN SWITCH RUN 5V/DIV 1 VOUT 1V/DIV SYNCHRONOUS SWITCH 0.1 IL 500mA/DIV 0.01 VIN = 3.6V VOUT = 1.5V ILOAD = 600mA 0 1 2 3 4 INPUT VOLTAGE (V) 5 40µs/DIV 3448 G15 6 3448 G14 3448 G13 Load Step Load Step VOUT 200mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED ILOAD 100mA/DIV ILOAD 250mA/DIV IL 500mA/DIV IL 500mA/DIV 10µs/DIV VIN = 3.6V VOUT = 1.5V ILOAD = 100µA TO 200mA COUT = 10µF 50 25 75 0 TEMPERATURE (°C) 3448 G12 0.001 50 25 75 0 TEMPERATURE (°C) 260 Switch Leakage vs Input Voltage 10 200 2.25MHz 3448 G11 Switch Leakage vs Temperature 300 280 SUPPLY VOLTAGE (V) 3448 G10 350 300 200 –50 –25 6 5 VIN = 3.6V ILOAD = 0A 3448 G16 10µs/DIV VIN = 3.6V VOUT = 1.5V ILOAD = 50mA TO 600mA COUT = 10µF 3448 G17 3448f 5 LTC3448 U W TYPICAL PERFOR A CE CHARACTERISTICS (From Figure 1a Except for the Resistive Divider Resistor Values) External Mode Control (Constant 1mA Load) Load Step VOUT 20mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED ILOAD 250mA/DIV SWITCHER SWITCHER LDO MODE PIN 2V/DIV IL 500mA/DIV VIN = 3.6V 10µs/DIV VOUT = 1.5V ILOAD = 100mA TO 600mA 3448 G18 VOUT = 1.5V TA = 25°C 200µs/DIV 3448 G19 U U U PI FU CTIO S VFB (Pin 1): Feedback Pin. This pin receives the feedback voltage from an external resistive divider across the output. VIN (Pin 4): Main Supply Pin. This pin must be closely decoupled to GND with a 2.2µF or greater ceramic capacitor. VOUT (Pin 2): Output Pin. This pin connects to an external resistor divider and the linear regulator output. Connect externally to the inductor and the output capacitor. The internal linear regulator will supply current up to the ILDO(OFF) current. Load currents above that are supplied by the buck regulator. Internal circuitry automatically enables the buck switching regulator at load currents higher than the ILDO(OFF). The minimum required capacitance on this pin is 2µF. SW (Pin 5): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. MODE (Pin 3): Linear Regulator Control. Grounding this pin turns off the linear regulator. Setting this pin to VIN turns on the linear regulator regardless of the load current. Tying this pin midrange (i.e., to VOUT) will place the linear regulator in auto mode, where turn on/off is a function of the load current. In applications where MODE is externally driven high or low, this pin should be held low for 50µs after the RUN pin is pulled high. FREQ (Pin 6): Frequency Select. Switching frequency is set to 1.5MHz when FREQ = 0V and to 2.25MHz when FREQ = VIN. Do not float this pin. SYNC (Pin 7): External Synchronization Pin. The oscillation frequency can be synchronized to an external oscillator applied to this pin. For external frequencies above 2.2MHz, pull FREQ high. RUN (Pin 8): Run Control Input. Forcing this pin above 1.5V enables the part. Forcing this pin below 0.3V shuts down the device. In shutdown, all functions are disabled drawing <1µA supply current. Do not leave RUN floating. Exposed Pad (Pin 9): Ground. This pin must be soldered to PCB. 3448f 6 LTC3448 W FU CTIO AL DIAGRA U U SYNC MODE 7 3 FREQ LDO CONTROL LOGIC SLOPE COMP 6 VIN OSC VOUT LDO DRIVE 2 4 VIN – + 0.6V VFB + – 1 OSC VIN S Q R Q RS LATCH RUN 8 0.6V REF 5Ω + ICOMP – EA – SWITCHING LOGIC AND BLANKING CIRCUIT ANTISHOOTTHRU 5 SW OVDET + + 0.6V + ∆OVL SHUTDOWN IRCMP 9 GND – 3448 F01 Figure 1 U OPERATIO (Refer to Functional Diagram) Main Control Loop The LTC3448 uses a constant frequency, current mode, step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch, is controlled by the output of error amplifier EA. When the load current increases, it causes a slight decrease in the feedback voltage FBINT relative to the 0.6V reference, which in turn, causes the EA amplifier’s output voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. The comparator OVDET guards against transient overshoots 5.8% by turning off the main switch and keeping it off until the fault is removed. Pulse Skipping Mode Operation At light loads, the inductor current may reach zero or reverse on each pulse. The bottom MOSFET is turned off by the current reversal comparator, IRCMP, and the switch voltage will ring. This is discontinuous mode operation, and is normal behavior for the switching regulator. At very light loads, the LTC3448 will automatically skip pulses to maintain output regulation. Low Ripple LDO Mode Operation At load currents below ILDO(ON), and when enabled, the LTC3448 will switch into very low ripple, linear regulating operation (LRO). In this mode, the current is sourced from 3448f 7 LTC3448 U OPERATIO (Refer to Functional Diagram) the VOUT pin and both the main and synchronous switches are turned off. The control loop is stabilized by the load capacitor and requires a minimum value of 2µF. The LTC3448 will change back to switching mode and turn off the LDO when the load current exceeds approximately 11mA. When MODE is connected to an intermediate voltage level (i.e., VOUT), this switchover is automatic. If MODE is pulled high to VIN, the LDO remains on and the switcher off regardless of the load current. The LDO is capable of providing a maximum of approximately 15mA before the load regulation will degrade to unacceptable levels. If MODE is pulled to GND, the switcher remains on and the LDO off regardless of the load current. 4.5 4.0 VOUT = 1.2V ILDO(ON) (mA) 3.5 VOUT = 1.5V 3.0 2.5 VOUT = 1.8V 2.0 1.5 1.0 TA = 25°C L = 2.2µH 0.5 0 2 3 4 6 5 VIN (V) 3448 F02 Figure 2. ILDO(ON) vs VIN, VOUT 5.0 VIN = 3.6V VOUT = 1.5V TA = 25°C 4.5 4.0 ILDO(ON) (mA) 3.5 3.0 2.5 2.0 1.5 1.0 Some applications may be able to anticipate the transition from high to low and low to high load currents. In these cases it may be desirable to switch between modes by controlling the MODE pin with a processor signal. In these applications it is important that the MODE pin is pulled high no earlier than 50µs after the RUN pin is pulled high. This will ensure proper start-up of internal reference circuitry. The load current ILDO(ON) below which the switcher will automatically turn off and the LDO turn on is independent of the external capacitor, and to first order, independent of supply and output voltage. There is an inverse relationship between ILDO(ON) and the value of the inductor. These dependencies are shown in Figures 2 and 3. Automatic operation with inductor values below 1µH is not recommended. At the low load currents at which the switcher to linear regulator transition occurs, the switcher is operating in pulse skipping mode. During each switching cycle in this mode, while the synchronous switch (bottom MOSFET) is on, the inductor current decays until the reverse current comparator is triggered. At this occurrence, the bottom MOSFET is turned off. Ideally, this occurs when the inductor current is precisely zero. In reality, because of onchip delays, this current will be negative at higher output voltages. The internal algorithm which controls the LDO turn-on load current level makes certain assumptions about the amount of charge transferred to the output on each switching cycle. These assumptions are no longer met when the inductor current begins to reverse. This causes the load current at which the transition takes place to move to lower levels at higher output voltages. For this reason use of the LDO auto mode is not recommended for output levels above 2V. For output voltages above 2V, the MODE pin should be driven externally. Short-Circuit Protection 0.5 0 0 2 6 8 4 INDUCTOR VALUE (µH) 10 12 3448 F03 Figure 3. ILDO(ON) vs LOUT When the output is shorted to ground, the main switch cycle will be skipped, and the synchronous switch will remain on for a longer duration. This allows the inductor current more time to decay, thereby preventing runaway. 3448f 8 LTC3448 U OPERATIO (Refer to Functional Diagram) (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3448 is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applications Information section). MAXIMUM OUTPUT CURRENT (mA) 1200 1000 800 600 VOUT = 1.8V VOUT = 2.5V VOUT = 1.5V Low Supply Operation 400 The LTC3448 will operate with input supply voltages as low as 2.5V, but the maximum allowable output current is reduced at this low voltage. Figure 4 shows the reduction in the maximum output current as a function of input voltage for various output voltages. 200 0 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5 3448 F04 Figure 4. Maximum Output Current vs Input Voltage Dropout Operation As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. An important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing sub-harmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. This normally results in a reduction of maximum inductor peak current for duty cycles >40%. However, the LTC3448 uses a patent-pending scheme that counteracts this compensating ramp, which allows the maximum inductor peak current to remain unaffected throughout all duty cycles. U W U U APPLICATIO S I FOR ATIO The basic LTC3448 application circuit is shown on the first page of this data sheet. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Selection For most applications, the value of the inductor will fall in the range of 1µH to 4.7µH. Its value is chosen based on the desired ripple current. Large value inductors lower ripple current and small value inductors result in higher ripple currents. Higher VIN or VOUT also increases the ripple current as shown in equation 1. A reasonable starting point for setting ripple current is ∆IL = 240mA (40% of 600mA). ∆IL = ⎛ V ⎞ VOUT ⎜ 1 − OUT ⎟ VIN ⎠ ⎝ f L 1 ( )( ) (1) The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 720mA rated inductor should be enough for most applications (600mA + 120mA). For better efficiency, choose a low DC-resistance inductor. If the LTC3448 is to be used in auto LDO mode, inductor values less than 1µH should not be used. 3448f 9 LTC3448 U W U U APPLICATIO S I FOR ATIO Inductor Core Selection Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3448 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3448 applications. Table 1. Representative Surface Mount Inductors PART NUMBER VALUE (µH) DCR (Ω MAX) 1.5 2.2 3.3 4.7 0.043 0.075 0.110 0.162 1.55 1.20 1.10 0.90 3.8 × 3.8 × 1.8 Sumida CMD4D06 2.2 3.3 4.7 0.116 0.174 0.216 0.950 0.770 0.750 3.5 × 4.3 × 0.8 Coilcraft ME3220 2.2 3.3 4.7 0.104 0.138 0.190 1.8 1.3 1.2 2.5 × 3.2 × 2.0 Murata LQH3C 1.0 2.2 4.7 0.060 0.097 0.150 1.00 0.79 0.65 2.5 × 3.2 × 2.0 Sumida CDRH3D16 MAX DC SIZE CURRENT (A) W × L × H (mm3) CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: CIN required IRMS ≅ IOMAX [ ( VOUT VIN − VOUT )] 1/ 2 VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design. Note that the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. In any case, if LDO mode is enabled, the value of COUT must have a minimum value of 2µF to ensure loop stability. The output ripple ∆VOUT is determined by: ⎛ 1 ⎞ ∆VOUT ≅ ∆IL ⎜ ESR + ⎟ 8fC OUT ⎠ ⎝ where f = operating frequency, COUT = output capacitance and ∆IL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since ∆IL increases with input voltage. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3448’s control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At 3448f 10 LTC3448 U W U U APPLICATIO S I FOR ATIO worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Output Voltage Programming loss dominates the efficiency loss at low load currents, whereas the I2R loss dominates the efficiency loss at medium to high load currents. At very low load currents with the part operating in LDO mode, efficiency can be dominated by I2R losses in the pass transistor and is a strong function of (VIN – VOUT). In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of little consequence as illustrated in Figure 6. The output voltage is set by tying VFB to a resistive divider according to the following formula: (2) The external resistive divider is connected to the output, allowing remote voltage sensing as shown in Figure 5. 0.6V ≤ VOUT ≤ 5.5V R2 VFB LTC3448 VIN = 3.6V FREQ = 0V LDOCNTRL = VOUT(AUTO) 0.1 ⎛ R2⎞ = 0.6V ⎜ 1 + ⎟ ⎝ R1⎠ POWER LOSS (W) VOUT 1 0.01 0.001 0.0001 0.0001 1.2V 1.5V 1.8V 0.001 0.01 0.1 LOAD CURRENT (A) 1 3448 F06 R1 Figure 6. Power Loss vs Load Current GND 3448 F05 Figure 5. Setting the LTC3448 Output Voltage Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3448 circuits: VIN quiescent current and I2R losses. When in switching mode, VIN quiescent current 1. The VIN quiescent current is due to two components: the DC bias current as given in the Electrical Characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current and proportional to frequency. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both 3448f 11 LTC3448 U W U U APPLICATIO S I FOR ATIO top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. 3. At load currents below the selected threshold the LTC3448 will switch into low ripple LDO mode if enabled. In this case the losses are due to the DC bias currents as given in the electrical characteristics and I2R losses due to the (VIN – VOUT) voltage drop across the internal pass transistor. where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC3448 in dropout at an input voltage of 2.7V, a load current of 600mA and an ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the P-channel switch at 70°C is approximately 0.52Ω. Therefore, power dissipated by the part is: PD = ILOAD2 • RDS(ON) = 187.2mW Other losses when in switching operation, including CIN and COUT ESR dissipative losses and inductor core losses, generally account for less than 2% total additional loss. For the 3mm × 3mm DFN package, the θJA is 43°C/W. Thus, the junction temperature of the regulator is: Thermal Considerations which is well below the maximum junction temperature of 125°C. The LTC3448 requires the package backplane metal (GND pin) to be well soldered to the PC board. This gives the DFN and MSOP packages exceptional thermal properties, making it difficult in normal operation to exceed the maximum junction temperature of the part. In most applications the LTC3448 does not dissipate much heat due to its high efficiency. In applications where the LTC3448 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part if it is not well thermally grounded. If the junction temperature reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3448 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = PDθJA TJ = 85°C + (0.1872)(43) = 93°C Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance RDS(ON). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (∆ILOAD • ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1µF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel 3448f 12 LTC3448 U W U U APPLICATIO S I FOR ATIO with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10µF capacitor charging to 3.3V would require a 250µs rise time, limiting the charging current to about 130mA. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the switching node, SW, away from the sensitive VFB node. PC Board Layout Checklist 5. Keep the (–) plates of CIN and COUT as close as possible. When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3448. These items are also illustrated graphically in Figures 7 and 8. Check the following in your layout: Design Example As a design example, assume the LTC3448 is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.6A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low 1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short, direct and wide. 4 VIN 8 CIN VIN SW RUN VOUT MODE 5 L VOUT 2 3 COUT RFB2 CFF LTC3448 6 7 VFB FREQ SYNC GND 9 1 RFB1 3448 F07 Figure 7. LTC3448 Layout Design 3448 F08 Figure 8. LTC3448 Layout 3448f 13 LTC3448 U W U U APPLICATIO S I FOR ATIO and high load currents is important. Output voltage is 1.8V. With this information we can calculate L using Equation (1), L= ⎛ V ⎞ VOUT ⎜ 1 − OUT ⎟ VIN ⎠ ⎝ f ∆IL 1 ( )( ) (3) Substituting VOUT = 1.8V, VIN = 4.2V, ∆IL = 240mA and f = 1.5MHz in Equation (3) gives: L= CIN will require an RMS current rating of at least 0.3A ≅ ILOAD(MAX)/2 at temperature and COUT will require an ESR of less than 0.25Ω. In most cases, a ceramic capacitor will satisfy this requirement. For the feedback resistors, choose R1 = 316k. R2 can then be calculated from Equation (2) to be: ⎛V ⎞ R2 = ⎜ OUT − 1⎟ R1 = 632k ⎝ 0.6 ⎠ Figure 9 shows the complete circuit along with its efficiency curve. 1.8 V ⎛ 1.8 V ⎞ ⎜1 − ⎟ = 2.86 µH 1.5MHz(240mA) ⎝ 4.2V ⎠ A 2.2µH inductor works well for this application. For best efficiency choose a 720mA or greater inductor with less than 0.2Ω series resistance. 4 CIN 4.7µF CER 8 VIN SW 5 2.2µH* 2 VOUT RUN LTC3448 3 MODE 6 1 VFB FREQ 7 SYNC GND 22pF 632k COUT 15µF CER VOUT 1.8V VIN = 3.6V 90 VOUT = 1.8V T = 25°C 80 A 70 EFFICIENCY (%) VIN 2.7V TO 5.5V 100 60 50 40 30 316k 20 9 10 3448 F09a 0 0.0001 CIN: TAIYO YUDEN JMK212BJ475MG COUT: TAIYO YUDEN JMK212BJ475MG *MURATA LQH32CN2R2M11 0.001 0.01 0.1 LOAD CURRENT (A) 1 3448 F09b Figure 9b Figure 9a VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED ILOAD 250mA/DIV ILOAD 100mA/DIV IL 500mA/DIV IL 500mA/DIV VIN = 3.6V 20µs/DIV VOUT = 1.8V ILOAD = 100µA TO 200mA Figure 9c 3448 F09c VIN = 3.6V 20µs/DIV VOUT = 1.8V ILOAD = 50mA TO 600mA 3448 F09d Figure 9d 3448f 14 LTC3448 U TYPICAL APPLICATIO S Single Li-Ion 1.5V/600mA Regulator for High Efficiency and Small Footprint 4 CIN 4.7µF CER 8 VIN SW 5 90 2.2µH* VOUT 1.5V 2 VOUT RUN LTC3448 3 MODE 6 1 VFB FREQ 7 SYNC GND 22pF 474k COUT 15µF 216k VOUT = 1.5V TA = 25°C 80 70 EFFICIENCY (%) VIN 2.7V TO 5.5V Efficiency vs Output Current 100 60 50 40 30 9 20 VIN = 2.7V VIN = 3.6V VIN = 4.2V 3448 TA03 10 CIN: TAIYO YUDEN CERAMIC JMK212BJ475MG COUT: TAIYO YUDEN CERAMIC JMK212BJ475MG *MURATA LQH32CN2R2M33 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) 1 23448 G03 Load Step Load Step VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED ILOAD 250mA/DIV ILOAD 100mA/DIV IL 500mA/DIV IL 500mA/DIV VIN = 3.6V 20µs/DIV VOUT = 1.5V ILOAD = 100µA TO 200mA 3448 TA05 VIN = 3.6V 20µs/DIV VOUT = 1.5V ILOAD = 50mA TO 600mA 3448 TA06 Note: Performance data measured on the LTC3448 with external resistors 3448f 15 LTC3448 U TYPICAL APPLICATIO S Single Li-Ion 1.2V/600mA Regulator for High Efficiency and Small Footprint 4 CIN 4.7µF CER 8 VIN SW 5 100 2.2µH* 2 VOUT RUN LTC3448 3 MODE 6 1 VFB FREQ 7 SYNC GND 22pF 316k 316k 9 COUT 10µF CER VOUT 1.2V 90 VOUT = 1.2V TA = 25°C 80 70 EFFICIENCY (%) VIN 2.7V TO 5.5V Efficiency vs Output Current 60 50 40 30 3448 TA07 20 CIN: TAIYO YUDEN JMK212BJ475MG COUT: TAIYO YUDEN JMK212BJ475MG *MURATA LQH32CN2R2M33 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) 1 23448 G02 Load Step Load Step VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED ILOAD 100mA/DIV ILOAD 250mA/DIV IL 500mA/DIV IL 500mA/DIV VIN = 3.6V 20µs/DIV VOUT = 1.2V ILOAD = 100µA TO 200mA 3448 TA09 20µs/DIV VIN = 3.6V VOUT = 1.2V ILOAD = 50mA TO 600mA 3448 TA10 3448f 16 LTC3448 U TYPICAL APPLICATIO S Single Li-Ion 2.5V/600mA Regulator with 1.8MHz External Synchronization and External MODE VIN 2.5V TO 5.5V 4 CIN 4.7µF CER TO µPROCESSOR CONTROL TO 0V TO 1.3V OR GREATER 1.8MHz EXTERNAL CLOCK 8 VIN 5 SW 2.2µH 2 VOUT RUN LTC3448 1.58M 3 MODE 6 1 VFB FREQ 7 SYNC GND CFF 22pF COUT 10µF CER VOUT 2.5V 600mA 500k 9 3448 TA12 Load Step Load Step VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED LDOCNTRL 2V/DIV LDOCNTRL 2V/DIV ILOAD 250mA/DIV ILOAD 250mA/DIV 3448 TA12b VIN = 3.6V 40µs/DIV VOUT = 2.5V ILOAD = 100µA TO 300mA 40µs/DIV VIN = 3.6V VOUT = 2.5V ILOAD = 100µA TO 600mA 3448 TA12c Single Li-Ion 1.2V/600mA Regulator with 2.5MHz External Synchronization VIN 2.5V TO 5.5V 4 CIN 4.7µF CER 8 VIN SW VOUT RUN LTC3448 5 2.2µH 2 316k 3 TO 0V TO 1.3V OR GREATER 2.5MHz EXTERNAL CLOCK MODE 6 1 VFB FREQ 7 SYNC GND CFF 22pF COUT 10µF CER VOUT 1.2V 600mA 316k 9 3448 TA13 3448f 17 LTC3448 U PACKAGE DESCRIPTIO DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) 0.675 ±0.05 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5 3.00 ±0.10 (4 SIDES) 0.38 ± 0.10 8 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 1203 0.200 REF 0.75 ±0.05 0.00 – 0.05 4 0.25 ± 0.05 1 0.50 BSC 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 3448f 18 LTC3448 U PACKAGE DESCRIPTIO MS8E Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1662) BOTTOM VIEW OF EXPOSED PAD OPTION 2.06 ± 0.102 (.081 ± .004) 1 5.23 (.206) MIN 1.83 ± 0.102 (.072 ± .004) 0.889 ± 0.127 (.035 ± .005) 2.794 ± 0.102 (.110 ± .004) 2.083 ± 0.102 3.20 – 3.45 (.082 ± .004) (.126 – .136) 8 0.42 ± 0.038 (.0165 ± .0015) TYP 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.65 (.0256) BSC 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 1 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.127 ± 0.076 (.005 ± .003) MSOP (MS8E) 0603 3448f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3448 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1616 500mA (IOUT), 1.4MHz, High Efficiency Step-Down DC/DC Converter 90% Efficiency, VIN = 3.6V to 25V, VOUT ≥ 1.25V, IQ = 1.9mA, ISD = <1µA, ThinSOT Package LT1776 500mA (IOUT), 200kHz, High Efficiency Step-Down DC/DC Converter 90% Efficiency, VIN = 7.4V to 40V, VOUT ≥ 1.24V, IQ = 3.2mA, ISD = 30µA, N8, S8 Packages LTC1877 600mA (IOUT), 550kHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.7V to 10V, VOUT ≥ 0.8V, IQ = 10µA, ISD = <1µA, MS8 Package LTC1879 1.2A (IOUT), 550kHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.7V to 10V, VOUT ≥ 0.8V, IQ = 15µA, ISD = <1µA, TSSOP-16 Package LTC3403 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter with Bypass Transistor 96% Efficiency, VIN = 2.5V to 5.5V, VOUT = Dynamically Adjustable, IQ = 20µA, ISD = <1µA, DFN Package LTC3405/LTC3405A 300mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN = 2.5V to 5.5V, VOUT ≥ 0.8V, IQ = 20µA, ISD = <1µA, ThinSOT Package LTC3406 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN = 2.5V to 5.5V, VOUT ≥ 0.6V, IQ = 20µA, ISD = <1µA, ThinSOT Package LTC3406B-2 600mA (IOUT), 2.25MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN = 2.5V to 5.5V, VOUT ≥ 0.6V, IQ = 300µA, ISD = <1µA, ThinSOT Package LTC3407/LTC3407-2 Dual 600mA/800mA (IOUT), 1.5MHz/2.25MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN = 2.5V to 5.5V, VOUT ≥ 0.6V, IQ = 40µA, ISD = <1µA, MS10, DFN Packages LTC3409 600mA Low VIN Buck Regulator 95% Efficiency, VIN = 1.6V to 5.5V, IQ = 65µA ISD = <1µA, DFN Package LTC3411 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.5V to 5.5V, VOUT ≥ 0.8V, IQ = 60µA, ISD = <1µA, MS Package LTC3412 2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.5V to 5.5V, VOUT ≥ 0.8V, IQ = 60µA, ISD = <1µA, TSSOP-16E Package LTC3440 600mA (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN = 2.5V to 5.5V, VOUT ≥ 2.5V, IQ = 25µA, ISD = <1µA, MS Package LTC3441 1.2A (IOUT), 1MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN = 2.4V to 5.5V, VOUT ≥ 2.4V to 5.25V, IQ = 25µA, ISD = <1µA, DFN Package LTC3442 1.2A (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN = 2.4V to 5.5V, VOUT ≥ 2.4V to 5.25V, IQ = 35µA, ISD = <1µA, DFN Package LTC3443 1.2A (IOUT), 600kHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN = 2.4V to 5.5V, VOUT ≥ 2.4V to 5.25V, IQ = 28µA, ISD = <1µA, DFN Package 3448f 20 Linear Technology Corporation LT/TP 0505 500 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005