3-A DC Motor Driver TLE 5204 SPT IC 1) Overview Features • • • • • • • Output current ± 3 A I/O error diagnostics Short-circuit proof Four-quadrant operation Integrated free-wheeling diodes Wide temperature range Break low and break high, if open load detection is required, the device TLE 5203 will fit P-TO220-7-1 P-TO220-7-8 Type Ordering Code Package TLE 5204 Q67000-A9177 P-TO220-7-1 TLE 5204 G Q67006-A9234 P-TO220-7-8 Description TLE 5204 is an integrated power bridge with DMOS output stages for driving DC motors. This motor bridge is optimized for driving DC motors in reversible operation. The internal protective circuitry in particular ensures that no crossover currents can occur. Because the free-wheeling diodes are integrated, the external circuitry that is necessary is reduced to the capacitors on the supply voltage. The control inputs have TTL/CMOS-compatible levels. 1) SIEMENS Power Technology Semiconductor Group 1 1998-02-01 TLE 5204 TLE 5204 1 2 3 4 5 6 GND VS EF Q1 TLE 5204 G Ι1 Ι2 7 Q2 AEP01224 Figure 1 Pin Configuration (top view) Pin Definitions and Functions Pin No. Symbol Function 1 Q1 Output of channel 1; Short-circuit proof, free-wheeling diodes integrated for inductive loads 2 EF Error flag; TTL/CMOS-compatible output for error detection (open drain) 3 I1 Control input 1; TTL/CMOS-compatible 4 GND Ground; connected internally to cooling fin 5 I2 Control input 2; TTL/CMOS-compatible 6 VS Supply voltage; wire with capacitor matching load 7 Q2 Output of channel 2; Short-circuit proof, free-wheeling diodes integrated for inductive loads Semiconductor Group 2 1998-02-01 TLE 5204 Circuit Description Input Circuit The control inputs consist of TTL/CMOS-compatible Schmitt triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. Output Stages The output stages form a switched H-bridge. Protective circuits make the outputs shortcircuit proof to ground and to the supply voltage throughout the operating range. Positive and negative voltage spikes, which occur when switching inductive loads, are clamped by integrated power diodes. Functional Truth Table E1 E2 Q1 Q2 Comments L L L L Motor brake; both low side transistors turned-ON L H L H Motor turns clockwise H L H L Motor turns counterclockwise H H H H Motor brake; both high side transistors turned-ON Notes for Output Stage Symbol Value L Low side transistor is turned-ON High side transistor is turned-OFF H High side transistor is turned-ON Low side transistor is turned-OFF Semiconductor Group 3 1998-02-01 TLE 5204 Monitoring Functions An internal circuit ensures that all output transistors are turned-OFF if the supply voltage is below the operating range. A monitoring circuit for each output transistor detects whether the particular transistor is active and in this case prevents the corresponding source transistor (sink transistor) from conducting in sink operation (source operation). Therefore no crossover currents can occur. Pulse-width operation is possible up to a maximum switching frequency of 1 kHz for any load. Depending on the load current higher frequencies are possible. Protective Function Various errors like short-circuit to + VS, ground or across the load are detected. All faults result in turn-OFF of the output stages after a delay of 40 µs and setting of the error flag EF to ground. Changing the inputs resets the error flag. Output Shorted to Ground Detection If a high side transistor is switched on and its output is shorted to ground, the output current is limited to typ 8 A. After a delay of 40 µs all outputs will be switched off and the error flag EF is set to ground. Output Shorted to + VS and Overload Detection An internal circuit detects if the current through the low side transistor is higher than 4 A typ. In this case all outputs are turned-OFF after 40 µs and the error flag is set to ground. At a junction temperature higher than 160 °C the thermal shutdown turns-OFF, all four output stages commonly and the error flag is set without a delay. Diagnosis Input Output Diagnosis EF E1 E2 Q1 Q2 Shorted to GND Shorted to VS Overload L L L L – Q1, Q2 – L L H L H Q2 Q1 X L H L H L Q1 Q2 X L H H H H Q1, Q2 – – L Semiconductor Group 4 1998-02-01 TLE 5204 Error Flag VS 6 2 Error Flag Protection Circuit 1 Control Input 1 Control Input 2 3 1 5 7 Output 1 Output 2 Protection Circuit 1 4 GND Figure 2 AEB01225 Block Diagram Semiconductor Group 5 1998-02-01 TLE 5204 Absolute Maximum Ratings Tj = – 40 to 150 °C Parameter Symbol Limit Values Unit Remarks – min. max. VS VS VI1 , 2 VEF – 0.3 –1 – 0.3 – 0.3 40 – 7 7 V V V V IF IQ Tj Tstg –4 –4 4 4 A A – – 40 – 50 150 150 °C °C – – Rth jC Rth jA – – 4 65 K/W K/W – – VS VI1 , 2 f Tj 6 – 0.3 – – 40 24 7 1 150 V V kHz °C – – – – Voltage Supply voltage Supply voltage Logic input voltage Diagnostics output voltage t < 500 ms; IS < 5 A VS = 0 – 40 V – Current Free-wheeling current Output current 1) Junction temperature Storage temperature Tj ≤ 150 °C Thermal Resistance Junction-case Junction-ambient Operating Range Supply voltage Logic input voltage Switching frequency 2) Junction temperature 1) During overload condition currents higher than 4 A can dynamically occur, before the device shuts off, without any damaging the device. 2) Depending on load higher frequencies are possible. Semiconductor Group 6 1998-02-01 TLE 5204 Electrical Characteristics VS = 6 to 18 V; Tj = – 40 to 150 °C Parameter Symbol Limit Values min. typ. max. Unit Test Condition IL = 0 A General Quiescent current Turn-ON delay Turn-OFF delay Turn-ON time Iq td1 td2 tr – – – – – 10 – 10 10 20 10 20 mA µs µs µs Turn-OFF time tf – – 10 µs Undervoltage Undervoltage VS VS – – 5.5 4.5 5.9 5.2 V V IC ON IC OFF VIH VIL ∆VI 2.8 – – – – 1.2 V V – – 0.4 0.8 1.2 V – H-input current L-input current II II –2 – 10 – –4 2 0 µA µA VI = VIH VI = VIL Diagnosis output Delay time L-output voltage Leakage current td VEF IRD 20 – – 40 – – 60 0.4 10 µs V µA – I = 3 mA Error detection Switching threshold U Switching threshold L Overcurrent 1 VEH VEL IF1 2 2 3 2.7 2.7 4 3.5 3.5 5 V V A Error low Error high Error low Input to output Input to output IQ = 2.5 A; cf diagram IQ = 2.5 A; cf diagram Logic Control inputs H-input voltage L-input voltage Hysteresis of input voltage Semiconductor Group 7 – 1998-02-01 TLE 5204 Electrical Characteristics (cont’d) VS = 6 to 18 V; Tj = – 40 to 150 °C Parameter Symbol Limit Values min. typ. max. – – – – – – – – – – – – 0.4 0.65 0.4 0.65 1.5 1.5 Unit Test Condition Ω Ω Ω Ω V V VS > 6 V; Tj = 25 °C 1) VS > 6 V; Tj = 150 °C 1) VS > 6 V; Tj = 25 °C 1) VS > 6 V; Tj = 150 °C 1) IF = 3 A IF = 3 A Outputs RDSONU RDSONU RDSONL RDSONL Diode forward voltage Diode forward voltage 1) – – – – VFU VFL Values for RDSON are for t > 100 µs after applying + VS. Semiconductor Group 8 1998-02-01 TLE 5204 4700 µF 63 V Ιq, ΙS 6 Ι Ι1 VS 470 nF 2 3 1 Ι Q1 RL TLE 5204 Ι Ι2 V Ι1 5 7 VEF Ι Q2 4 VΙ2 VQ2 ΙM V Q1 AES01522 Figure 3 Test Circuit Figure 4 Timing Diagram Semiconductor Group 9 1998-02-01 TLE 5204 + VS = 12 V *) 220 nF 5V 6 2 kΩ Error Flag 3 Control Inputs 1 2 TLE 5204 M 7 5 4 AES01523 *) Necessary for isolating supply voltage or interruption (e.g. 470 µF). Figure 5 Application Circuit Semiconductor Group 10 1998-02-01 TLE 5204 Diagrams RON Resistance of Output Stage over Temperature Output Voltage on Diagnostics Output versus Current AED01305 800 R ON VEF 6 V< VS <18 V mΩ AED01306 300 mV 250 600 T j = 150 ˚C VS =12 V max 200 typ 400 150 T j = 25 ˚C 100 200 50 0 0 25 50 75 100 ˚C 0 150 0 1 3 2 4 6 mA Tj Forward Current of Upper Free-Wheeling Diode versus Voltage ΙF Forward Current of Lower Free-Wheeling Diode versus Voltage AED01303 4 ΙF AED01304 4 A A 3 3 T j = 150 ˚C T j = 25 ˚C T j = 150 ˚C 2 2 T j = 25 ˚C 1 0 0.2 1 0.6 1 V 0 0.2 1.4 1 1.4 V VF VF Semiconductor Group 0.6 11 1998-02-01 TLE 5204 Quiescent Current versus Temperature Overcurrent Threshold versus Temperature AED01681 10 ΙQ AED01682 5 ΙS A mA 4 8 typ typ 3 6 min 4 2 2 1 0 -40 0 40 80 0 -40 120 ˚C 160 0 80 40 Tj Tj Switching Threshold VEL, EH versus Temperature Input Threshold versus Temperature AED01683 3.5 VΙ 120 ˚C 160 AED01684 5.5 VF V 3.0 V 5.0 VΙ H typ 2.5 4.5 typ 2.0 4.0 VΙ L typ 1.5 1.0 -40 3.5 0 40 80 3.0 -40 120 ˚C 160 Tj Semiconductor Group 0 40 80 120 ˚C 160 Tj 12 1998-02-01 TLE 5204 E2 E1 = Low 8A Ι Q2 V Q2 R Short x 8 A 40 µ s V FL EF AED01685 Figure 6 Timing Diagram for Output Shorted to Ground E2 E1 = Low 20 A Ι Q1 VS V Q1 R Short x 20 A V FU 40 µ s EF AED01686 Figure 7 Timing Diagram for Output Shorted to VS Semiconductor Group 13 1998-02-01 TLE 5204 E1 = Low E2 Ι F1 Overcurrent Switching Threshold Ι Load 40 µ s VS VF V Q1 R ON x Ι Load VS R ON x Ι Load V Q2 VF EF AED01687 Figure 8 Timing Diagram for Overcurrent Semiconductor Group 14 1998-02-01 TLE 5204 Package Outlines P-TO220-7-1 (Plastic Transistor Single Outline) 10 +0.4 10.2 -0.2 1 x 45˚ +0.1 1.27 +0.1 8.6 ±0.3 15.4 ±0.3 8.8 -0.2 2.6 7 10.2 ±0.3 0.4 +0.1 1.27 0.6 +0.1 1) 4.5 ±0.4 0.6 M 7x 8.4 ±0.4 1) 0.75 -0.15 at dam bar (max 1.8 from body) 1) 0.75 -0.15 im Dichtstegbereich (max 1.8 vom Körper) GPT05108 P-TO220-7-8 (SMD) (Plastic Transistor Single Outline) 4.6 1.27 10.2 0.2 8.0 2.6 1.5 3.5 10.1 1) 8.8 1 16 ±0.4 19.5 max 2.8 3.75 4.6 -0.2 0.6 1.27 6 x 1.27 = 7.62 0.4 GPT05874 1) shear and punch direction burr free surface Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 15 Dimensions in mm 1998-02-01