5-A H-Bridge for DC-Motor Applications 1 Overview 1.1 Features • • • • • • • • • • • • Delivers up to 5 A continuous 6 A peak current Optimized for DC motor management applications Operates at supply voltages up to 40 V Very low RDS ON; typ. 200 mΩ @ 25 °C per switch Output full short circuit protected Overtemperature protection with hysteresis and diagnosis Short circuit and open load diagnosis with open drain error flag Undervoltage lockout CMOS/TTL compatible inputs with hysteresis No crossover current Internal freewheeling diodes Wide temperature range; − 40 °C < Tj < 150 °C Type Ordering Code Package TLE 5205-2 Q67000-A9283 P-TO220-7-11 TLE 5205-2GP Q67006-A9237 P-DSO-20-12 TLE 5205-2G Q67006-A9325 P-TO263-7-1 TLE 5205-2S Q67000-A9324 P-TO220-7-12 TLE 5205-2 P-TO220-7-11 P-DSO-20-12 P-TO263-7-1 Description P-TO220-7-12 The TLE 5205-2 is an integrated power H-bridge with DMOS output stages for driving DC-Motors. The part is built using the Infineon multi-technology process SPT® which allows bipolar and CMOS control circuitry plus DMOS power devices to exist on the same monolithic structure. Operation modes forward (cw), reverse (ccw), brake and high impedance are invoked from just two control pins with TTL/CMOS compatible levels. The combination of an extremely low RDS ON and the use of a power IC package with low thermal resistance and high thermal capacity helps to minimize system power dissipation. A blocking capacitor at the supply voltage is the only external circuitry due to the integrated freewheeling diodes. Data Sheet 1 2001-06-19 TLE 5205-2 Overview 1.2 Pin Configuration (top view) TLE 5205-2 1 2 3 4 5 TLE 5205-2GP 6 7 GND N.C. N.C. N.C. N.C. VS Q1 EF IN1 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 GND N.C. N.C. N.C. N.C. VS Q2 N.C. IN2 GND AEP01680 TLE 5205-2S EF OUT1 GND IN1 VS IN2 OUT2 AEP01990 TLE 5205-2G 1 2 3 4 5 6 1 2 7 3 4 5 6 7 OUT1 IN1 IN2 OUT2 EF GND V S AEP01991 OUT1 EF IN1 OUT2 IN2 GND VS AEP02513 Figure 1 Data Sheet 2 2001-06-19 TLE 5205-2 Overview 1.3 Pin Definitions and Functions Pin No. P-TO220 Pin No. P-DSO Symbol Function 1 7 OUT1 Output of Channel 1; Short-circuit protected; integrated freewheeling diodes for inductive loads. 2 8 EF Error Flag; TTL/CMOS compatible output for error detection; (open drain) 3 9 IN1 Control Input 1; TTL/CMOS compatible 4 1, 10, 11, 20 GND Ground; internally connected to tab 5 12 IN2 Control Input 2; TTL/CMOS compatible 6 6, 15 VS Supply Voltage; block to GND 7 14 OUT2 Output of Channel 2; Short-circuit protected; integrated freewheeling diodes for inductive loads. – 2, 3, 4, 5, N.C. 16, 17, 18, 19 Data Sheet Not Connected 3 2001-06-19 TLE 5205-2 Overview 1.4 Functional Block Diagram VS EF 6 2 Error Flag Diagnosis and Protection Circuit 1 IN1 IN2 IN 3 5 1 OUT 1 2 1 2 0 0 1 1 0 1 0 1 0 1 0 0 0 1 Z Z 7 OUT1 OUT2 Diagnosis and Protection Circuit 2 4 GND Figure 2 Data Sheet AEB02394 Block Diagram 4 2001-06-19 TLE 5205-2 Overview 1.5 Circuit Description Input Circuit The control inputs consist of TTL/CMOS-compatible schmitt-triggers with hysteresis. Buffer amplifiers are driven by this stages. Output Stages The output stages consist of a DMOS H-bridge. Integrated circuits protect the outputs against short-circuit to ground and to the supply voltage. Positive and negative voltage spikes, which occur when switching inductive loads, are limited by integrated freewheeling diodes. A monitoring circuit for each output transistor detects whether the particular transitor is active and in this case prevents the corresponding source transistor (sink transistor) from conducting in sink operation (source operation). Therefore no crossover currents can occur. 1.6 Input Logic Truth Table Functional Truth Table IN1 IN2 OUT1 OUT2 Comments L L H L Motor turns clockwise L H L H Motor turns counterclockwise H L L L Brake; both low side transistors turned-ON H H Z Z Open circuit detection Notes for Output Stage Symbol Value L Low side transistor is turned-ON High side transistor is turned-OFF H High side transistor is turned-ON Low side transistor is turned-OFF Z High side transistor is turned-OFF Low side transistor is turned-OFF Data Sheet 5 2001-06-19 TLE 5205-2 Overview 1.7 Monitoring Functions Undervoltage lockout (UVLO): When VS reaches the switch on voltage VS ON the IC becomes active with a hysteresis. All output transistors are switched off if the supply voltage VS drops below the switch off value VS OFF. 1.8 Protective Function Various errors like short-circuit to + VS, ground or across the load are detected. All faults result in turn-OFF of the output stages after a delay of 50 µs and setting of the error flag EF to ground. Changing the inputs resets the error flag. a. Output Shorted to Ground Detection If a high side transistor is switched on and its output is shorted to ground, the output current is internally limited. After a delay of 50 µs all outputs will be switched-OFF and the error flag is set. b. Output Shorted to + VS Detection If a low side transistor is switched on and its output is shorted to the supply voltage, the output current is internally limited. After a delay of 50 µs all outputs will be switched-OFF and the error flag is set. c. Overload Detection An internal circuit detects if the current through the low side transistor exceeds the trippoint ISDL. In this case all outputs are turned off after 50 µs and the error flag is set. d. Overtemperature Protection At a junction temperature higher than 150 °C the thermal shutdown turns-OFF, all four output stages commonly and the error flag is set with a delay. e. Open Load Detection The output Q1 has a 10 kΩ pull-up resistor and the output Q2 has a 10 kΩ pull-down resistor. If E1 and E2 are high, all output power stages are turned-OFF. In case of no load between Q1 and Q2 the output voltage Q1 is VS and Q2 is ground. This state will be detected by two comparators and an error flag will be set after a delay time of 50 µs. Changing the inputs resets the error flip flop. Data Sheet 6 2001-06-19 TLE 5205-2 Overview V EH = Pull UP 10 k Ω EF = Pull Down 10 k Ω V EL & 50 µ s RS FF AES02395 Figure 3 Data Sheet Simplified Schematic for Open Load Detection 7 2001-06-19 TLE 5205-2 Diagnosis 2 Diagnosis Various errors as listed in the table “Diagnosis” are detected. Short circuits and overload result in turning off the output stages after a delay tdSD and setting the error flag simultaneously [EF = L]. Changing the inputs to a state where the fault is not detectable resets the error flag (input toggling) with the exception of short circuit from OUT1 to OUT2 (load short circuit). Flag Open circuit between OUT1 and OUT2 Short circuit from OUT1 to OUT2 Short circuit from OUT1 to GND Short circuit from OUT2 to GND Short circuit from OUT1 to VS Short circuit from OUT2 to VS Overtemperature or undervoltage IN: IN1 IN2 OUT1 OUT2 EF Remarks Nr. 0 0 1 1 0 1 0 1 H L L Z L H L Z 1 1 1 0 1 2 3 4 0 0 1 1 0 1 0 1 VS/2 VS/2 VS/2 VS/2 L Z L Z 0 0 1 1 0 0 1 1 0 1 0 1 GND GND GND GND L H L L 0 1 1 1 0 0 1 1 0 1 0 1 H L L L GND GND GND GND 1 0 1 1 Not detectable 0 0 1 1 0 1 0 1 VS VS VS VS L H H H 1 0 0 1 Not detectable 0 0 1 1 0 1 0 1 H L H H VS VS VS VS 0 1 0 1 0 0 1 1 0 1 0 1 Z Z Z Z Z Z Z Z 0 0 0 0 Not detectable Not detectable Not detectable Not detectable Not detectable 5 6 7 8 Not detectable Not detectable Not detectable 9 10 11 12 Not detectable Not detectable Not detectable Not detectable Not detectable EF: 0 = Logic LOW OUT: Z = Output in tristate condition 1 = Logic HIGH = VS /2 due to internal Pull-up/down resistors 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1 = No error 0 = Error L = Output in sink condition H = Output in source condition Data Sheet 8 2001-06-19 TLE 5205-2 Electrical Characteristics 3 Electrical Characteristics 3.1 Absolute Maximum Ratings – 40 °C < Tj < 150 °C Parameter Symbol Limit Values Unit Remarks min. max. – 0.3 40 V – –1 40 V – 0.3 7 V t < 0.5 s; IS > – 5 A 0 V < VS < 40 V – 0.3 7 V – Voltages Supply voltage Logic input voltage Diagnostics output voltage VS VIN1, 2 VEF Currents of DMOS-Transistors and Freewheeling Diodes Output current (cont.) Output current (peak) Output current (peak) IOUT1, 2 IOUT1, 2 IOUT1, 2 –5 5 A – –6 6 A – – A tp < 100 ms; T = 1 s tp < 50 µs; T = 1 s; internally limitted; see overcurrent Temperatures Tj Tstg – 40 150 °C – – 50 150 °C – Junction case RthjC – 3 K/W P-TO220-7-11/12, P-TO263-7-1 Junction ambient RthjA – 65 K/W P-TO220-7-11/12 – 75 K/W P-TO263-7-1 – 5 K/W P-DSO-20-12 – 50 K/W P-DSO-20-12 Junction temperature Storage temperature Thermal Resistances Junction case Junction ambient RthjC RthjA Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Data Sheet 9 2001-06-19 TLE 5205-2 Electrical Characteristics 3.2 Operating Range Parameter Symbol Limit Values min. Supply voltage VS 3.3 After VS rising above VUV ON – 0.3 Outputs in tristate condition – 0.3 7 V – – 40 150 °C – Supply voltage decreasing Junction temperature V VUV ON V VUV OFF V – 0.3 VIN1, 2 Tj Remarks max. VUV ON 40 Supply voltage increasing Logic input voltage Unit Electrical Characteristics 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition min. typ. max. IS – – 10 mA IN1 = IN2 = LOW; VS = 13.2 V VUV ON VUV OFF VUV HY – 5.3 6 V 3.5 4.7 5.6 V 0.2 0.6 – V VS increasing VS decreasing VUV ON – VUV OFF Current Consumption Quiescent current Under Voltage Lockout UV-Switch-ON voltage UV-Switch-OFF voltage UV-ON/OFF-Hysteresis Data Sheet 10 2001-06-19 TLE 5205-2 Electrical Characteristics 3.3 Electrical Characteristics (cont’d) 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. Unit Test Condition typ. max. 220 350 mΩ 6 V < VS < 18 V Tj = 25 °C – 500 mΩ 6 V < VS < 18 V 350 500 mΩ – 800 mΩ 230 350 mΩ – 500 mΩ 400 600 mΩ – 1000 mΩ VS ON < VS ≤ 6 V Tj = 25 °C VS ON < VS ≤ 6 V 6 V < VS < 18 V Tj = 25 °C 6 V < VS < 18 V VS ON < VS ≤ 6 V Tj = 25 °C VS ON < VS ≤ 6 V Outputs OUT1, 2 Static Drain-Source-On Resistance Source IOUT = – 3 A Sink RDS ON H – RDS ON L – IOUT = 3 A Note: Values of RDS ON for VS ON < VS ≤ 6 V are guaranteed by design. Overcurrent Source shutdown trippoint Sink shutdown trippoint Shutdown delay time Data Sheet – ISDH ISDL tdSD – – 10 A – 8 – A 6 – – A – – 10 A – 8 – A 6 – – A Tj = – 40 °C Tj = 25 °C Tj = 150 °C Tj = – 40 °C Tj = 25 °C Tj = 150 °C 25 50 80 µs – 11 2001-06-19 TLE 5205-2 Electrical Characteristics 3.3 Electrical Characteristics (cont’d) 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition Short Circuit Current Limitation Source current – ISCH – – 20 A Sink current ISCL – – 15 A t < tdSD t < tdSD Pull up resistor RUP 5 10 20 kΩ – Pull down resistor RDOWN 5 10 20 kΩ – Switching threshold H VEH 2 2.5 3 V – Switching threshold L VEH 2 2.4 3 V – Detection delay time tdSD 25 50 80 µs – 20 µs IOUT = – 3 A Open Circuit Output Delay Times (Device Active for t > 1 ms) Source ON td ON H – 10 resistive load Sink ON td ON L – 10 20 µs IOUT = 3 A resistive load Source OFF td OFF H – 2 5 µs IOUT = – 3 A resistive load Sink OFF td OFF L – 2 5 µs IOUT = 3 A resistive load Data Sheet 12 2001-06-19 TLE 5205-2 Electrical Characteristics 3.3 Electrical Characteristics (cont’d) 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. typ. Unit Test Condition max. Output Switching Times (Device Active for t > 1 ms) Source ON tON H – 15 30 µs IOUT = – 3 A resistive load Sink ON tON L – 5 10 µs IOUT = 3 A resistive load Source OFF tOFF H – 2 5 µs IOUT = – 3 A resistive load Sink OFF tOFF L – 2 5 µs IOUT = 3 A resistive load Clamp Diodes Forward Voltage High-side Low-side VFH VFL – 1 1.5 V – 1.1 1.5 V IF = 3 A IF = 3 A ILKH ILKL – 100 – 50 – µA OUT1 = VS – 50 100 µA OUT2 = GND VINH VINL VINHY IINH IINL 2.8 2.5 – V – – 1.7 1.2 V – 0.4 0.8 1.2 V – –2 0 2 µA – 10 –4 0 µA VIN = 5 V VIN = 0 V Leakage Current Source Sink Logic Control Inputs IN 1, 2 H-input voltage threshold L-input voltage Hysteresis of input voltage H-input current L-input current Data Sheet 13 2001-06-19 TLE 5205-2 Electrical Characteristics 3.3 Electrical Characteristics (cont’d) 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition min. typ. max. VEFL IEFL – 0.25 0.5 V – – 10 µA IEF = 3 mA VEF = 7 V Thermal shutdown junction temperature TjSD 150 175 200 °C – Thermal switch-on junction temperature TjSO 120 – 170 °C – Temperature hysteresis ∆T – 30 – K – Shutdown delay time tdSD 25 50 80 µs – Error Flag Output EF Low output voltage Leakage current Thermal Shutdown Note: Values of thermal shutdown are guaranteed by design. Data Sheet 14 2001-06-19 TLE 5205-2 Electrical Characteristics Ι FU ; Ι S Ι EF Ι IN1 V EF Ι IN2 V IN1 6 2 3 5 EF VS IN1 TLE 5205-2 IN2 V IN2 4700 µ F 63 V 470 nF OUT1 OUT2 1 Ι OUT1 7 Ι OUT2 R Load VS GND V OUT1 V OUT2 4 Ι FL AES02396 Figure 4 IOUT Data Sheet Test Circuit Overcurrent Short Circuit Open Circuit ISD ISC IOC 15 2001-06-19 TLE 5205-2 Electrical Characteristics VIN V 5 t r = t f <_ 100 ns 50% t 0 Ι OUT Source t dONH A 3 t dOFFH 80% 50% 20% 0 Ι OUT Sink A 3 80% 50% 20% t ONH t OFFH t OFFL t ONL 80% 50% 20% 0 t 80% 50% 20% t dOFFL t t dONL AET01994 Figure 5 Switching Time Definitions +5V +V S 2 kΩ 2 µP 100 µF 6 3 5 EF VS IN1 TLE 5205-2 IN2 OUT1 1 100 nF OUT2 7 M ΙN =3A Ι BL = 6 A GND 4 AES02397 Figure 6 Data Sheet Application Circuit 16 2001-06-19 TLE 5205-2 Electrical Characteristics IN1, 2 Ι SCH Ι SDH Ι OUT1, 2 R Short x Ι SCH VOUT1, 2 t dSD V FL EF AED01997 Figure 7 Timing Diagram for Output Shorted to Ground IN1, 2 Ι SCL Ι SDL Ι OUT1, 2 VOUT1, 2 VS R Short x Ι SCL V FU t dSD EF AED01998 Figure 8 Data Sheet Timing Diagram for Output Shorted to VS 17 2001-06-19 TLE 5205-2 Electrical Characteristics Diagrams Quiescent Current IS (Active) versus Junction Temperature Tj AED02398 7 ΙS Static Drain-Source ON-Resistance versus Junction Temperature Tj AED02399 0.6 mA R ON 6 0.5 5 0.4 Low Side Transistor 0.3 V S = 18 V 4 0.2 3 VS =6V 2 1 -50 0 50 100 High Side Transistor 0.1 0 -50 C 150 0 50 Input Switching Thresholds VINH, L versus Junction Temperature Tj Clamp Diode Forward Voltage VF versus Junction Temperature Tj AED02400 V INH, L C 150 Tj Tj 3.0 100 AED02401 1.3 VF V INH 2.5 1.2 High Side Transistor 2.0 1.1 V INL 1.5 1.0 1.0 0.9 0.5 0.8 0 -50 0 50 100 0.7 -50 C 150 Tj Data Sheet Low Side Transistor 0 50 100 C 150 Tj 18 2001-06-19 TLE 5205-2 Electrical Characteristics Overcurrent Shutdown Threshold ISD versus Junction Temperature Tj Switching Threshold VEH, VEH versus Junction Temperature Tj AED02402 12 AED02404 3.0 Ι SD V EH ,V EL 2.8 10 Low Side Transistor 8 2.6 V EH High Side Transistor 6 2.4 4 2.2 2 2.0 0 -50 0 50 100 1.8 -50 C 150 Tj V EL 0 50 100 C 150 Tj Error-Flag Saturation Output Voltage VEF versus Junction Temperature Tj AED02403 0.6 V EF 0.5 0.4 0.3 0.2 0.1 0 -50 Data Sheet 0 50 100 C 150 Tj 19 2001-06-19 TLE 5205-2 Package Outlines 4 Package Outlines P-TO220-7-11 (Plastic Transistor Single Outline Package) 10 ±0.2 A 9.9 ±0.2 1.27 ±0.1 C 7x 0.6 ±0.1 1.6 ±0.3 3.9 ±0.4 0.25 M A C Typical Metal surface min. X=7.25, Y=12.3 All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. 20 8.4 ±0.4 GPT09083 6x 1.27 Data Sheet 0.5 ±0.1 2.4 0...0.15 1) 3.7 ±0.3 10.2 ±0.3 8.6 ±0.3 0.05 9.25 ±0.2 0...0.3 2.8 ±0.2 3.7 -0.15 1) 12.95 15.65 ±0.3 17 ±0.3 8.5 4.4 1) Dimensions in mm 2001-06-19 TLE 5205-2 Package Outlines B 5˚ ±3˚ -0.02 0.25 +0.0 7 1.3 1.2 -0.3 11 ±0.15 1) 2.8 3.5 max. 0 +0.15 3.25 ±0.1 P-DSO-20-12 (Plastic Dual Small Outline Package) 15.74 ±0.1 1.27 0.4 Index Marking 0.1 6.3 +0.13 0.25 M 20 11 1 1 x 45˚ 10 A 20x 14.2 ±0.3 Heatsink 0.95 ±0.15 0.25 M B 15.9 ±0.15 1) A 1) Does not include plastic or metal protrusion of 0.15 max. per side Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Data Sheet 21 GPS05791 Dimensions in mm 2001-06-19 TLE 5205-2 Package Outlines P-TO263-7-1 Option E3180 (Plastic Transistor Single Outline Package) 4.4 10 ±0.2 1.27 ±0.1 0...0.3 B 0.05 2.4 0.1 4.7 ±0.5 2.7 ±0.3 7.551) 1±0.3 9.25 ±0.2 (15) A 8.5 1) 0...0.15 7x0.6 ±0.1 6x 1.27 0.5 ±0.1 0.25 M A B 8˚ max. 1) Typical Metal surface min. X=7.25, Y=6.9 All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Data Sheet 22 GPT09114 0.1 B Dimensions in mm 2001-06-19 TLE 5205-2 Package Outlines P-TO220-7-12 (Plastic Transistor Single Outline Package) 10 ±0.2 A B 9.9 ±0.2 1.27 ±0.1 2.4 13 ±0.5 C 0.05 0.5 ±0.1 0...0.15 2.4 7x 0.6 ±0.1 6x 1.27 1) 0.25 M A B C Typical Metal surface min. X=7.25, Y=12.3 All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Data Sheet 9.25 ±0.2 2.8 ±0.2 3.7 -0.15 0...0.3 11±0.5 1) 12.95 17 ±0.3 15.65 ±0.3 8.5 4.4 1) 23 Dimensions in mm 2001-06-19