10-Bit, 40 MSPS, 3 V, 74 mW Analog-to-Digital Converter AD9203W Automotive Product FEATURES FUNCTIONAL BLOCK DIAGRAM CLK AVDD DRVDD CLAMP AD9203W CLAMPIN AINP STBY A/D AINN SHA A/D GAIN SHA D/A A/D GAIN 3-STATE D/A REFTF CORRECTION LOGIC REFBF BANDGAP REFERENCE VREF OUTPUT BUFFERS OTR 10 + – REFSENSE D0 (LSB) 0.5V AVSS D9 (MSB) PWRCON DFS DRVSS 10258-001 CMOS 10-bit, 40 MSPS sampling analog-to-digital converter Power dissipation: 74 mW (3 V supply, 40 MSPS) 17 mW (3 V supply, 5 MSPS) Operation between 2.7 V and 3.6 V supply Differential nonlinearity: −0.25 LSB Power-down (standby) mode: 0.65 mW ENOB: 9.55 at fIN = 20 MHz Out-of-range indicator Adjustable on-chip voltage reference IF undersampling up to fIN = 130 MHz Input range: 1 V to 2 V p-p differential or single-ended Adjustable power consumption Internal clamp circuit Qualified for automotive applications Figure 1. APPLICATIONS Automotive GENERAL DESCRIPTION The AD9203W is a monolithic low power, single supply, 10-bit, 40 MSPS analog-to-digital converter, with an on-chip voltage reference. The AD9203W uses a multistage differential pipeline architecture and guarantees no missing codes over the full operating temperature range. Its input range may be adjusted between 1 V and 2 V p-p. The AD9203W has an onboard programmable reference. An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of an application. An external resistor can be used to reduce power consumption when operating at lower sampling rates. This yields power savings for users who do not require the maximum sample rate. This feature is especially useful at sample rates far below 40 MSPS. Excellent performance is still achieved at reduced power. For example, 9.7 ENOB performance may be realized with only 17 mW of power, using a 5 MHz clock. A single clock input is used to control all internal conversion cycles. The digital output data is presented in straight binary or twos complementary output format by using the DFS pin. An out-of-range signal (OTR) indicates an overflow condition that can be used with the most significant bit to determine over- or underrange. The AD9203W can operate with a supply range from 2.7 V to 3.6 V, an attractive option for low power operation in high speed portable applications. The AD9203W is specified over industrial (−40°C to +85°C) temperature ranges and is available in a 28-lead TSSOP package. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. Low Power. The AD9203W consumes 74 mW on a 3 V supply operating at 40 MSPS. In standby mode, power is reduced to 0.65 mW. High Performance. Maintains better than 9.55 ENOB at 40 MSPS input signal from dc to Nyquist. Very Small Package. The AD9203W is available in a 28-lead TSSOP. Programmable Power. The AD9203W power can be further reduced by using an external resistor at lower sample rates. Built-In Clamp Function. Allows dc restoration of video signals. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved. AD9203W Automotive Product TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Characteristics ...............................................................5 Functional Block Diagram .............................................................. 1 ESD Caution...................................................................................5 General Description ......................................................................... 1 Pin Configuration and Function Descriptions..............................6 Product Highlights ........................................................................... 1 Outline Dimensions ..........................................................................7 Specifications..................................................................................... 3 Ordering Guide .............................................................................7 Absolute Maximum Ratings............................................................ 5 REVISION HISTORY 10/11—Revision 0: Initial Version Rev. 0 | Page 2 of 8 Automotive Product AD9203W SPECIFICATIONS AVDD = 3 V, DRVDD = 3 V, FS = 40 MSPS, input span from 0.5 V to 2.5 V, internal 1 V reference, PWRCON = AVDD, 50% clock duty cycle, TMIN to TMAX unless otherwise noted. Table 1. Parameter RESOLUTION MAX CONVERSION RATE PIPELINE DELAY DC ACCURACY Differential Nonlinearity Integral Nonlinearity Offset Error Gain Error ANALOG INPUT Input Voltage Range Input Capacitance Aperture Delay Aperture Uncertainty (Jitter) Input Bandwidth (–3 dB) Input Referred Noise INTERNAL REFERENCE Output Voltage (0.5 V Mode) Output Voltage (1 V Mode) Output Voltage Tolerance (1 V Mode) Load Regulation POWER SUPPLY Operating Voltage Analog Supply Current Digital Supply Current Symbol Min FS 40 DNL INL EZS EFS AIN CIN TAP TAJ BW ±0.7 ±1.4 ±2.8 ±4.0 LSB LSB % FSR % FSR 2 1.4 2.0 1.2 390 0.3 V p-p pF ns ps rms MHz mV 0.5 1 ±5 0.65 ± 30 1.2 V V mV mV 3.0 3.0 20.1 4.4 9.5 74 88.8 0.65 0.04 3.6 3.6 22.0 6.0 14.0 84.0 108.0 1.2 ± 0.25 V V mA mA mA mW mW mW % FSR 1 2.7 2.7 Power Consumption Power-Down Power Supply Rejection Ratio DYNAMIC PERFORMANCE (AIN = 0.5 dBFS) Signal-to-Noise and Distortion1 f = 4.8 MHz f = 20 MHz Effective Bits f = 4.8 MHz1 f = 20 MHz Signal-to-Noise Ratio f = 4.8 MHz1 f = 20 MHz Total Harmonic Distortion f = 4.8MHz f = 20 MHz Spurious-Free Dynamic Range f = 4.8 MHz1 f = 20 MHz 5.5 Unit Bits MSPS Clock Cycles ±0.25 ±0.65 ±0.6 ±0.7 VREF VREF AVDD DRVDD IAVDD IDRVDD Typ 10 PD PSRR Max SINAD 57.2 59.7 59.3 dB dB 9.2 9.6 9.55 Bits Bits 57.5 60.0 59.5 dB dB ENOB SNR THD −76.0 −74.0 −65.0 dB dB SFDR 67.8 80 78 Rev. 0 | Page 3 of 8 dB dB Conditions Switched, single-ended REFSENSE = VREF REFSENSE = GND 1.0 mA load fIN = 4.8 MHz, output bus load = 10 pF fIN = 20 MHz, output bus load = 20 pF fIN = 4.8 MHz, output bus load = 10pF fIN = 20 MHz, output bus load = 20 pF AD9203W Automotive Product Parameter Two-Tone Intermodulation Distortion Differential Phase Differential Gain DIGITAL INPUTS High Input Voltage Low Input Voltage Clock Pulse Width High Clock Pulse Width Low Clock Period2 DIGITAL OUTPUTS High-Z Leakage Data Valid Delay Data Enable Delay Data High-Z Delay LOGIC OUTPUT (with DRVDD = 3 V) High Level Output Voltage (IOH = 50 μA) High Level Output Voltage (IOH = 0.5 mA) Low Level Output Voltage (IOL= 1.6 mA) Low Level Output Voltage (IOL= 50 μA) 2 Min VIH VIL 2.0 Typ 68 0.2 0.3 Max Unit dB Degree % V V ns ns ns 0.4 11.25 11.25 25 IOZ tOD tDEN tDHZ ± 5.0 μA ns ns ns 5 6 6 VOH VOH VOL VOL Conditions f = 44.49 MHz and 45.52 MHz NTSC 40 IRE ramp 2.95 2.80 Output = 0 to DRVDD CL = 20 pF CL = 20 pF CL = 20 pF V V V V 0.3 0.05 Differential Input (2 V p-p). The AD9203W converts at clock rates as low as 20 kHz. N N+1 N+2 N–1 N+3 ANALOG INPUT N+4 N+6 N+5 CLOCK DATA OUT N–7 N–6 N–5 N–4 N–3 N–2 TOD = 3ns MIN 7ns MAX (CLOAD = 20pF) Figure 2. Timing Diagram Rev. 0 | Page 4 of 8 N–1 N N+1 10258-002 1 Symbol IMD DP DG Automotive Product AD9203W ABSOLUTE MAXIMUM RATINGS Table 2. Parameter AVDD DRVDD AVSS AVDD REFCOM CLK Digital Outputs AINP VREF REFSENSE REFTF, REFBF STBY CLAMP CLAMPIN PWRCON DFS 3-STATE Junction Temperature Storage Temperature Lead Temperature (10 s) With Respect to AVSS DRVSS DRVSS DRVDD AVSS AVSS DRVSS AINN AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS Rating –0.3 to +3.9 –0.3 to +3.9 –0.3 to +0.3 –3.9 to +3.9 –0.3 to +0.3 –0.3 to AVDD + 0.3 –0.3 to DRVDD + 0.3 AVSS – 0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 –0.3 to AVDD + 0.3 150 Unit V V V V V V V V V V V V V V V V V °C +150 °C 300 °C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL CHARACTERISTICS 28-Lead TSSOP JA = 97.9°C/W JC = 14.0°C/W ESD CAUTION Rev. 0 | Page 5 of 8 AD9203W Automotive Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DRVSS 1 28 AVDD DRVDD 2 27 AVSS (LSB) D0 3 26 AINN D1 4 25 AINP D2 5 24 REFBF D3 6 D5 8 23 VREF AD9203W 22 REFTF TOP VIEW (Not to Scale) 21 PWRCON D6 9 20 CLAMPIN D7 10 19 CLAMP D8 11 18 REFSENSE (MSB) D9 12 17 STBY OTR 13 16 3-STATE DFS 14 15 CLK 10258-003 D4 7 Figure 3. Pin Configuration Table 3. Pin Function Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Name DRVSS DRVDD D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 OTR DFS CLK 3-STATE STBY REFSENSE CLAMP CLAMPIN PWRCON REFTF VREF REFBF AINP AINN AVSS AVDD Description Digital Ground. Digital Supply. Bit 0, Least Significant Bit. Bit 1. Bit 2. Bit 3. Bit 4. Bit 5. Bit 6. Bit 7. Bit 8. Bit 9, Most Significant Bit. Out-of-Range Indicator. Data Format Select HI: Twos Complement; LO: Straight Binary. Clock Input. HI: High Impedance State Output; LO: Active Digital Output Drives. HI: Power-Down Mode; LO: Normal Operation. Reference Select. HI: Enable Clamp; LO: Open Clamp. Clamp Signal Input. Power Control Input. Top Reference Decoupling. Reference In/Out. Bottom Reference Decoupling. Noninverting Analog Input. Inverting Analog Input. Analog Ground. Analog Supply. Rev. 0 | Page 6 of 8 Automotive Product AD9203W OUTLINE DIMENSIONS 9.80 9.70 9.60 28 15 4.50 4.40 4.30 6.40 BSC 1 14 PIN 1 0.65 BSC 0.15 0.05 COPLANARITY 0.10 0.30 0.19 1.20 MAX SEATING PLANE 0.20 0.09 8° 0° 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153-AE Figure 4. 28-Lead Thin Shrink Small Outline Package [TSSOP] (RU-28) Dimensions shown in millimeters ORDERING GUIDE Model1, 2 AD9203WARUZ AD9203WARUZRL7 Temperature Range −40°C to +85°C −40°C to +85°C Package Description 28-Lead Thin Shrink Small Outline [TSSOP] 28-Lead Thin Shrink Small Outline [TSSOP] Package Option RU-28 RU-28 1 Z = RoHS Compliant Part. W = Qualified for Automotive Applications. 2 AUTOMOTIVE PRODUCTS The AD9203W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. Rev. 0 | Page 7 of 8 AD9203W Automotive Product NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10258-0-10/11(0) Rev. 0 | Page 8 of 8