UT54ACS374

Standard Products
UT54ACS374/UT54ACTS374
Octal D-Type Flip-Flops with Three-State Outputs
Datasheet
November 2010
www.aeroflex.com/logic
PINOUTS
20-Pin DIP
Top View
FEATURES
‰ 8 latches in a single package
‰ Three-state bus-driving true outputs
‰ Full parallel access for loading
‰ 1.2μ CMOS
- Latchup immune
‰ High speed
‰ Low power consumption
‰ Single 5 volt supply
‰ Available QML Q or V processes
‰ Flexible package
- 20-pin DIP
- 20-lead flatpack
‰ UT54ACS374 - SMD 5962-96590
‰ UT54ACTS374 - SMD 5962-96591
VDD
8Q
3
18
8D
4
17
7D
2Q
5
16
7Q
3Q
3D
6
7
15
14
6Q
6D
4D
4Q
8
9
13
12
5D
5Q
10
11
CLK
1
2
1D
2D
VSS
20-Lead Flatpack
Top View
DESCRIPTION
The UT54ACS374 and the UT54ACTS374 are non-inverting
octal D type flip-flops with three-state outputs designed for driving highly capacitive or relatively low-impedance loads. The
device is suitable for buffer registers, I/O ports, and bidirectional
bus drivers.
The eight flip-flops are edge triggered D-type flip-flops. On the
positive transition of the clock the Q outputs will follow the data
(D) inputs.
An output-control input (OC) places the eight outputs in either
a normal logic state (high or low logic level) or a high-impedance
state. The high-impedance third state and increased drive provide the capability to drive the bus line in a bus-organized system
without the need for interface or pull-up components.
OC
CLK
FUNCTION TABLE
OUTPUT
CLK
nD
nQ
L
↑
H
H
L
↑
L
L
L
L
X
nQ0
H
X
X
Z
1
20
VDD
1Q
2
19
8Q
1D
3
18
8D
2D
2Q
4
5
17
16
7D
7Q
3Q
6
15
6Q
3D
7
14
6D
4D
4Q
VSS
8
9
10
13
12
11
5D
5Q
CLK
(1)
(11)
1D (3)
(4)
2D
3D (7)
(8)
4D
5D (13)
6D (14)
7D (17)
8D (18)
The devices are characterized over full military temperature
range of -55°C to +125°C.
OC
OC
LOGIC SYMBOL
The output control OC does not affect the internal operations of
the flip-flops. Old data can be retained or new data can be entered while the outputs are off.
INPUTS
20
19
OC
1Q
EN
C1
1D
(2)
1Q
(5)
2Q
(6) 3Q
(9)
(12)
(15)
(16)
(19)
4Q
5Q
6Q
7Q
8Q
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
1
LOGIC DIAGRAM
8D
7D
(18)
6D
(17)
5D
(14)
4D
(13)
3D
(8)
2D
CLK OC
1D
(7)
(4)
(3)
DC
D C
DC
D C
D C
D C
D C
D C
Q
Q
Q
Q
Q
Q
Q
Q
(19)
8Q
(16)
7Q
(15)
6Q
(12)
5Q
(9)
4Q
2
(6)
3Q
(5)
2Q
(2)
1Q
(11) (1)
OPERATIONAL ENVIRONMENT1
PARAMETER
LIMIT
UNITS
Total Dose
1.0E6
rads(Si)
SEU Threshold 2
80
MeV-cm2/mg
SEL Threshold
120
MeV-cm2/mg
Neutron Fluence
1.0E14
n/cm2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
LIMIT
UNITS
VDD
Supply voltage
-0.3 to 7.0
V
VI/O
Voltage any pin
-.3 to VDD +.3
V
TSTG
Storage Temperature range
-65 to +150
°C
TJ
Maximum junction temperature
+175
°C
TLS
Lead temperature (soldering 5 seconds)
+300
°C
ΘJC
Thermal resistance junction to case
20
°C/W
II
DC input current
±10
mA
PD
Maximum power dissipation
1
W
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at
these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMIT
UNITS
VDD
Supply voltage
4.5 to 5.5
V
VIN
Input voltage any pin
0 to VDD
V
TC
Temperature range
-55 to + 125
×C
3
DC ELECTRICAL CHARACTERISTICS 7
(VDD = 5.0V ±10%; VSS = 0V 6, -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
VIL
VIH
IIN
PARAMETER
CONDITION
MIN
Low-level input voltage 1
ACTS
ACS
High-level input voltage 1
ACTS
ACS
MAX
UNIT
0.8
.3VDD
V
.5VDD
.7VDD
V
Input leakage current
ACTS/ACS
VIN = VDD or VSS
Low-level output voltage 3
ACTS
ACS
IOL = 8.0mA
IOL = 100μA
High-level output voltage 3
ACTS
ACS
IOH = -8.0mA
IOH = -100μA
IOZ
Three-state output leakage current
VO = VDD and VSS
-20
20
μA
IOS
Short-circuit output current 2 ,4
ACTS/ACS
VO = VDD and VSS
-200
200
mA
Output current10
VIN = VDD or VSS
8
mA
(Sink)
VOL = 0.4V
Output current10
VIN = VDD or VSS
-8
mA
(Source)
VOH = VDD - 0.4V
Ptotal
Power dissipation 2, 8, 9
CL = 50pF
1.9
mW/
MHz
IDDQ
Quiescent Supply Current
VDD = 5.5V
10
μA
Quiescent Supply Current Delta
For input under test
1.6
mA
VOL
VOH
IOL
IOH
ΔIDDQ
ACTS
-1
1
μA
0.40
0.25
V
.7VDD
VDD - 0.25
V
VIN = VDD - 2.1V
For all other inputs
VIN = VDD or VSS
VDD = 5.5V
CIN
COUT
Input capacitance 5
ƒ = 1MHz @ 0V
15
pF
Output capacitance 5
ƒ = 1MHz @ 0V
15
pF
4
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density ≤ 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765
pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose ≤ 1E6 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
5
AC ELECTRICAL CHARACTERISTICS 2
(VDD = 5.0V ±10%; VSS = 0V 6, -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
PARAMETER
MINIMUM
MAXIMUM
UNIT
tPLH
CLK to Qn
1
15
ns
tPHL
CLK to Qn
1
18
ns
tPZL
OC low to Qn active
1
13
ns
tPZH
OC low to Qn active
1
13
ns
tPLZ
OC high to Qn three-state
1
11
ns
tPHZ
OC high to Qn three-state
1
12
ns
fMAX
Maximum clock frequency
71
MHz
tSU
Data setup time before CLK ↑
5
ns
tH
Data hold time after CLK ↑
2
ns
tW
Minimum pulse width
CLK high, CLK low
7
ns
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for radiation dose ≤ 1E6 rads(Si).
6
PACKAGING
Side-Brazed Packages
7
FLATPACK PACKAGES
8
UT54ACS374/UT54ACTS374: SMD
5962 * ***** ** * * *
Lead Finish: (Notes 1 & 2)
A = Solder
C = Gold
X = Optional
Package Type:
X = 20-lead ceramic bottom-brazed dual-in-line Flatpack
C = 20-lead ceramic side-brazed dip
Class Designator:
Q = QML Class Q
V = QML Class V
Device Type:
01
Drawing Number:
96590 = UT54ACS374
96591 = UT54ACTS374
Total Dose: (Notes 3 & 4)
R = 1E5 rads(Si)
F = 3E5 rads(Si)
G = 5E5 rads(Si)
H = 1E6 rads(Si)
Notes:
1. Lead finish (A,C, or X) must be specified.
2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).
3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For prototype inquiries, contact factory.
4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test Method 1019
Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5 rads(Si), and is tested in
accordance with MIL-STD-883 Test Method 1019 Condition A.
9
Aeroflex Colorado Springs - Datasheet Definition
Advanced Datasheet - Product In Development
Preliminary Datasheet - Shipping Prototype
Datasheet - Shipping QML & Reduced Hi-Rel
COLORADO
Toll Free: 800-645-8862
Fax: 719-594-8468
INTERNATIONAL
Tel: 805-778-9229
Fax: 805-778-1980
NORTHEAST
Tel: 603-888-3975
Fax: 603-888-4585
SE AND MID-ATLANTIC
Tel: 321-951-4164
Fax: 321-951-4254
WEST COAST
Tel: 949-362-2260
Fax: 949-362-2266
CENTRAL
Tel: 719-594-8017
Fax: 719-594-8468
www.aeroflex.com
[email protected]
Aeroflex UTMC Microelectronic Systems Inc. (Aeroflex)
reserves the right to make changes to any products and
services herein at any time without notice. Consult Aeroflex
or an authorized sales representative to verify that the
information in this data sheet is current before using this
product. Aeroflex does not assume any responsibility or
liability arising out of the application or use of any product
or service described herein, except as expressly agreed to in
writing by Aeroflex; nor does the purchase, lease, or use of a
product or service from Aeroflex convey a license under any
patent rights, copyrights, trademark rights, or any other of the
intellectual rights of Aeroflex or of third parties.
Our passion for performance is defined by three
attributes represented by these three icons:
solution-minded, performance-driven and customer-focused
10