RAD1419 Analog-to-Digital Converter (3/16)

Standard Products
RAD1419A Analog-to-Digital
Converter
Data Sheet
March 2016
The most important thing we build is trust
INTRODUCTION
FEATURES
 800/825 kSPS sample rate
 150mW power dissipation




Military Temp Range -55oC to 125oC available
Typical performance: 81.5dB S/(N + D) and 93dB THD
No pipeline delays or missing codes
Nap and shutdown modes
o
 Operates with 2.5V internal 15ppm/ C reference or external
reference
 True differential inputs reject common mode noise
 20MHz full-power bandwidth sampling
 Bipolar input range: +2.5V
 Operational Environment; total dose irradiation testing to MILSTD-883 Method 1019
- Total-dose: 100 krad(Si)
- Latchup immune (LET < 60 MeV-cm2/mg)
- No destructive latchups above 60MeV-cm2/mg
 Class S A-to-D Converter built to your custom flow or from
inventory
Cobham RAD Solutions’ (formerly Aeroflex RAD) RAD1419A
Analog-to-Digital Converter (ADC) is a 1s, 800/825kSPS, 14-bit
sampling A/D converter that draws only 150mW from +5V
supplies. This easy-to-use device includes a high dynamic range
sample-and-hold and a precision reference. Two digitally
selectable power shutdown modes provide flexibility for low
power systems.
The RAD1419A has a full-scale input range of ±2.5V. Outstanding
AC performance includes 81.5dB S/(N + D) and 93dB THD with
a 100kHz input; 80dB S/(N + D) and 86dB THD at the Nyquist
input frequency of 400kHz.
The unique differential input sample-and-hold can acquire
single-ended or differential input signals up to its 20MHz
bandwidth. The 60dB common mode rejection allows
users to eliminate ground loops and common mode noise
by measuring signals differentially from the source.
The ADC has a P compatible, 14-bit parallel output port.
There is no pipeline delay in the conversion results. A separate
convert start input and data ready signal (BUSY) ease connections
to FIFOs, DPSs and microprocessors.
Figure 1. RAD1419A Block Diagram
1
+AIN
1
28
AVDD
-AIN
2
3
27
REF
26
DVDD
VSS
REFcomp
AGND
4
5
25
24
23
BUSY\
CS\
CONVST\
22
21
RD\
SHDN\
20
D0
D13
6
D12
7
D11
D10
8
9
D9
D8
10
11
D7
D6
12
13
DGND
14
RAD1419A
19
D1
18
D2
17
16
15
D3
D4
PIN DESCRIPTION
No.
+AIN
1
+2.5V Positive analog input
-AIN
2
+2.5V Negative analog input
VREF
3
REFcomp
4
AGND
5
2.5V Reference output. Bypass to AGND with
1F.
4.06V Reference output. Bypass to AGND with
10Ftantalum in parallel with 0.1F or 10F ceramic.
Analog ground
D13 to D6
DGND
D5
D5 to D0
Figure 2. RAD1419A Pinout
SHDN\
RD\
CONVST\
CS\
BUSY\
VSS
DVDD
AVDD
2
Description
Pin Name
6-13 Three-state data outputs. The output format is 2’s
complement.
14 Digital ground for internal logic.
Tie to AGND.
0-5 Three-state data outputs. The output format is 2’s
complement.
21 Power shutdown input. Low selects shutdown.
Shutdown mode selected by CS\. CS\ = 0 nap
mode and CS\ = 1 for sleep mode.
22 Read input. This enables the output drivers when
CS\ is low.
23 Conversion start signal. This active low signal
starts a conversion on its falling edge.
24 Chip select. The input must be low for the ADC to
recognize CONVST\ and RD\ inputs. CS\ also sets
the shutdown mode when SHDN\ goes low. CS\
and SHDN\ low select the quick wake-up nap
mode. CS\ high and SHDN\ low select sleep mode.
25 The BUSY\ output shows the converter status. It is
low when a conversion is in progress. Data valid
on the rising edge of BUSY\.
26 5V Negative supply. Bypass to AGND with 10F
tantalum in parallel with 0.1F or 10F ceramic.
27 5V Positive supply. Short to Pin 28.
28
5V Positive Supply. Bypass to AGND with10F
tantalum in parallel with 0.1F or 10F ceramic.
OPERATIONAL ENVIRONMENT
PARAMETER
LIMIT
UNITS
Total Ionizing Dose (TID)
1.0E5
rad(Si)
Single Event Latchup (SEL)
<60
MeV-cm2/mg
Neutron Fluence1
1.0E13
n/cm2
(Referenced to VSS)
Notes:
1. Guaranteed but not tested.
ABSOLUTE MAXIMUM RATINGS1
SYMBOL
PARAMETER
LIMITS
VDD
Supply voltage
6.0V
VSS
Negative supply voltage
-6.0V
VDD to VSS
Total supply voltage
12.0V
TSTG
Storage temperature
-65 to +150C
PD
Maximum power dissipation
TJ
Maximum junction temperature
RJC
Thermal resistance, junction-to-case2
500mW
150oC
7.5oC/Watt
Analog input voltage3
VSS -0.3V to VDD +0.3V
Digital input voltage4
VSS -0.3V to 10V
Notes:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at
these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability and performance.
2. Test per MIL-STD-883, Method 1012.
3. When these pin voltages are taken below VSS or above VDD, they will be clamped by internal diodes. This product can handle input currents greater than 100mA below
VSS or above VDD without latchup.
4. When these pin voltages are taken below VSS, they will be clamped by internal diodes. This product can handle input currents greater than 100mA below VSS without
latchup. These pins are not clamped to VDD.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VSS to VDD
TC
PARAMETER
LIMITS
Input/output voltage
-0.5V to +0.5V
Case temperature range
-55 to +125C
3
ELECTRICAL CHARACTERISTICS
CONVERTER CHARACTERISTICS
*Denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = +25°C. With Internal
Reference.5,6
SYMBOL
PARAMETER
CONDITIONS
MIL TEMP*
MIN
14
TYP
MAX
UNITS
Resolution
(No Missing Codes)
X
INL
Integral Linearity
Error
Note 7
X
±0.8
±2
LSB
DNL
Differential
Linearity Error
X
±0.7
±0.7
±1.5
±2
LSB
LSB
±5
±20
LSB
±10
±60
LSB
Offset Error
Full scale Error
Internal Reference
Full scale Error
ExternalReference
Full Scale Tempco
X
Note 8
Bits
2.5V
±5
LSB
IOUT(REF) = 0
±15
ppm/°C
ANALOG INPUT
*Denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = +25°C.5
SYMBOL
PARAMETER
VIN
Analog Input
Range
IIN
Analog Input
Leakage Current
CIN
CIN
tACQ
tAP
tJITTER
CMRR
Analog Input
Capacitance
Analog Input
Capacitance
Sample-and-Hold
Acquisition Time
Sample-and-Hold
Aperture Delay
Time
Sample-and-Hold
Aperture Delay
Time Jitter
Analog Input
Common Mode
Rejection Ratio
CONDITIONS
4.75V < VDD < 5.25V,
MIL TEMP*
X
-5.25V < VSS< -4.75V *
CS\ = HIGH
MIN
TYP
MAX
±2.5
X
UNITS
V
±1
μA
Between Conversions
15
pF
During Conversions
5
pF
Note 9*
X
-2.5V < (-AIN = AIN) < 2.5V
4
90
300
ns
-1.5
ns
2
psRMS
60
dB
DYNAMIC ACCURACY
*Denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = +25°C.5
SYMBOL
PARAMETER
S/(N + D)
Signal-to (Noise +
Distortion) Ratio
S/(N + D)
Signal-to (Noise +
Distortion) Ratio
Total Harmonic
Distortion
Total Harmonic
Distortion
Spurious Free
Dynamic Range
THD
THD
SFDR
IMD
Intermodulation
Distortion
Full-Power
Bandwidth
Full-Linear
Bandwidth
CONDITIONS
MIL TEMP*
MIN
TYP
78
81.5
dB
dB
100 KHz Input Signal
X
390 KHz Input Signal
X
80.0
X
-93
X
-86
X
-95
100 KHz Input Signal, First 5
Harmonics
390 KHz Input Signal, First 5
Harmonics
100 KHz Input Signal
fIN1 = 29.37 KHz,
fIN2 = 32.446 KHz
S/(N + D) > 77dB
MAX
-86
UNITS
dB
dB
-86
dB
-86
dB
20
MHz
1
MHz
INTERNAL REFERENCE CHARACTERISTICS5
SYMBOL
PARAMETER
CONDITIONS
VREF
Output Voltage
IOUT = 0
VREF
Output Tempco
VREF
Line Regulation
IOUT = 0
4.75V < VDD < 5.25V,
VREF
Output Resistance
-5.25V < VSS < -4.75V
-0.1mA < | IOUT | < 0.1mA
Output Voltage
IOUT = 0
REFCOMP
MIL TEMP*
5
MIN
TYP
MAX
UNITS
2.480
2.500
2.520
V
±15
ppm/°C
0.05
LSB/V
2
kΩ
4.06
V
DIGITAL INPUTS AND DIGITAL OUTPUTS
*Denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = +25°C.5
SYMBOL
TEST
TEST CONDITION
MIL TEMP*
MIN
X
2.4
TYP
MAX
UNITS
VIH
High Level Input
Voltage
VDD = 5.25V
VIL
Low Level Input
Voltage
VDD = 4.75V
IIN
Digital Input
Current
CIN
Digital Input
Capacitance
VOH
High Level Output
Voltage
VDD = 4.75V
VOH
High Level
Output Voltage
VDD = 4.75V
VOL
Low Level Output
Voltage
VDD = 4.75V
VOL
Low Level
Output Voltage
VDD = 4.75V
IOZ
High-Z Output
Leakage D13 to
D0
COZ
High-Z Output
Capacitance D13
to D0
CS\ High, Note 9 *
Output Source
Current
VOUT = 0V
-10
mA
Output Sink
Current
VOUT = VDD
10
mA
ISOURCE
ISINK
Note 12
Note 12
VIN = 0V to VDD
X
0.8
V
X
±10
μA
X
IO = -10μA*
X
IO = -200μA
IO = 160μA
IO = 1.6mA *
VOUT = 0V to VDD,
CS\ High *
6
V
5
pF
4.5
V
4.0
V
X
0.05
X
0.10
V
0.4
V
X
±10
μA
X
15
pF
POWER REQUIREMENTS
*Denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = +25°C.5
SYMBOL
VDD
VSS
IDD
IDD
IDD
ISS
PARAMETER
Positive Supply
Voltage
Negative Supply
Voltage
CONDITIONS
MIL TEMP*
TYP
5.25
V
Note 10
-4.75
-5.25
V
20
mA
11
X
Nap Mode:
SHDN\ = 0V, CS\ = 0V
Sleep Mode:
SHDN\ = 0V, CS\ = 5V
X
X
Negative Supply
Current
1.5
mA
250
μA
X
19
X
100
μA
X
1
μA
X
150
240
mW
1.2
mW
Nap Mode:
SHDN\ = 0V, CS\ = 0V
Sleep Mode:
SHDN\ = 0V, CS\ = 5V
PDIS
Power
Dissipation
Nap Mode:
SHDN\ = 0V, CS\ = 0V
X
7.5
PDIS
Power
Dissipation
Sleep Mode:
SHDN\ = 0V, CS\ = 5V
X
1.2
ISS
PDIS
UNITS
4.75
Negative Supply
Current
Negative Supply
Current
Power Dissipation
ISS
MAX
Note 10
Positive Supply
Current
Positive Supply
Current
Positive Supply
Current
MIN
7
30
mA
mW
TIMING CHARACTERISTICS
*Denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = +25°C.5
SYMBOL
fSAMPLE
(MAX)
PARAMETER
Maximum
Sampling
Frequency
tCONV
Conversion Time
tACQ
Acquisition Time
tACQ +
Acquisition +
Conversion Time
CONV
t1
t2
t3
t4
t5
t6
CS\ to RD\ Setup
Time
CS\ to CONVST\
Setup Time
CS\ to SHDN\
Setup Time
SHDN\ to
CONVST\ Wakeup Time
CONVST\ Low
Time
CONVST\ to
BUSY\ Delay
t6
CONVST\ to
BUSY\ Delay
t7
Data Ready Before
BUSY\
t7
Data Ready Before
BUSY\
t8
Delay Between
Conversions
CONDITIONS
MIL TEMP*
Note 9
X
MIN
TYP
MAX
800
UNITS
kHz
X
950
1150
ns
Note 9
X
90
300
ns
Note 9
X
1040
1250
ns
Note 9
X
Note 9
X
40
ns
Note 9
X
40
ns
Note 10
X
Notes 9, 11
X
CL = 25pF
X
CL = 25pF
X
X
0
ns
400
ns
40
ns
20
ns
50
20
50
ns
ns
15
t9
t10
Wait Time RD\
After BUSY\
Data Access Time
After RD\
Note 9
X
ns
40
Note 9
X
X
Note 9
CL = 25pF
X
CL = 25pF, Note 9
X
t10
Data Access Time
After RD\
t10
Data Access Time
After RD\
t10
Data Access Time
After RD\
CL = 100pF, Note 9
X
t11
Bus Relinquish
Time
Note 9
X
CL = 100pF, Note 9
X
8
ns
-5
ns
15
20
10
25
ns
35
ns
35
ns
50
ns
20
ns
TIMING CHARACTERISTICS (Cont’d)
*Denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = +25°C.5
SYMBOL
RD\ Low Time
CONVST\ High Time
PARAMETER
t12
t13
CONDITIONS
Note 9
Note 9
MIL TEMP*
MIN
X
X
10
40
TYP
MAX
UNITS
ns
ns
Notes:
Parameters listed only as "Typical" are not tested in production.
1. Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
2. All voltage values are with respect to ground with DGND and AGND wired together unless otherwise noted.
3. When these pin voltages are taken below VSS or above VDD, they will be clamped by internal diodes. This product can handle input currents greater than 100mA
below VSS or above VDD without latch up.
4. When these pin voltages are taken below VSS, they will be clamped by internal diodes. This product can handle input currents greater than 100mA below VSS
without latch up. These pins are not clamped to VDD.
5. VDD = 5V, VSS = -5V, fSAMPLE = 800kHz, tr = tf = 5ns unless otherwise specified.
6. Linearity, offset and full-scale specifications apply for a single ended +AIN input with - AIN grounded.
7. Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured
from the center of the quantization band.
8. Bipolar offset is the offset voltage measured from -0.5LSB when the output code flickers between 0000 0000 0000 00 and 1111 1111 1111 11.
9. Guaranteed by design or characterization, not subject to test in production.
10. Recommended operating conditions.
11. The falling edge of CONVST\ starts a conversion. If CONVST\ returns high at a critical point during the conversion it can create small errors. For best performance ensure that CONVST\ returns high either within 650ns after the start of the conversion or after BUSY rises.
12. VIH and VIL will be guaranteed by testing VOH and VOL at the appropriate levels.
9
S/(N+D) vs Input Frequency
and Amplitude
Spurious-Free Dynamic Range
vs Input Frequency
Integral Nonlinearity
vs Output Code
Signal-to-Noise Ratio
Distortion vs Input Frequency
Intermodulation Distortion Plot
Differential Nonlinearity
vs Output Code
Power Supply Feedthrough
vs Ripple Frequency
Figure 2. Typical Performance Characteristics
10
Input Common Mode Rejection
vs Input Frequency
PACKAGING
Figure 4. 28-Lead Hermetic Ceramic Flatpack
11
ORDERING INFORMATION
RAD1419A: Please see the RAD1419A SCD for order information.
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Cobham RAD Solutions - Datasheet Definition
Datasheet - Class S Compliant
The following United States (U.S.) Department of Commerce statement shall be applicable if these commodities, technology, or software are exported from the U.S.: These commodities, technology, or software were
exported from the United States in accordance with the Export Administration Regulations. Diversion contrary to U.S. law is prohibited.
Aeroflex RAD Inc, dba Cobham RAD Solutions
5030 Centennial Blvd
Colorado Springs, CO 80907
E: [email protected]
T: 719-531-0800
Aeroflex RAD, Inc.Inc., dba Cobham RAD Solutions, reserves the right to make changes to any products and services described herein at any time
without notice. Consult Aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this
product. Aeroflex does not assume any responsibility or liability arising out of the application or use of any product or service described herein,
except as expressly agreed to in writing by Aeroflex; nor does the purchase, lease, or use of a product or service from Aeroflex convey a license
under any patent rights, copyrights, trademark rights, or any other of the intellectual rights of Aeroflex or of third parties.
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