AN-1211 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Powering the AD9268 Dual Channel 16-Bit, 125 MSPS Analog-to-Digital Converter with the ADP2114 Synchronous Step-Down DC-to-DC Regulator for Increased Efficiency The AD9268 is a low power ADC optimized for communication applications digitizing analog input frequencies up to 300 MHz. This ADC has over 78 dB of SNR, which is ideal for communication applications where high dynamic range and low power are key. The AD9268 includes an on-chip clock divider (1 to 8), which can improve the jitter performance of the incoming clock signal, thereby improving noise performance at higher analog input frequencies. The AD9268’s on-chip dither function can be enabled to improve INL and SFDR. CIRCUIT FUNCTION AND BENEFITS This circuit utilizes the ADP2114 dual channel synchronous step-down dc-to-dc regulator to provide the individual power supply rails required for the AD9268 dual channel, 16-bit, 125 MSPS, 1.8 V, dual ADC. The ADP2114 is shown to power the AD9268 at 85% efficiency, which is 35% higher efficiency than using a traditional linear regulator solution. This increased efficiency results in lower system level power consumption with no degradation in the performance of the AD9268. The ADP2114 is a low noise dc-to-dc regulator, which provides two synchronous buck channels (2 A/2 A or 3 A/1 A combinations) at up to 95% efficiency. The ADP2114 has a selectable switching frequency of 300 kHz, 600 kHz, or 1.2 MHz or can be externally synchronized to frequencies from 200 kHz to 2 MHz. VIN 3.6V 22µF 22µF 10Ω 100kΩ 3 15kΩ VIN 10000pF VOUT_1.8VB 15kΩ 10000pF TO PIN 32 OF ADP2114 100pF 27 26 25 14 15 16 29 2 FB1 L1 FB2 2.2µF 22µF 13kΩ 1.8V @ ~390mA 0.1µF 22µF 1500pF TO PIN 9 OF ADP2114 100pF FB3 20 19 EPAD VOUT_1.8VA 2200pF 6 PGND1 PGND2 PGND3 PGND4 4.75kΩ 10.5kΩ COMP1 24 SYNC_CLKOUT SW1 23 OPCFG SW2 28 ADP2114 EN1 12 31 V1SET PGOOD2 32 7 FB1 COMP2 30 SS1 18 SW3 13 17 EN2 SW4 10 V2SET 9 FB2 11 SS2 GND PAD 5 21 27kΩ PGOOD1 FREQ 1 VIN SCFG 22 SW_FREQ VDD 4 100kΩ VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 8 1µF L2 FB4 2.2µF 22µF 22µF 1.8V @ ~55mA 0.1µF PART NUMBERS: FB1-4 = EXC-ML20A390U, 50Ω@ 100MHz L1, L2 = FDV0630-2R2M 22µF = GRM21BR60J226ME39L 1µF = ECJ-0EF0J105Z DRVDD AVDD AD9268 08663-001 AD9268 DECOUPLING NOT SHOWN: 4, 0.1µF CAPS USED FOR AVDD 4, 0.01µF CAPS USED FOR AVDD 4, 0.1µF CAPS USED FOR DRVDD Figure 1. ADP2114 Connected to the AD9268 (Simplified Schematic: Decoupling and All Connections Not Shown) Rev. A | Page 1 of 3 AN-1211 Application Note CIRCUIT DESCRIPTION Table 1. Devices Connected/Referenced Product AD9268 ADP2114 Description Dual channel, 16-bit, 125 MSPS, 1.8 V analog-todigital converter Configurable, dual 2 A/Single 4 A, synchronous step-down dc-to-dc regulator 08663-002 Figure 1 shows this ADP2114 power supply solution, which supplies all the necessary input power rails to the AD9268 ADC. The input to the ADP2114 is a +3.6 V dc bus supply with low ripple. The two ADP2114 outputs are connected to the two AD9268 required supplies, including the AVDD rail (+1.8 V at 390 mA) and the DRVDD rail (+1.8 V at 55 mA). The switching frequency of the ADP2114 is set at 1.2 MHz by the 27 kΩ resistor connected to the FREQ pin. The high switching frequency allows the use of smaller external components reducing the overall board space requirement for the power supply solution. The ADP2114 is set for dual 2 A forced PWM output mode by setting the resistor connected to the OPCFG pin to 4.75 kΩ. Each output utilizes a two-stage LC filter with the first stage utilizing an inductor (L1, L2) and the second stage utilizing a ferrite bead (FB1, FB3) with the feedback loop closed around both stages. This requires a lower loop crossover frequency to maintain stability. An additional ferrite bead (FB2, FB4) is utilized after the regulator for further filtering. After this ferrite bead, the voltages are distributed to the power planes on the PCB where localized decoupling is utilized at the AD9268. Figure 2 shows an FFT from the AD9268 with a 70 MHz analog input frequency and sample clock of 125 MSPS. The FFT noise floor shows no degradation when compared with a linear regulator power supply solution and shows no measurable frequency components or spurs associated with the switching frequency. Table 2 shows ac performance data taken on the AD9268 at 125 MSPS using ADP1706 family linear regulators versus the ADP2114 dc-to-dc regulator. Signal-to-noise with respect to full-scale (SNRFS) and spurious free dynamic range (SFDR) are presented across a wide range of analog input frequencies from 10.3 MHz to 200.3 MHz. The results show no degradation in SNR, SFDR, or dynamic range when using the ADP2114 switching regulator design versus a traditional LDO solution. The efficiency results in Table 3 compare the overall efficiency of an LDO regulator design to the ADP2114 based switching regulator design. Both evaluation boards used for this experiment use the same in-line or bus voltage of 3.6 V in order to calculate the power loss comparison appropriately from input to output for each regulator solution. The switching regulator (ADP2114) design provides an overall improvement in efficiency of 35%. This is roughly a 600 mW power savings for a single AD9268. These savings quickly translate into further power savings when multiple devices are utilized in a system. Figure 2. Output Spectrum with 70 MHz AIN at –1 dBFS, Sampling Rate = 125 MSPS, with ADP2114 Supplies Table 2. AD9268 Performance Using ADP2106-Family LDOs vs. ADP2114 DC-to-DC Regulator Analog Input Frequency (MHz) 10.3 70.0 100.3 140.3 170.3 200.3 SNR (dBFS) 79.2 78.5 77.8 76.9 76.2 75.0 Linear Supplies SFDR (dBc) 92.2 91.0 85.8 85.0 84.3 76.9 Rev. A | Page 2 of 3 SNR (dBFS) 79.2 78.4 77.7 76.9 75.9 75.0 DC-to-DC Supply SFDR (dBc) 92.3 90.8 85.6 84.8 84.6 77.0 Application Note AN-1211 LEARN MORE Table 3. Linear vs. Switching Regulator Efficiency Input Voltage/Current Output Voltage/Current Overall Efficiency Linear Regulators 3.6 V/0.433 mA (1.5588 W) 1.8 V/0.433 mA (0.7794 W) ADP2114 Switching Regulator 3.6 V/0.255 mA (0.918 W) 1.8 V/0.433 mA (0.7794 W) 50% 85% Analog Devices ADIsimPower™ Regulator Interactive Design Tool. Data Sheets and Evaluation Boards ADP2114 Data Sheet ADP2114 Evaluation Board AD9268 Data Sheet Proper layout and circuit partitioning are key to a successful design when using a dc-to-dc regulator such as the ADP2114. Use tightly coupled PCB stackup (power and ground planes) to improve bypassing. Switching inductors should be mounted far from the ADC and sensitive components in the ADC’s clock and signal paths, or on the opposite side of the PCB to help eliminate magnetic flux coupling to sensitive components. Take the time to understand current flow, as well as component or adjacent circuitry placement. Ensure good isolation between circuits. COMMON VARIATIONS AD9268 Evaluation Board REVISION HISTORY 6/13—Rev. 0 to Rev. A Changed Document Title from CN-0137 to AN-1211 .............................................................................. Universal Changes to Circuit Description Section......................................... 2 Changes to Learn More Section ...................................................... 3 10/09—Revision 0: Initial Version The AD9258, AD9251, AD9269, AD9231, and AD9204 are footprint-compatible to the AD9268 and can be used as suitable alternatives to the AD9268 if lower resolution or sample rate is required. The ADP2114 has excess current capability for driving a single AD9268. If only one part needs to be powered, the ADP2108 could be considered. In this case a single regulator can be used to power both the AVDD and DRVDD rails if adequate isolation filters are provided between the two supply domains. Both low dropout (LDO) regulators and switching circuit solutions work when powering ADCs. LDO circuits suffer in efficiency. Switching solutions show increased efficiency and lower power dissipation without degradation to ADC performance. Further efficiency and power savings can be realized when using multiple devices. ©2009–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN08663-0-6/13(A) Rev. A | Page 3 of 3