Evaluation Board for ADP2116 EVAL-ADP2116 FEATURES GENERAL DESCRIPTION Full featured demo board for the ADP2116 Standalone capability Configurable, dual synchronous step-down, dc-to-dc switching regulator Dual 3 A/3 A or 3 A/2 A output or single combined 6 A output Input voltage VIN: 2.75 V to 5.5 V Selectable fixed output: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V or adjustable output voltage to 0.6 V minimum Selectable switching frequency: 300 kHz, 600 kHz, 1.2 MHz or synchronized from 200 kHz to 2 MHz Configurable SYNC input or CLKOUT output Two independent enable inputs Two power good outputs Externally programmable soft start Size: 3-9/16 inch × 2-5/8 inch The ADP2116 evaluation (demo) board is a complete, dual, step-down, dc-to-dc converter design based on the ADP2116, a configurable, dual 3 A/single 6 A, synchronous step-down, dc-to-dc regulator. APPLICATIONS The ADP2116 is a versatile step-down switching regulator that satisfies a wide range of user point-of-load requirements. The two PWM channels are 180° phase shifted and provide ±1.5% accurate regulated output voltages. For more details, see the ADP2116 data sheet. The ADP2116 evaluation board comes configured with 2.5 V at 3 A and 1.2 V at 3 A outputs, the switching frequency is set to 600 kHz, and pulse skip is enabled. If needed, the ADP2116 evaluation board output voltages and configuration can be modified by changing the values of the appropriate passive components and changing the links. The ambient temperature operating range is from −40°C to +85°C. Demonstrate features and configurability of ADP2116 Emulate functionality of ADP2116 in a user’s circuit Evaluate ADP2116 performance 08443-001 ADP2116 EVALUATION BOARD Figure 1. ADP2116-EVALZ—VOUT1: 2.5 V @ 3 A; VOUT2: 1.2 V @ 3 A; fSW = 600 kHz; Pulse Skip Enabled Rev. 0 Evaluation boards are only intended for device evaluation and not for production purposes. Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under any patents or other intellectual property by application or use of evaluation boards. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Analog Devices reserves the right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Evaluation boards are not authorized to be used in life support devices or systems. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. EVAL-ADP2116 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................6 Applications ....................................................................................... 1 Bode Plots .......................................................................................8 General Description ......................................................................... 1 Evaluation Board Schematics and Artwork ...................................9 ADP2116 Evaluation Board ............................................................ 1 PCB Layout ................................................................................. 10 Revision History ............................................................................... 2 Ordering Information .................................................................... 14 Using the Evaluation (Demo) Board.............................................. 3 Bill of Materials ........................................................................... 14 Powering Up .................................................................................. 3 Ordering Guide .......................................................................... 14 Evaluating Performance of the DC-to-DC Converter ............ 4 ESD Caution................................................................................ 14 Modifying the Board .................................................................... 4 REVISION HISTORY 11/09—Revision 0: Initial Version Rev. 0 | Page 2 of 2 EVAL-ADP2116 USING THE EVALUATION (DEMO) BOARD POWERING UP Input and Output Voltages The ADP2116 evaluation board is supplied fully assembled and tested. Before applying power to the evaluation board, follow the procedures in this section. To measure the input voltage, VIN, connect the negative probe of the voltmeter to Terminal T2 (GND) on the evaluation board and connect the positive probe to Terminal T1 (VIN+). Input Power Source To measure the output voltage of Channel 1, VOUT1, connect the negative probe of the voltmeter to Terminal T4 (GND1) and connect the positive probe to Terminal T3. To measure the output voltage of Channel 2, VOUT2, connect the negative probe to Terminal T5 (GND2) and connect the positive probe to Terminal T6. The power source voltage must not exceed 5.5 V, which is the maximum operating input voltage of the ADP2116. Connect the negative terminal of the power source to the J2 (GND) jack of the evaluation board and the positive terminal of the power source to the J1 (VIN+) jack of the evaluation board. Output Load Before connecting a load to the output of the demo board, make sure that the output voltage does not exceed the maximum operating voltage range of the load. To connect a load to the output of Channel 1, connect the negative terminal of the load to Jack J4 (GND1) on the evaluation board and connect the positive terminal of the load to Jack J3 (+VOUT1). To connect a load to the output of Channel 2, connect the negative terminal of the load to Jack J5 (GND2) of the evaluation board and connect the positive terminal to Jack J6 (+VOUT2). To measure the output voltage, VOUT, for the single interleaved output configuration, connect the negative probe of the voltmeter to Terminal T7 (GND) and connect the positive probe to either Terminal T3 or Terminal T6. External Synchronization To synchronize the dc-to-dc converter to an external clock: 1. 2. For the single interleaved output configuration, the outputs of Channel 1 and Channel 2 are shorted together by soldering Link CB3. To apply a load to the single interleaved dual-phase output, connect the negative terminal of the load to either Jack J4 (GND1) or Jack J5 (GND2) of the evaluation board and connect the positive terminal of the load to either Jack J3 (+VOUT1) or Jack J6 (+VOUT2). fSYNC = 2 × fSW • • Internal Clock Out To enable Channel 1, short the middle pin of HEADER3 EN1 to VIN+ by placing a shunt in the on position, or apply a dc voltage from 2.0 V to 5.5 V to the middle pin. To disable Channel 1, short the middle pin of HEADER3 EN1 to GND by placing a shunt in the off position or apply a positive dc voltage below 0.8 V to the middle pin. HEADER3 EN2 is used to control Channel 2. Use one of the following methods to enable or disable Channel 2: • • (1) For reliable synchronization, the external clock frequency, fSYNC, must be in the range from 800 kHz to 2 MHz because the switching frequency is set to 600 kHz. Enabling and Disabling the DC-to-DC Converter HEADER3 EN1 is used to control Channel 1. Use one of the following methods to enable or disable Channel 1: Short the middle pin of HEADER3 SCFG to GND by placing a shunt in the in position. This configures the (SYNC/CLKOUT) pin of the ADP2116 as an input. Apply an external clock signal to Test Point TP1 SYNC/CLKOUT. The clock signal must have a logic high level from 2.0 V up to the voltage of the input power, VIN, and a logic low level below 0.8 V. Set the external clock pulse width to more than 100 ns and the frequency, fSYNC, equal to double the target PWM switching frequency, fSW: To enable Channel 2, short the middle pin of HEADER3 EN2 to VIN+ by placing a shunt in the on position, or apply a dc voltage from 2.0 V to 5.5 V to the middle pin. To disable Channel 2, short the middle pin of HEADER3 EN2 to GND by placing a shunt in the off position, or apply a positive dc voltage below 0.8 V to the middle pin. Shorting the middle pin of HEADER3 SCFG to VIN+ by placing the shunt in the out position makes the ADP2116 internal clock available at Test Point TP1 (SYNC/CLKOUT). The frequency of the internal clock, fCLKOUT, is twice that of the switching frequency, fSW, of the converter and 90° phase-shifted. PGOOD1 and PGOOD2 Signals When Channel 1 is enabled and the output voltage, VOUT1, is in regulation range, the logic signal at the Test Point PGOOD1 is high. When Channel 2 is enabled and the output voltage, VOUT2, is in regulation range, the logic signal at Test Point PGOOD2 is also high. For the single dual-phase interleaved output configuration, the PGOOD1 and PGOOD2 signals are tied together at the Circuit Breaker CB2, which is a solder link. Use either Test Point PGOOD1 or Test Point PGOOD2 to monitor whether the converter output voltage, VOUT, is within regulation. For the single interleaved output configuration, the EN1 and EN2 signals are connected together at the Circuit Breaker CB1, which is a solder link. Use either HEADER3 EN1 or EN2 to enable and disable Channel 1 and Channel 2 simultaneously. Rev. 0 | Page 3 of 3 EVAL-ADP2116 Measuring Load Regulation EVALUATING PERFORMANCE OF THE DC-TO-DC CONVERTER Measure the load regulation by increasing the load current at the output and measuring the change in output voltage. Switching Waveforms Line Transient Response To observe the switching waveform with an oscilloscope, place the probe tip at the end of Inductor L1 (or L2 for Channel 2) that is connected to the SWx pin of the ADP2116. The probe ground is connected to GND. Generate a step input voltage (VIN) change and observe the behavior of the output voltage, VOUT1 (VOUT2 for Channel 2), with an oscilloscope. Output Voltage Ripple Load Transient Response To observe the output voltage ripple, place the oscilloscope probe tip at Terminal T3 (or T6 for Channel 2), the converter output, and connect the probe ground lead to Terminal T7 (GND). The oscilloscope input should be set to ac-coupled. Generate a load current transient at the output, VOUT1 (VOUT2 for Channel 2), and observe the output voltage response with an oscilloscope. Use a current probe attached to the wire between the output and the load to visualize the current transient. Measuring Efficiency MODIFYING THE BOARD The efficiency, η, is calculated by comparing the measured input power with the measured output power of the converter: To modify the converter configuration, unsolder and/or replace/remove the appropriate passive components or links on the board. η= VOUT × I OUT (2) V IN × I IN Changing the Operation Mode Settings The operating mode of the ADP2116 dc-to-dc converter can be changed by replacing the configuration resistors, R13 and R14, with a different value, as shown in Table 1. This configuration sets the current limit for Channel 2 and enables or disables the transition to pulse skip mode at light loads. Measuring Line Regulation Vary the input voltage and measure the change of the output voltage. Table 1. Setting the Operating Mode R13 (Ω) ± 5% 0 Open Open Open R14 (Ω) ± 5% Open 82 k 47 k 27 k Maximum DC Load Current (A) VOUT1 VOUT2 3 3 3 3 3 2 3 2 Rev. 0 | Page 4 of 4 VOUT1 4.5 4.5 4.5 4.5 Peak Current Limit (A) VOUT2 4.5 4.5 3.3 3.3 Pulse Skip Forced PWM Enabled Forced PWM Enabled EVAL-ADP2116 Changing the Output Voltages Table 2. Setting the Switching Frequency, fSW The output voltages set points of the converter can be changed by replacing Resistor R15, Resistor R16, Resistor R17, and Resistor R18 with the resistor values shown in Table 3. R19 (Ω) ± 5% 0 8.2 k 27 k In addition, when the adjustable output voltage version is used for the ADP2116, the output voltage, VOUT1, is set by the resistive voltage divider R5/R6 and the output voltage, VOUT2, is set by the resistive voltage divider R11/R12. To calculate the desired resistor values, first determine the value of the bottom divider string resistor, R6 (R12 for Channel 2), by ensuring that the divider string current, ISTRING, is greater than 20 μA. For Channel 1, R6 = 0.6 V/ISTRING (3) For Channel 2, R12 = 0.6 V/ISTRING (4) Then calculate the value of the top resistor, R5 (R11 for Channel 2). For Channel 1, Switching Frequency, fSW (kHz) 300 600 1200 Note that when the switching frequency (fSW) is changed, to ensure stable operation, the values of the Inductor L1 and Inductor L2, the C13, C14, C15, and C16 output capacitors, and the R2, C2, R4, and C4 compensation components must be recalculated and changed (see the ADP2116 data sheet for details on external component selection). Changing the Soft Start Time The soft start time of the ADP2116 on the evaluation board is programmed to 1 ms. To change the soft start time, tSS, replace Capacitor C7 (C9 for Channel 2) with a different capacitor value using the following: For Channel 1, C7 [nF] = 10 × tSS [ms] (7) For Channel 2, ⎡V − 0.6 V ⎤ R5 = R6 × ⎢ OUT1 ⎥ 0.6 V ⎣⎢ ⎦⎥ C9 [nF] = 10× tSS [ms] (5) (8) Combining the Two Channels into a Single Output For Channel 2, For a single, interleaved dual-phase output, make the following modifications: ⎡V − 0.6 V ⎤ R11 = R12 × ⎢ OUT2 ⎥ 0.6 V ⎣⎢ ⎦⎥ (6) • Note that when the output voltage of Channel 1, VOUT1, is changed, to ensure stable operation, the values of Inductor L1, the C13 and C14 output capacitors, and the R2 and C2 compensation components must be recalculated and changed (see the ADP2116 data sheet for details on external component selection). If the output voltage of Channel 2, VOUT2, is changed, the values of the Inductor L2, the C15 and C16 output capacitors, and the R4 and C4 compensation components must be recalculated and changed. • • • • • • Changing the Switching Frequency Short the outputs, +VOUT1 and +VOUT2, by soldering the bridge on CB3. Tie the EN1 and EN2 signals by shorting CB1. Tie the PGOOD1 and PGOOD2 signals by shorting CB2. Tie the FB1 and FB2 signals by shorting CB4. Tie the COMP1 and COMP2 signals by shorting CB5. Set the same output voltages of both channels by choosing R15 = R17 and R16 = R18. Choose and set the operating mode to 3 A/3 A, forced PWM configuration, by setting R13 to 0 Ω and leaving R14 open. The switching frequency (fSW) set point can be changed by replacing Resistor R19 with a different value, as shown in Table 2. Table 3. Programming the Output Voltages R15 (Ω) ± 5% Open Open Open Open Open Open Open 0 R16 (Ω) ± 5% 0 4.7 k 8.2 k 15 k 27 k 47 k 82 k Open VOUT1 (V) 0.8 1.2 1.5 1.8 2.5 3.3 Adjustable 0.6 to <1.6 Adjustable 1.6 to 3.3 R17 (Ω) ± 5% Open Open Open Open Open Open Open 0 Rev. 0 | Page 5 of 5 R18 (Ω) ± 5% 0 4.7 k 8.2 k 15 k 27 k 47 k 82 k Open VOUT2 (V) 0.8 1.2 1.5 1.8 2.5 3.3 Adjustable 0.6 to <1.6 Adjustable 1.6 to 3.3 EVAL-ADP2116 TYPICAL PERFORMANCE CHARACTERISTICS 100 95 95 90 85 EFFICIENCY (%) 85 80 75 80 75 70 70 PULSE SKIP FORCED PWM 60 10 100 1k LOAD CURRENT (mA) PULSE SKIP FORCED PWM 65 10k 60 10 08443-002 65 Figure 2. Efficiency vs. Load, VIN = 5 V, Channel 1, VOUT1 = 2.5 V 100 1k LOAD CURRENT (mA) 10k 08443-005 EFFICIENCY (%) 90 Figure 5. Efficiency vs. Load, Channel 2, VIN = 5 V, VOUT2 = 1.2 V 2.510 1.208 2.505 1.206 VOUT2 (V) VOUT1 (V) 2.500 2.495 1.204 1.202 2.490 4.0 4.5 VIN (V) 5.0 5.5 1.198 3.0 08443-003 2.480 3.5 3.5 4.0 4.5 5.0 5.5 VIN (V) Figure 3. Line Regulation, Channel 1, VOUT1 = 2.5 V, 3 A Load 08443-006 1.200 2.485 Figure 6. Line Regulation, Channel 2, VOUT2 = 1.2 V, 3 A Load 2.510 1.208 2.505 1.206 VOUT2 (V) 2.495 1.204 1.202 2.490 2.480 0 0.5 1.5 2.0 1.0 LOAD CURRENT (A) 2.5 3.0 1.198 Figure 4. Load Regulation, Channel 1, VIN = 5 V, VOUT1 = 2.5 V, Pulse Skip Enabled 0 0.5 1.0 1.5 2.0 LOAD CURRENT (A) 2.5 3.0 Figure 7. Load Regulation, Channel 2, VIN = 5 V, VOUT2 = 1.2 V, Pulse Skip Enabled Rev. 0 | Page 6 of 6 08443-007 1.200 2.485 08443-004 VOUT1 (V) 2.500 EVAL-ADP2116 VOUT2 VOUT1 2 IOUT1 IOUT2 CH2 100mV CH4 2.0A Ω BW BW BW M 400µs 62.5MS/s 16.0ns/pt A CH4 2.16A 08443-008 1 CH1 5.0V CHANNEL 2 SW 4 CHANNEL 1 SW CH3 5.0V Figure 8. Load Transient Response, 0.3 A to 3 A, VOUT1 = 2.5 V CH2 50.0mV CH4 2.0A Ω BW BW BW M 200µs 125MS/s 8.0ns/pt A CH4 2.16A 08443-011 4 Figure 11. Load Transient Response, 0.3 A to 3A, VOUT2 = 1.2 V EN1 EN2 1 1 VOUT1 VOUT2 PGOOD1 2 PGOOD2 2 SS2 SS1 CH2 1.0V CH4 1.0V BW BW M 1.0ms 25.0MS/s 40.0ns/pt A CH1 2.2V 08443-009 CH1 5.0V CH3 5.0V BW BW CH1 5.0V CH3 5.0V Figure 9. Soft Start, Channel 1, VOUT1 = 2.5 V BW BW CH2 1.0V CH4 1.0V BW BW M 1.0ms 25.0MS/s 40.0ns/pt A CH1 2.2V 08443-012 4 4 Figure 12. Soft Start, Channel 2, VOUT2 = 1.2 V CHANNEL 2 SW CHANNEL 1 SW VOUT2 VOUT1 2 2 IOUT1 IOUT2 BW CH2 200mV CH4 2.0A Ω BW BW M 2.0ms 12.5MS/s 80.0ns/pt A CH4 2.16A 08443-010 CH1 5.0V CH3 5.0V BW CH2 200mV CH4 2.0A Ω BW BW M 2.0ms 12.5MS/s 80.0ns/pt A CH4 2.16A Figure 13. Current Limit Operation, Channel 2 Figure 10. Current Limit Operation, Channel 1 Rev. 0 | Page 7 of 7 08443-013 4 4 EVAL-ADP2116 BODE PLOTS 50 120 40 96 PHASE 48 10 24 0 0 MAGNITUDE –10 –24 –20 –48 –30 –72 –40 –96 –50 1k DATA FREQUENCY MAGNITUDE PHASE 10k M1 100k FREQUENCY (Hz) M1 62.24kHz –0.006dB 55.076° M2 202.88kHz –16.884dB –0.221° M2 PHASE (Degrees) 72 20 –120 M2 – M1 140.64kHz –16.878dB –55.297° 08443-014 MAGNITUDE (dB) 30 Figure 14. Channel 1: VIN = 5 V, VOUT1 = 2.5 V, Load = 3 A, fSW = 600 kHz, Crossover Frequency (fCO) = 62 kHz; Phase Margin 55° 50 120 40 96 30 72 PHASE 10 24 0 0 MAGNITUDE –10 –24 –20 –48 –30 –72 –40 –96 –50 1k DATA FREQUENCY MAGNITUDE PHASE 10k M1 FREQUENCY (Hz) M1 47.92kHz –0.196dB 52.149° 100k M2 193.94kHz –21.432dB –0.047° M2 M2 – M1 146.02kHz –21.236dB –52.195° PHASE (Degrees) 48 –120 08443-015 MAGNITUDE (dB) 20 Figure 15. Channel 2: VIN = 5 V, VOUT2 = 1.2 V, Load = 3 A, fSW = 600 kHz, Crossover Frequency (fCO) = 48 kHz; Phase Margin 52° Rev. 0 | Page 8 of 8 1 2 3 SCFG R3 1 2 3 R19 8.2K HEADER3 TP1 SY NC/CLKOUT FREQ VIN+ C17 NP 0 +5. 0V DC J2 SCFG GN D V IN+ 1 1 T2 VIN+ NP R4 R14 82K R1 10 VOUT2 30K OPCFG R13 NP VIN+ C5 C4 820PF 30K 8 VDD R12 NP 0 R11 7 6 5 4 3 2 1 U1 COMP2 OPCFG SCFG FREQ COMP1 C6 1UF GND. TPoint C1 100UF 6.3V R2 VIN+ C3 NP C2 820PF GND T1 V IN+ 1 1 J1 R6 NP GND TPoint V1SET VDD COMP2 OPCFG SYNC/CLKOUT SCFG FREQ COMP1 GND FB1 FB2 9 FB2 R5 0 C7 10nF SS1 30 10 R7 100K EN1 VOUT1 PAD EPAD 32 FB1 31 V1SET 11 SS2 V2SET ADP2116 SS2 C9 10nF PGOOD2 C8 100PF TPoint SW4 SW3 PGND4 PGND3 PGND2 PGND1 SW2 SW1 VIN+ 1 2 3 VIN+ 1 2 3 1 2 3 HEADER3 EN2 VIN+ VIN+ L2 2.2UH L1 3.3UH Open EN 2: Exte rna l C ontr ol Sig nal Shor t E N2 to G ND: Di sabl e C han nel 2 1 1 1 EN2 2 2 COMP2 CB5 COMP FB2 2 PGOOD2 CB4 FB R16 27K V1SET R15 NP R18 4.7K V2SET R17 NP T7 1 T5 GND2 T6 GND1 1 1 J5 J6 J3 J4 VOUT CB3 1 1 GND2 +VOU T2 +1.2V 3A CB 3: s old er bri dge fo r si ngl e V OUT +VOU T1 +2.5V 3A GND1 Sho rt COM P1 and COM P2 for sin gle VO UT o per ati on Sho rt FB1 an d FB 2 f or sing le VOU T o pera tio n Sho rt PGO OD1 and PG OOD 2 fo r s ing le VOUT op era tio n Sho rt EN1 an d EN 2 f or sing le VOU T o pera tio n GND T3 1 T4 For si ngle VO UT ope rati on: ch oos e R1 5 = R1 7, R16 = R 18 C16 100UF 6.3V CB2 PGOOD 2 CB1 EN VOUT2 C15 47UF 6.3V COMP1 FB1 VOUT1 C14 47UF 6.3V PGOOD1 1 EN1 C13 22UF 6.3V Shor t E N2 to V IN+ : E nabl e C han nel 2 C10 100PF R10 1K C12 22UF 6.3V 17 18 19 20 21 22 23 24 1 2 3 EN1 Open EN 1: Exte rna l C ontr ol Sig nal Shor t E N1 to G ND: Di sabl e C han nel 1 Shor t E N1 to V IN+ : E nabl e C han nel 1 HEADER3 C11 22UF 6.3V R8 1K PGOOD1 TPoint PGOOD2 R9 100K VIN+ 12 V2SET SS1 29 PGOOD1 28 EN1 25 VIN3 VIN+ 1 27 VIN1 VIN4 14 EN2 13 EN2 1 26 VIN2 VIN5 15 VIN6 16 Rev. 0 | Page 9 of 9 1 1 2 VIN+ EVAL-ADP2116 EVALUATION BOARD SCHEMATICS AND ARTWORK Figure 16. ADP2116-EVALZ Schematic: Dual 2.5 V at 3 A and 1.2 V at 3A Output, Switching Frequency 600 kHz, Pulse Skip Enabled 08443-016 EVAL-ADP2116 08443-017 PCB LAYOUT Figure 17. Layer 1—Component Side Rev. 0 | Page 10 of 10 08443-018 EVAL-ADP2116 Figure 18. Layer 2—Ground Plane Rev. 0 | Page 11 of 11 08443-019 EVAL-ADP2116 Figure 19. Layer 3—Power Plane Rev. 0 | Page 12 of 12 08443-020 EVAL-ADP2116 Figure 20. Layer 4—Bottom Side Rev. 0 | Page 13 of 13 EVAL-ADP2116 ORDERING INFORMATION BILL OF MATERIALS Table 4. ADP2116-EVALZ Bill of Materials Qty 4 1 2 2 3 1 2 Reference Designator CB1, CB2, CB4, CB5 CB3 C1, C16 C2, C4 C3, C5, C17 C6 C7, C9 2 3 1 1 3 5 6 1 1 1 2 3 5 2 2 1 1 1 1 7 1 C8, C10 C11, C12, C13 C14 C15 EN1, EN2, SCFG TP1, PGOOD1, PGOOD2, GND., GND J1, J2, J3, J4, J5, J6 L1 L2 R1 R2, R4 R3, R5, R11 R6, R12, R13, R15, R17 R7, R9 R8, R10 R14 R16 R18 R19 T1, T2, T3, T4, T5, T6, T7 U1 3 4 4 Description Circuit breaker, 0603, open Circuit breaker, open Capacitor, MLCC, 100 μF, 6.3 V, X5R, 1210 Capacitor, MLCC, 820 pF, 50 V, NP0, 0603 Not populated Capacitor, MLCC, 1.0 μF, 10 V, X7R, 0603 Capacitor, MLCC, 10000 pF, 50 V, X7R, 0603 Capacitor, MLCC, 100 pF, 50 V, C0G, 0603 Capacitor, MLCC, 22 μF, 6.3 V, X5R, 0805 Capacitor, MLCC, 47 μF, 6.3 V, X5R, 1210 Capacitor, MLCC, 47 μF, 6.3 V, X5R, 0805 HEADER3 0.100 inch Test point Jack, noninsulated, staking 0.218 inch Inductor, fixed, 3.3 μH, SMD Inductor, fixed, 2.2 μH, SMD Resistor, 10 Ω, 1/10 W, 5%, SMD, 0603 Resistor, 30 kΩ, 1/10 W, 5%, SMD, 0603 Resistor, 0 Ω, 1/10 W, 5%, SMD, 0603 Not populated Resistor, 100 kΩ, 1/10 W, 5%, SMD, 0603 Resistor, 1 kΩ, 1/10 W, 5%, SMD, 0603 Resistor, 82 kΩ, 1/10 W, 5%, SMD, 0603 Resistor, 27 kΩ, 1/10 W, 5%, SMD, 0603 Resistor, 4.7 kΩ, 1/10 W, 5%, SMD, 0603 Resistor, 8.2 kΩ, 1/10 W, 5%, SMD, 0603 Terminal, double turret, brass, 0.078” Configurable, dual 3 A/single 6 A, synchronous step-down, dc-to-dc regulator Connector, shunt dual beam 30AU PCB Standoff, 0.500 inch, #4-40, nylon 6/6, hex Screw, nylon, slot pan head, 4-40 thread, 1/4 inch length ORDERING GUIDE Model ADP2116-EVALZ1 1 Manufacturer Part Number Murata Panasonic GRM32ER60J107ME20L ECJ-1VC1H821J TDK Panasonic C1608X7R1C105K ECJ-1VB1H103K TDK TDK Panasonic Taiyo Yuden Sullins Sullins Keystone Electronics TOKO TOKO C1608C0G1H101J C2012X5R0J226M ECJ-4YB0J476M JMK212BJ476MG-T PBC03SAAN PBC01SAAN 575-4 FDV0620-3R3M FDV0620-2R2M Keystone Electronics Analog Devices 1502-1 ADP2116ACPZ-R7 Tyco Electronics Keystone Electronics 390088-1 1902C Richco Plastic Co. NSS-4-4-01 ESD CAUTION Description Dual Output, 2.5 V at 3 A and 1.2 V at 3 A, 600 kHz Switching Frequency, Pulse Skip Enabled Evaluation Board Z = RoHS Compliant Part. Rev. 0 | Page 14 of 14 EVAL-ADP2116 NOTES Rev. 0 | Page 15 of 15 EVAL-ADP2116 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. EB08443-0-11/09(0) Rev. 0 | Page 16 of 16