EVBUM2004/D - 233 KB

NB3N65027DTGEVB
NB3N65027 Evaluation
Board User's Manual
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EVAL BOARD USER’S MANUAL
Device Name: NB3N65027DT (QSOP20)
Board Name: NB3N65027DTGEVB
Introduction
NB3N65027 device is a 3.3 V Programmable 3 PLL
Clock Synthesizer with 6 LVTTL / LVCMOS Outputs
w/OE. ON Semiconductor has developed an evaluation
board NB3N65027DTGEVB for the NB3N65027 in 20L
QSOP (150 mil) package. The evaluation board
NB3N65027DTGEVB is offered as a convenience for the
customers interested in performing their own engineering
assessment on the general performance of NB3N65027.
This evaluation board manual contains:
• Information on 20L QSOP (150 mil) Evaluation Board
• Evaluation board Circuit Schematic
• Bill of Materials
ACS0
BSC1
This manual should be used in conjunction with the device
data sheet, which contains full technical details on the device
specifications and operation.
Description
Evaluation board for testing NB3N65027 in 20L QSOP
(150 mil) is a 2” x 2”, 4 layer board with dedicated VDD and
GND planes.
The top and bottom view of the assembled Evaluation
board is shown in Figure 1 and Figure 2. Top and bottom
view of the bare printed circuit board (PCB) is shown in
Figure 3 and Figure 4.
BCS0
GND
REFOUT
25MHz Xtal
XIN
CLKA1
CLKC1
CLKA2
OE
ACS1
CLKC2
CLKB2
VDD
CLKB1
CCS
GND
Figure 1. Evaluation Board
top View
© Semiconductor Components Industries, LLC, 2014
June, 2014 − Rev. 1
Figure 2. Evaluation Board
Bottom View
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Publication Order Number:
EVBUM2004/D
NB3N65027DTGEVB
Figure 3. Evaluation Board top
View (Bare PCB)
Figure 4. Evaluation Board
bottom View (Bare PCB)
The state of signal Output Enable (OE) is controlled
through 3−pin through hole header OE.
The state of control pins ACS0, ACS1, BCS0, BCS1 and
CCS are controlled through 3−pin through hole headers of
the same name. The selected states of the signals determine
the output clocks on CLKA1, CLKA2, CLKB1, CLKB2,
CLKC1, and CLKC2 as per the clock selection table.
Output clocks REFOUT, CLKA1, CLKA2, CLKB1,
CLKB2, CLKC1, and CLKC2 can be monitored at 2−pin
through hole headers REFOUT, CLKA1, CLKA2, CLKB1,
CLKB2, CLKC1, and CLKC2 respectively, provided close
to device.
Resistors R1 ~ R7 are the Series terminating resistors on
the output clocks.
The general performance of NB3N65027 on the
evaluation board can be tested using the list of instruments
mentioned in the manual.
The Schematic of the Evaluation board is shown in
Figure 5. The bill of material for the Evaluation board is
shown in Table 1.
Test and Measurement Set−up and Procedure
Power supply is fed to the board through VDD and GND
terminals. C6, C7, and C8 are the decoupling capacitors for
the power supply into the board. Decoupling capacitors C1
and C2 are provided close to the device on VDD1, while C3
and C4 are provided close to device on VDD2 respectively.
Crystal Y1, capacitors C5 and C9 provide the crystal
interface to the device at X1 and X2. The values of C5 and
C9 are chosen based on the load capacitance (CL) of the
crystal used. When Crystal interface is used, XIN, R9 and
R10 are not mounted.
When crystal interface is not used, clock can be fed from
an external source using XIN and R10. R9 is used for output
termination of the clock source.
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NB3N65027DTGEVB
NB3N65027DTGEVB EVALUATION BOARD SCHEMATIC
Figure 5. NB3N65027DTGEVB Evaluation Board Schematic
LIST OF INSTRUMENTS
3. Probes: P7260, 6GHz single ended Active Probe
4. Power Supply: Agilent 6624A DC (or equivalent)
5. Digital Voltmeter: Agilent 34410A or 34401 (or
equivalent)
1. Signal Generator: Agilent 81110A (or equivalent)
if Input Clock is from External Source
2. Oscilloscope: Tektronix TDS7704B (or
equivalent)
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NB3N65027DTGEVB
BILL OF MATERIAL
Table 1. NB3N65027DTGEVB EVALUATION BOARD REV. A BILL OF MATERIAL
Item
Qty
Reference
Part
Description
Size
Vendor
Vendor Part Number
1
6
BCS1, ACS1,
OE, CCS,
BCS0, ACS0
3 Pin Header
Through Hole
HEADER
2.54 mm
Samtec
TSW−116−11−G−S
2
7
CLKA1,
CLKA2,
CLKB1,
CLKB2,
CLKC1,
CLKC2,
REFOUT
2 Pin Header
Through Hole
HEADER
2.54 mm
Samtec
TSW−116−11−G−S
3
3
C1,C3,C8
0.1 mF
CAP 0.1 mF 16 V 5%
0402 SMD
0402
Walsin
0402B104K160CT
4
3
C2,C4,C6
0.01 mF
CAP 0.01 mF 50 V 5%
0402 SMD
0402
Walsin
0402B103K500CT
5
2
C5,C9
27 pF
CAP 27 pF 50 V 5%
0402 SMD
0402
Walsin
0402N270J500LT
6
1
C7
22 mF
CAP 22 mF 16 V 5%
6032 SMD
6032
AVX
TAJC226K016R
7
7
C10, C11, C12,
C13, C14,
C15, C16
15 pF
CAP 15 pF 50 V 5%
0402 SMD
0402
Walsin
0402N150J500LT
9
7
R1,R2,R3,R4,
R5,R6,R7
22E
RES 22 W 1/16W 5%
0402 SMD
0402
Walsin
WR04X220JTL
10
1
R9
50E
RES 50 W 1/16W 5%
0402 SMD
0402
Walsin
WR04X500JTL
11
1
R10
0E
RES 0 W 1/16W 0402
SMD
0402
Walsin
12
1
U1
NB3N65027
NB3N65027 20L
QSOP Device
QSOP_20
ON Semicondcutor
NB3N65027DTR2G
13
1
XIN
SMA
4 Pin SMA Jack
Samtec
SMA−J−P−H−ST−TH1
14
1
Y1
Crystal
25 MHz, 2 pin Crystal
Crystal_ HC45U
or UM1 or
equivalent
Andhra Electronics
Limited
UM12GH3G118P025M000000
15
2
TP1, TP2
Test Point
Miniature SMT Test
Point
2.7 mm x 1 mm x
1.5 mm
DigiKey
5015KTR−ND
8
Remarks
VDD,GND
DNP
DNP
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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
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EVBUM2004/D