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RT2596
DDR Termination Regulator
General Description
Applications
RT2596 is a 1.5A continuous current sink/source tracking
termination regulator, and its transient peak current is up
to 3A. It is specifically designed for low-cost and lowexternal component count systems. The RT2596
possesses a high speed operating amplifier that provides
fast load transient response. The RT2596 supports remote
sensing functions and all features required to power the
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Datacom & Enterprise Server
Networking Communication
Chipset/RAM Supply
Generic DC/DC Power Regulator
Pin Configurations
(TOP VIEW)
DDR SDRAM VTT bus termination according to the JEDEC
specification. In addition, the RT2596 includes integrated
sleep-state controls placing VTT in High-Z mode in SD.
GND
Features
z
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8
VTT
SD
2
7
PVIN
VTTSNS
3
6
AVIN
VTTREF
4
5
VDDQ
SOP-8
Sink and Source Termination Regulator
Remote Sensing
PVIN, AVIN from 2.5V to 5.5V
Thermal Shutdown
RoHS Compliant and Halogen Free
GND
8
SD
2
VTTSNS
VTTREF
3
4
GND
9
VTT
7
PVIN
6
AVIN
5
VDDQ
SOP-8 (Exposed Pad)
Ordering Information
RT2596
Marking Information
Package Type
S : SOP-8
SP: SOP-8(Exposed Pad-Option 1)
RT2596GS
RT2596GS : Product Number
RT2596
GSYMDNN
Lead Plating System
G : Green (Halogen Free and Pb Free)
YMDNN : Date Code
Note :
RT2596GSP
Richtek products are :
`
RT2596GSP : Product Number
RoHS compliant and compatible with the current require-
RT2596
GSPYMDNN
ments of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
YMDNN : Date Code
Simplified Application Circuit
RT2596
VIN
AVIN
PVIN
C3
C1
SD
VTTSNS
VTT
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS2596-01 July 2013
VTT
C4
VDDQ
C2
VREF
VTTREF
GND
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
RT2596
Functional Pin Description
SOP-8
1
Pin No.
SOP-8
(Exposed Pad)
1,
9 (Exposed Pad)
Pin Name
Pin Function
GND
Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
2
2
SD
Shutdown Control Input.
3
3
VTTSNS
Feedback Input for Regulating VTT.
4
4
VTTREF
Buffered Internal Reference Voltage Equal to V DDQ / 2.
5
5
VDDQ
Input for Internal Reference.
6
6
AVIN
Analog Input.
7
7
PVIN
Power Input.
8
8
VTT
Output of the Termination Regulator.
Function Block Diagram
VDDQ
VTTREF
SD
AVIN
50k
PVIN
+
+
-
Shutdown
Mode
-
+
VTT
-
50k
+
-
VTTSNS
Thermal
Shutdown
GND
Operation
Shutdown Mode
VREF Buffer
The shutdown mode can be controlled by the SD pin or
thermal shutdown detector.
The buffer senses the input voltage from VDDQ and
provides an internal reference voltage of VDDQ / 2 for VTT
regulator. The buffer remains active during shutdown mode.
The shutdown mode will happen when the SD input voltage
is under the logic threshold or junction temperature is
over the thermal shutdown threshold.
The VTT pin will be high impedance and VREF will remain
active under shutdown mode.
VTT Regulator
The VTT output is capable of sinking and sourcing current
while regulating the output precisely to VDDQ / 2. The
output will be high impedance under shutdown mode.
Thermal Shutdown
The regulator will enter shutdown mode when the junction
temperature is over the thermal shutdown threshold.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS2596-01 July 2013
RT2596
Absolute Maximum Ratings
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(Note 1)
PVIN, AVIN, VDDQ, SD to GND ---------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOP-8 -----------------------------------------------------------------------------------------------------------------------SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8, θJA -----------------------------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) ----------------------------------------------------------------------------------------------
Recommended Operating Conditions
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−0.3V to 6V
0.833W
2.13W
120°C/W
49°C/W
15°C/W
260°C
−65°C to 150°C
150°C
2kV
(Note 4)
AVIN to GND ---------------------------------------------------------------------------------------------------------------PVIN Supply Voltage ----------------------------------------------------------------------------------------------------SD Input Voltage ----------------------------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------------Ambient Temperature Range --------------------------------------------------------------------------------------------
2.2V to 5.5V
0V to AVIN
0V to AVIN
−40°C to 125°C
−40°C to 85°C
Electrical Characteristics
(AVIN = PVIN = 2.5V, VDDQ = 2.5V (Note 5), TA = −40°C to 85°C, unless otherwise specified)
Parameter
VTTREF Output Voltage
VREF Output Impedance
VTT Output Voltage
VTTREF, VTT Output Offset
Symbol
VTTREF
ZVREF
VTT
VTTTOL
Test Conditions
Min
Typ
Max
VIN = VDDQ = 2.3V
1.135 1.158 1.185
VIN = VDDQ = 2.5V
1.235 1.258 1.285
VIN = VDDQ = 2.7V
1.335 1.358 1.385
IREF = −30μA to 30μA
--
2.5
--
IOUT = 0A, ±1.5A, VIN = VDDQ = 2.3V
1.125 1.159
1.19
IOUT = 0A, ±1.5A, VIN = VDDQ = 2.5V
1.225 1.259
1.29
IOUT = 0A, ±1.5A, VIN = VDDQ = 2.7V
1.325 1.359
1.39
IOUT = 0A
−20
0
20
IOUT = −1.5A
−25
0
25
IOUT = 1.5A
−25
0
25
Unit
V
kΩ
V
mV
AVIN Quiescent Current
IQ_AVIN
IOUT = 0A
--
320
500
μA
VDDQ Input Impedance
ZVDDQ
No Load
--
100
--
kΩ
AVIN Shutdown Current
ISHDN_AVIN
SD = 0V
--
115
150
μA
SD Pin Leakage Current
ISHDNLK
SD = 0V
--
2
5
μA
SD Input
Voltage
Logic-High
VIH
1.9
--
--
Logic-Low
VIL
--
--
0.8
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS2596-01 July 2013
V
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
3
RT2596
Parameter
Symbol
VTT Leakage Current
IILK
VTTSNS Input Current
IVTTSNS
Thermal Shutdown Protection
TSD
Test Conditions
Min
Typ
Max
Unit
--
1
10
μA
--
13
--
nA
(Note 6)
--
165
--
°C
(Note 6)
--
10
--
°C
SD = 0V, VTT = 1.25V
Thermal Shutdown Hysteresis ΔTSD
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured in the natural convection (air flow = 0 ft/min) at TA = 25°C on a highly thermal conductive four-layer test
board of JEDEC 51-7 thermal measurement standard. The test board size is 75.6mm x 114.3mm (3"x4.5") with 1.6mm
thickness FR4 refer to JEDEC 51 standard. The test board exist four-layer copper, 2oz. (0.07mm) thickness. The case
point of θJC is on the expose pad for SOP-8 (Exposed Pad) package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. VIN is defined as VIN = AVIN = PVIN
Note 6. Guaranteed by design. No production test.
Typical Application Circuit
RT2596
VIN
2.5V
6 AVIN
7
PVIN
VTTREF
2
3
VTTSNS
8
VTT
C1
22µF
C2
1µF
SD
5 VDDQ
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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4
4
VREF
1.25V
C3
0.1µF
VTT
1.25V
C4
150µF
GND
1, 9 (Exposed Pad)
is a registered trademark of Richtek Technology Corporation.
DS2596-01 July 2013
RT2596
Typical Operating Characteristics
Supply Current vs. Temperature
Shutdown Current vs. Temperature
320
120
115
Shutdown Current (μA)1
Supply Current (µA)
310
300
290
280
270
260
250
240
110
105
100
95
90
PVIN = AVIN = VDDQ = 2.5V,
VEN = 0V, VOUT = 1.25V
85
230
PVIN = AVIN = VDDQ = 2.5V, VOUT = 1.25V
220
80
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
75
100
125
VTTREF Voltage vs. Temperature
1.30
1.28
1.28
VTTREF Voltage (V)
1.30
1.26
1.24
1.22
1.26
1.24
1.22
PVIN = AVIN = VDDQ = 2.5V,
VOUT = 1.25V, IOUT = 0A
PVIN = AVIN = VDDQ = 2.5V,
VOUT = 1.25V, IOUT = 0A
1.20
1.20
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
25
50
75
100
125
Temperature (°C)
Supply Current vs. AVIN Voltage
Shutdown Current vs. AVIN Voltage
350
120
Shutdown Current (μA)1
Supply Current (μA)
50
Temperature (°C)
VTT Voltage vs. Temperature
VTT Voltage (V)
25
330
310
290
270
115
110
105
100
95
PVIN = VDDQ = 2.5V, VOUT = 1.25V
250
PVIN = VDDQ = 2.5V, VOUT = 1.25V
90
2.0
2.5
3.0
3.5
4.0
4.5
5.0
AVIN Voltage (V)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS2596-01 July 2013
5.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
AVIN Voltage (V)
is a registered trademark of Richtek Technology Corporation.
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5
RT2596
VTTREF Voltage vs. VDDQ Voltage
3.0
2.5
2.5
VTTREF Voltage (V)
VTT Voltage (V)
VTT Voltage vs. VDDQ Voltage
3.0
2.0
1.5
1.0
0.5
2.0
1.5
1.0
0.5
0.0
0.0
0
1
2
3
4
5
6
0
1
2
3
4
VDDQ Voltage (V)
VDDQ Voltage (V)
Power On from EN
Power Off from EN
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PVIN = AVIN = VDDQ = 2.5V,
VTT = 1.25V, IOUT = 0.6A
PVIN = AVIN = VDDQ = 2.5V,
VTT = 1.25V, IOUT = 0.6A
VEN
(2V/Div)
VEN
(2V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
IOUT
(0.5A/Div)
IOUT
(0.5A/Div)
Time (25μs/Div)
Time (25μs/Div)
1.25VTT @ 3A Transient Response
1.25VTT @ 3A Transient Response
AVIN = 3.3V, PVIN = 2.5V, Source
AVIN = 3.3V, PVIN = 2.5V, Sink
VTT
(10mV/Div)
VTT
(10mV/Div)
IVTT
(2A/Div)
IVTT
(2A/Div)
Time (250μs/Div)
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6
Time (250μs/Div)
is a registered trademark of Richtek Technology Corporation.
DS2596-01 July 2013
RT2596
0.9VTT @ 3A Transient Response
0.9VTT @ 3A Transient Response
AVIN = 3.3V, PVIN = 1.8V, Source
AVIN = 3.3V, PVIN = 1.8V, Sink
VTT
(10mV/Div)
VTT
(10mV/Div)
IVTT
(2A/Div)
IVTT
(2A/Div)
Time (250μs/Div)
Time (250μs/Div)
0.75VTT @ 2A Transient Response
0.75VTT @ 2A Transient Response
AVIN = 3.3V, PVIN = 1.5V, Source
AVIN = 3.3V, PVIN = 1.5V, Sink
VTT
(10mV/Div)
VTT
(10mV/Div)
IVTT
(2A/Div)
IVTT
(2A/Div)
Time (250μs/Div)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS2596-01 July 2013
Time (250μs/Div)
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
7
RT2596
Application Information
VTTREF Regulator
VTTREF is a reference output voltage. To ensure stable
operation, a 0.1μF ceramic capacitor between VTTREF
and GND is recommended.
Capacitor Selection
Good bypassing is recommended from PVIN to GND to
help improve AC performance. A 10μF or greater input
capacitor located as close as possible to the IC is
recommended. The input capacitor must be located at a
distance of less than 0.5 inches from the PVIN pin of the
IC. Adding a ceramic capacitor 1μF close to the AVIN pin
can reduce the parasitic noises from the supply power.
For stable operation, total capacitance of the VTT output
terminal can be equal or greater than 20μF. The RT2596
is designed specifically to work with low ESR ceramic
output capacitor in space-saving and performance
consideration. Larger output capacitance can reduce the
noise and improve load transient response, stability and
PSRR. The output capacitor should be located near the
VTT output terminal pin as close as possible.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 package, the thermal resistance, θJA, is 120°C/W
on a standard JEDEC 51-7 four-layer thermal test board.
For SOP-8 (Exposed Pad) package, the thermal
resistance, θJA, is 49°C/W on a standard JEDEC 51-7
four-layer thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by the following
formula :
PD(MAX) = (125°C − 25°C) / (120°C/W) = 0.833W for
SOP-8 package
P D(MAX) = (125°C − 25°C) / (49°C/W) = 2.13W for
SOP-8 (Exposed Pad) package
θJA is measured in the natural convection with no air flow
on a highly thermal conductive four-layer test board of
JEDEC 51-7 thermal measurement standard. The test
board size is 75.6mm x 114.3mm (3"x4.5") with 1.6mm
thickness FR4 refer to JEDEC 51 standard. Applied power
dissipation is 0.5W for the thermal measurement. The
test board exist four-layer copper, 2oz. (0.07mm)
thickness. Force convection (air flow existed) also effects
the thermal performance. Figure 1 shows the relation
between thermal resistance θJA and the air flow factor.
140
Thermal Resistance (°C/W)
RT2596 is a 1.5A sink/source tracking termination
regulator. It is specifically designed for low-cost and lowexternal component count system such as notebook PC
applications. The RT2596 possesses a high speed
operating amplifier that provides fast load transient response
and only requires a 10μF ceramic input capacitor and two
10μF ceramic output capacitors.
120
100
SOP-8
80
60
SOP-8 (Exposed Pad)
40
20
0
0
200
400
600
800
1000
Air Flow LFM (Feet/Minute)
Figure 1. Thermal Resistance θJA vs. Air Flow Velocity
is a registered trademark of Richtek Technology Corporation.
DS2596-01 July 2013
RT2596
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 2 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Maximum Power Dissipation (W)1
2.2
Four-Layer PCB
2.0
1.8
SOP-8 (Exposed Pad)
1.6
1.4
1.2
1.0
0.8
0.6
SOP-8
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curve of Maximum Power Dissipation
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS2596-01 July 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
9
RT2596
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS2596-01 July 2013
RT2596
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS2596-01 July 2013
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11