Test Procedure for the NCP1631PFCGEVB Evaluation Board The board contains high voltage, hot, live parts. Be very cautious when manipulating or testing it. It is the responsibility of those who utilize the board, to take all the precautions to avoid that themselves or other people are injured by electric hazards or are victim of any other pains caused by the board. Input Range: 85 to 265 Vrms. Output Voltage: 390 Vdc Output Power Range: 0 to 300 W Brown-out levels: o Starts operation when the line voltage exceeds about 84 Vrms. o Stops operation when the line voltage drops below 72 Vrms. The NCP1631 is to be supplied by an external power source ranging from 13 V to 20 Vdc. The board PCB offers the option where NCP1631 is self-supplied. For that, some components are to be added (see application note “AN demoboard.pdf”). 390 Vdc Output Voltage The external VCC dc voltage (from 13 to 20 V) is to be applied here Line Connector (The input Voltage range is from 85 V to 265 Vrms) NCP1631 4 9/3/2009 ON Semiconductor Confidential Proprietary 1 of 4 J.T and S.C, August 2009 www.onsemi.com Connecting the board for testing Load (0.8 A max) VOUT GND NCP1631 Board 390 Vdc High voltage probe GND Vcc Input Socket V Oscilloscope A Isolated current probe 5 Voltage source (13 to 20 Vdc) Power analyser Input Voltage (85 to 265 Vrms) ON Semiconductor Confidential Proprietary The resistive or active load must be able to sustain 450 V (including transients) J.T and S.C, August 2009 Test 1 • • • • • Apply the input voltage 115 Vrms to the input socket. Connect a load between the (Vout;GND) terminals. Set the output current (Iout) to 0.8 A. Place a power analyser able to measure: the input power (Pin),the power factor (PF), the total harmonic distorsion (THD) Apply the VCC voltage 15 Vdc. Verify that: Parameters VOUT PF THD Efficiency 9/3/2009 Comments Limits Voltage measured between “VOUT” and 370 V < VOUT < 409 V “GND” Power Factor > 0.980 Total Harmonic Distortion < 13 % > 96 % VoutIout / Pin 2 of 4 www.onsemi.com Test 2 • • • Observe the input current using an oscilloscope and a current probe. The current is nearly sinusoidal. Increase the input voltage to 230 Vrms Verify that: Parameters VOUT PF THD Efficiency Comments Limits Voltage measured between “VOUT” and 370 V < VOUT < 409 V “GND” Power Factor > 0.970 Total Harmonic Distortion < 13 % > 97.5 % VoutIout / Pin Test 3: OCP • • • Set the input voltage to 90 Vrms and the output current to 0.8 A. Gradually decrease the input voltage while observing the input current with the oscilloscope until the top of the sinusoid becomes flat as in the blue curve below. Measure the plateau: it must be between 7.27 and 8.13 A Iin (2 A/ div) Vcontrol (1 V/div) Iline (2 A/div) 9/3/2009 3 of 4 www.onsemi.com Test 4: OVP • • • Observe the output voltage with an oscilloscope. Set the triggering level at about 200 V, the trigger position being set at 10% of the screen. Program the scope to observe 50 or 100 ms in single acquisition mode. Set the input voltage to 115 Vrms and apply it to the board. Abruptly apply the VCC voltage (15 V). Check that the output voltage keeps below 424 V. Test 5: Frequency Foldback • • • • Set the output current to 0.07 A and the input voltage to 115 Vrms. Connect a voltage probe to the test point DRV1 on the board and a current probe to observe the input current. Set the trigger at the top of input current sinusoid and zoom in to see the DRV pulses. Measure the switching frequency: it should be between 35 kHz and 50 kHz. 9/3/2009 4 of 4 www.onsemi.com