AN-1206 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Variable Gain Inverting Amplifier Using the AD5292 Digital Potentiometer and the OP184 Op Amp CIRCUIT FUNCTION AND BENEFITS VDD R3 1kΩ This circuit provides a low cost, high voltage, variable gain inverting amplifier using the AD5292 digital potentiometer in conjunction with the OP184 operational amplifier. +15V/+30V V+ OP184 VOUT V– –15V/GND R2 4.99kΩ ± 1% C1 10pF The circuit offers 1024 different gains, controllable through an SPI-compatible serial digital interface. The ±1% resistor tolerance performance of the AD5292 provides low gain error over the full resistor range, as shown in Figure 2. VSS VDD +15V/+30V RAW RAB 20kΩ AD5292 The circuit supports input and output rail to rail for both single supply operation at +30 V and dual supply operation at ±15 V; and is capable of delivering up to ±6.5 mA output current. VSS –15V/GND SERIAL INTERFACE 08426-001 VIN Figure 1. Variable Gain Inverting Amplifier (Simplified Schematic: Decoupling and All Connections Not Shown) In addition, the AD5292 has an internal 20-times programmable memory that allows a customized gain setting at power-up. The circuit provides accuracy, low noise, low THD, and is well suited for signal instrumentation conditioning. The circuit gain equation is CIRCUIT DESCRIPTION where D is the code loaded in the digital potentiometer. Table 1. Devices Connected/Referenced When the circuit input is an ac signal, the parasitic capacitances of the digital potentiometer can cause undesirable oscillation in the output. This can be avoided, however, by connecting a small capacitor, C1, between the inverter input and its output. A value of 10 pF was used for the gain and phase plots shown in Figure 3. Product AD5292 OP184 Description 10-bit, 1% resistor tolerance digital potentiometer Rail-to-rail input and output, low noise, high slew rate operational amplifier This circuit employs the AD5292 digital potentiometer in conjunction with the OP184 operational amplifier, providing a low cost variable gain noninverting amplifier. G=− G=− G= RAB R ⇒ R2 = − AB R2 G (1) 1024 (3) 1024 – D D (4) where D is the code loaded in the digital potentiometer. A gain plot versus code is shown in Figure 5. The circuit gain is defined in Equation 4. The AD5292 has a 20-times programmable memory, which allows presetting the output voltage in a specific value at power-up. The maximum current through the AD5292 is ±3 mA, which limits the maximum input voltage, VIN, based on the circuit gain, as Equation 2 describes. VIN ≤ 0.003 × R2 R2 A simple modification of the circuit provides a logarithmic gain function, as shown in Figure 4. In this case, the digital potentiometer is configured in the ratiometric mode. The input signal VIN is amplified by the OP184. The op amp offers low noise, high slew rate, and rail-to-rail input and output. The maximum circuit gain is defined in Equation 1. (1024 − D) × RAB (2) When the input signal connected to VIN is higher than the theoretical maximum value from Equation 2, R2 should be increased, and the new gain can be recalculated using Equation 1. The ±1% internal resistor tolerance of the AD5292 ensures a low gain error, as shown in Figure 2. Excellent layout, grounding, and decoupling techniques must be utilized in order to achieve the desired performance from the circuits discussed in this note (see MT-031 Tutorial and MT-101 Tutorial). As a minimum, a 4-layer PCB should be used with one ground plane layer, one power plane layer, and two signal layers. Rev. C | Page 1 of 2 AN-1206 Application Note 10k Excellent layout, grounding, and decoupling techniques must be utilized in order to achieve the desired performance from the circuits discussed in this note (see MT-031 Tutorial and MT-101 Tutorial). As a minimum, a 4-layer PCB should be used with one ground plane layer, one power plane layer, and two signal layers. GAIN 100 COMMON VARIATIONS The AD5291 (8-bits with 20-times programmable power-up memory) and the AD5293 (10-bits, no power-up memory) are both ±1% tolerance digital potentiometers that are suitable for this application. 3 2 2 0.01 0.0001 0 500 1000 CODE (Decimal) 08426-005 3 1 Figure 5. Logarithmic Gain Function GAIN ERROR (%) LEARN MORE 1 0 0 –1 –1 MT-031 Tutorial, Grounding Data Converters and Solving the Mystery of "AGND" and "DGND", Analog Devices. ERROR (%) GAIN 1 MT-032 Tutorial, Ideal Voltage Feedback (VFB) Op Amp, Analog Devices. GAIN –2 –2 –3 –3 0 200 400 600 –4 1000 800 MT-091 Tutorial, Digital Potentiometers, Analog Devices. 08426-002 –4 MT-087 Tutorial, Voltage References, Analog Devices. CODE (Decimal) MT-101 Tutorial, Decoupling Techniques, Analog Devices. Figure 2. Gain and Gain Error vs. Decimal Code PHASE, RAW = 100Ω AD5292 Evaluation Board. 225 200 –20 175 150 –30 125 100 GAIN, RAW = 100Ω –40 AD5293 Data Sheet. OP184 Data Sheet. REVISION HISTORY 75 50 25 –50 –60 AD5292 Data Sheet. 275 250 600 1k 10k 100k 0 200k FREQUENCY (Hz) Figure 3. Gain and Phase vs Frequency for AC Input Signal R3 1kΩ Changes to Circuit Function and Benefits Section .......................1 VOUT 12/09—Rev. 0 to Rev. A Corrected trademark.........................................................................1 VSS 8/09—Revision 0: Initial Version SERIAL INTERFACE 20kΩ AD5292 D × RAB 1024 (1024 – D) × RAB 1024 08426-004 RAB VIN Changed Document Name from CN-0113 to AN-1206 .............................................................................. Universal 4/10—Rev. A to Rev. B VDD OP184 C1 10pF 4/13—Rev. B to Rev. C 08426-003 GAIN (dBV) GAIN, RAW = 10kΩ GAIN, RAW = 20kΩ 325 300 PHASE (Degrees) PHASE, RAW = 10kΩ –10 AD5291 Data Sheet. 350 10 0 Data Sheets and Evaluation Boards 400 375 PHASE, RAW = 20kΩ 20 Figure 4. Logarithmic Gain Circuit ©2009–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN08432-0-4/13(C) Rev. C | Page 2 of 2