Evaluation Board User Guide UG-276 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the ADN2850 Digital Rheostat FEATURES GENERAL DESCRIPTION Full featured evaluation board for the ADN2850 Several test circuits Various ac/dc input signals PC control via a separately purchased system development platform (SDP) PC control software 26 extra bytes in EEMEM for user-defined information Resistor tolerance error stored in EEMEM This user guide describes the evaluation board for evaluating the ADN2850—a dual-channel, 1024-position, nonvolatile memory digital resistor. With versatile programmability, the ADN2850 allows multiple modes of operation, including read/write access in the RDAC and EEMEM registers, increment/decrement of resistance, resistance changes in ±6 dB scales, wiper setting readback, and extra EEMEM for storing user-defined information, such as memory data for other components or a lookup table. PACKAGE CONTENTS The ADN2850 supports a dual-supply ±2.25 V to ±2.75 V operation and a single-supply 2.7 V to 5.5 V operation, making the device suited for battery-powered applications and many other applications. In addition, the ADN2850 uses a versatile SPI-compatible serial interface, allowing speeds of up to 50 MHz. EVAL-ADN2850SDZ evaluation board CD that includes Self-installing software that allows users to control the board and exercise all functions of the device Electronic version of the ADN2850 data sheet Electronic version of the UG-276 document The EVAL-ADN2850SDZ can operate in single-supply and dual-supply mode and incorporates an internal power supply from the USB. Complete specifications for the ADN2850 part can be found in the ADN2850 data sheet, which is available from Analog Devices, Inc., and should be consulted in conjunction with this user guide when using the evaluation board. DIGITAL PICTURE OF EVALUATION BOARD WITH SYSTEM DEMONSTRATION PLATFORM SYSTEM DEMONSTRATION PLATFORM 09842-001 EVAL-ADN2850SDZ Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 16 UG-276 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Test Circuits ...................................................................................4 Package Contents .............................................................................. 1 Evaluation Board Software ...............................................................6 General Description ......................................................................... 1 Installing the Software ..................................................................6 Digital Picture of Evaluation Board with System Demonstration Platform.................................................................. 1 Running the Software ...................................................................6 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ...................................8 Evaluation Board Hardware ............................................................ 3 Ordering Information .................................................................... 14 Power Supplies .............................................................................. 3 Bill of Materials ........................................................................... 14 Software Operation .......................................................................7 Link Options ................................................................................. 3 REVISION HISTORY 5/11—Revision 0: Initial Version Rev. 0 | Page 2 of 16 Evaluation Board User Guide UG-276 EVALUATION BOARD HARDWARE POWER SUPPLIES LINK OPTIONS The EVAL-ADN2850SDZ supports the use of single and dual power supplies. Several link and switch options are incorporated in the evaluation board and should be set up before using the board. Table 2 describes the positions of the links to control the evaluation board by a PC, via the SDP board, using the EVAL-ADN2850SDZ in single-supply mode. The functions of these link and switch options are described in detail in Table 3 through Table 6. In single-supply mode, the evaluation board can be powered either from the SDP port or externally by the J1-1, J1-2, and J1-3 connectors, as described in Table 1. If dual-supply mode is required, the J1-1, J1-2, and J1-3 connectors must provide the external power supply, as described in Table 1. All supplies are decoupled to ground using 10 µF tantalum and 0.1 µF ceramic capacitors. Table 1. Maximum and Minimum Voltages of the Connectors Connector No. J1-1 Label EXT VDD J1-2 J1-3 GND EXT VSS Table 2. Link Options Setup for SDP Control (Default) Link No. A25 A24 Option 3.3 V GND Voltage Analog positive power supply, VDD. For single-supply operation, it is 2.7 V to 5.5 V. For dual-supply operation, it is 2.5 V to 2.75 V. Analog GND. Analog negative power supply, VSS. For single-supply operation, it is 0 V. For dual-supply operation, it is −2.5 V to −2.75 V. Table 3. Link Functions Link No. A25 Power Supply VDD A24 VSS Options This link selects one of the following as the positive power supply: 5 V (from SDP). 3.3 V (from SDP). EXT (external supply from the J1-1 connector). This link selects one of the following as the negative power supply: GND (analog ground). VSS (external supply from the J1-3 connector). Rev. 0 | Page 3 of 16 UG-276 Evaluation Board User Guide TEST CIRCUITS The output voltage is defined in Equation 1. The EVAL-ADN2850SDZ incorporates several test circuits to evaluate the ADN2850 performance. VOUT = (VREF1 − VREF2 ) × Pseudologarithmic DAC RDAC1 can be operated as a pseudologarithmic DAC, as shown in Figure 2. VDD – VSS 2 AC + DC VDD EXTERNAL CONNECTION VDD R34 4.7kΩ A1 W1 W1 DC VDD – VSS 2 RDAC1 × 25 kΩ 1024 (2) where: RWB1 is the resistor between the W1 and B1 terminals. VREF1 is the top voltage reference (A20 link). VREF2 is the bottom voltage reference (A21 link). RDAC1 is the code loaded in the RDAC1 register. W1_BUF RDAC1 can be operated as a pseudoantilogarithmic DAC, as shown in Figure 4. In this case, R35 must be changed from the populated value of 0 Ω resistance to the suggested value of 4.7 kΩ. BUF_W1 B1 R35 VSS VDD – VSS 2 GND VDD 09842-002 VSS AC + DC EXTERNAL CONNECTION VDD R34 4.7kΩ Figure 2. Pseudologarithmic DAC A1 RDAC1 W1 The output voltage plot is shown in Figure 3. The output voltage is relative to VDD and VSS. W1 B1 1.0 DC VDD – VSS 2 0.8 W1_BUF BUF_W1 B1 R35 4.7kΩ VSS VSS GND 0.6 09842-003 RELATIVE OUTPUT VOLTAGE (1) Pseudoantilogarithmic DAC RDAC1 B1 RWB1 = RWB1 + VREF2 RWB1 + R34 Figure 4. Pseudoantilogarithmic DAC. 0.4 The output voltage plot is shown in Figure 5. The output voltage is relative to VDD and VSS. 0.2 200 400 600 DECIMAL CODE 800 1000 Figure 3. Pseudologarithmic Gain Table 4 shows the options available for the voltage references. Table 4. Pseudologarithmic DAC Voltage References Terminal A1 Link A20 W1 BUF_W1 B1 A21 Options AC + DC VDD DC VSS GND Description Connects R34 to (VDD − VSS)/2 Connects R34 to VDD Connects Terminal W1 to an output buffer Connects Terminal B1 to (VDD − VSS)/2 Connects Terminal B1 to VSS Connects Terminal B1 to analog ground 0.8 0.6 0.4 0.2 Rev. 0 | Page 4 of 16 0 0 200 400 600 DECIMAL CODE 800 Figure 5. Pseudoantilogarithmic Gain 1000 09842-020 0 RELATIVE OUTPUT VOLTAGE 0 09842-019 1.0 Evaluation Board User Guide UG-276 Table 5 shows the options available for the voltage references. The noninverting amplifier with linear gain is shown in Figure 6, and the gain is defined in Equation 3. Options AC + DC VDD W1 BUF_W1 B1 A21 DC VSS GND Description Connects Terminal W1 to (VDD − VSS)/2 Connects Terminal W1 to VDD Connects Terminal W1 to an output buffer Connects R35 to (VDD − VSS)/2 Connects R35 to VSS Connects R35 to analog ground R35 = (VREF1 − VREF2 ) × + VREF2 RWB1 + R35 RWB1 = RDAC1 × 25 kΩ 1024 where RWB2 is the resistor between the W2 and B2 terminals. (3) W2 W2 OAVOUT B2 R42 B2 RDAC2 The inverting amplifier with linear gain is shown in Figure 7, and the gain is defined in Equation 5. G=− RWB2 R38 (5) where RWB2 is the resistor between the W2 and B2 terminals. R41, 1.7kΩ VIN VOUT R38, 2.7kΩ C1 10nF W2 Table 6. Amplifier Selection Link Options Linear C1 10nF W2 Link A27 A29 A30 A27 A29 A30 VOUT R38, 2.7kΩ (4) RDAC2 can be operated as an inverting or noninverting signal amplifier supporting linear gains. Table 6 shows the available configurations. Inverting R41, 1.7kΩ VIN Signal Amplifier Gain Linear (4) R42 can be used to set the maximum and minimum gain limits. where: RWB1 is the resistor between the W1 and B1 terminals. VREF1 is the top voltage reference (A20 link). VREF2 is the bottom voltage reference (A21 link). RDAC1 is the code loaded in the RDAC1 register. Amplifier Noninverting RWB2 R38 Figure 6. Linear Noninverting Amplifier The output voltage is defined in Equation 3. VOUT G =1+ Label LINEAR NON-INVERTING NON-INVERTING LINEAR INVERTING INVERTING OAVOUT B2 B2 R42 09842-005 Link A20 RDAC2 Figure 7. Linear Inverting Amplifier R42 can be used to set the maximum and minimum gain limits. Current Monitoring Configurable Function The ADN2850 comes with a pair of matched diode connected PNPs (Q1 and Q2) accessible from external pins (I1 and I2); test points (V1 and V2) allow direct access to these pins, as shown in Figure 8. V1 I1 CURRENT MONITOR V2 I2 09842-006 Terminal A1 09842-004 Table 5. Pseudoantilogarithmic DAC Voltage References Figure 8. Current Monitoring The ADN2850 data sheet provides a detailed description how to use these current monitor terminals. Rev. 0 | Page 5 of 16 UG-276 Evaluation Board User Guide EVALUATION BOARD SOFTWARE INSTALLING THE SOFTWARE RUNNING THE SOFTWARE The EVAL-ADN2850SDZ evaluation kit includes evaluation board software provided on a CD. The software is compatible with Windows® XP, Windows Vista, and Windows 7 (both 32 and 64 bits). To run the evaluation board software, do the following: 1. 2. Install the software before connecting the SDP board to the USB port of the PC to ensure that the SDP board is recognized when it is connected to the PC. 3. 4. 5. Start the Windows operating system and insert the CD. The installation software opens automatically. If it does not, run the setup.exe file from the CD. After installation is completed, power up the evaluation board as described in the Power Supplies section. Plug the EVAL-ADN2850SDZ into the SDP board and the SDP board into the PC using the USB cable included in the box. When the software detects the evaluation board, follow the instructions that appear to finalize the installation. 09842-007 1. 2. Click Start > All Programs > Analog Devices > ADN2850 > ADN2850 Eval Board. If the SDP board is not connected to the USB port when the software is launched, a connectivity error is displayed (see Figure 9). Connect the evaluation board to the USB port of the PC, wait a few seconds, click Rescan, and follow the instructions. To uninstall the program, click Start > Control Panel > Add or Remove Programs > ADN2850 Eval Board. Figure 9. Pop-Up Window Error 09842-008 The main window of the EVAL-ADN2850SDZ evaluation software then opens, as shown in Figure 10. Figure 10. EVAL-ADN2850SDZ Evaluation Board Software Main Window Rev. 0 | Page 6 of 16 Evaluation Board User Guide UG-276 SOFTWARE OPERATION The main window of the EVAL-ADN2850SDZ software is divided into the following sections: QUICK COMMANDS, REGISTER ACCESS, HARDWARE PINS, TOLERANCE, and MEMORY. The features of the main window are as follows: • • • • The QUICK COMMANDS section allows you to send the ADN2850 quick commands directly to the ADN2850. The REGISTER ACCESS section can be used to update the RDAC registers by typing a value into a window and clicking WRITE. Alternatively, you can send a customized SPI data word by manually switching the scroll bars from 0 to 1 or from 1 to 0, as desired, and then clicking SEND DATA. When WRITE is clicked or a quick command is executed, a write-read operation is performed, and the values displayed in this section are updated with the actual • • Rev. 0 | Page 7 of 16 RDAC register values. This function can be used to verify whether the write operation was completed successfully. The scroll bars are updated upon each write transfer. The HARDWARE PINS section selects the level of the external control pins, switches the level of the WP pin, and generates a pulse in the PR pin. The TOLERANCE section displays the stored tolerance of the RDAC1 internal resistor. The MEMORY section displays the data stored in the memory block. The data can be updated by switching the scroll bar from READ to WRITE, updating a particular window value, clicking UPDATE ALL or UPDATE SINGLE, and selecting the memory location to write. Clicking EXIT closes the program but does not reset the part. A1 A1 Rev. 0 | Page 8 of 16 Figure 11. Schematic of Multiboard Digital Potentiometers B4 W4-3 A4 B3 W3-3 A3 B2 W2-3 A2 B1 W1-3 A1 B4 W4-2 A4 B3 W3-2 A3 B2 W2-2 A2 B1 W1-2 B4 W4-1 A4 B3 W3-1 A3 B2 W2-1 A2 B1 W1-1 16 DGND 9 VDD AD8403 13 14 2 14 W3 12 22 A4 16 B4 17 W4 VSS GND WP 6 5 20 18 A4 22 3 2 4 23 24 1 19 RESET 21 SYNC DIN SCLK SDO RDY O2 O1 VDD AD5233 13 B3 14 W3 15 A3 12 B2 11 W2 10 A2 9 B1 8 W1 U4 7 A1 11 24 B4 VSS GND 3 23 W4 NC NC 1 13 B3 NC SHDN 7 RESET 15 A3 VSS VDD VSS WP RESET SYNC-3 DIN SCLK SDO RDY O2 O1 SHDN RESET SDO 10 20 W2 5 DIN 8 19 A2 SDO DIN SCLK 9 21 B2 SYNC-2 SCLK SYNC 4 16 B1 VDD SYNC-1 17 W1 11 DIN SDO SCLK RESET SHDN AD5204 VDD 6 SYNC DIN 12 SDO SCLK VDD U8 18 A1 6 B4 5 AGND4 8 W4 7 A4 20 B3 17 AGND3 18 W3 19 A3 SHDN 10 2 B2 1 AGND2 15 RESET 4 W2 3 A2 24 B1 21 AGND1 22 W1 U6 23 A1 A1 A1 B2 W2-7 A2 B1 W1-7 A1 V2 V1 B2 W2-6 B1 W1-6 B2 W2-5 A2 B1 B2 W2-4 B1 W1-4 W1-5 SPI 2 W1 A1 W1 W1 A1 9 10 11 B2 W2 A2 16 3 2 1 15 4 GND 5 VSS 13 WP 14 RESET RDY SDO DIN SCLK SYNC 16 3 2 1 15 U11 VDD 12 4 GND 5 VSS 13 WP 14 RESET RDY SDO DIN SCLK SYNC 12 4 GND 5 VSS U12 VDD AD5235 V2 V1 B2 W2 8 B1 7 6 11 6 9 10 16 3 2 1 15 13 WP 14 RESET RDY SDO DIN SCLK SYNC ADN2850 B2 W2 A2 8 B1 7 9 10 11 4 U10 VDD 12 GND SYNC 8 7 DIN 6 SCLK AD5232 B2 W2 B1 W1 U2 VDD 5 AD5162 A1 8 B1 7 6 9 3 1 10 VSS VDD VSS VDD VSS VDD VDD WP RESET RDY SDO DIN SCLK SYNC-7 WP RESET RDY SDO DIN SCLK SYNC-6 WP RESET RDY SDO DIN SCLK SYNC-5 SYNC-4 DIN SCLK B2 W2-9 A2 B1 W1-9 A1 B4 W4-8 A4 B3 W3-8 A3 B2 W2-8 A2 B1 W1-8 A1 13 14 12 5 4 6 18 B4 B3 W3 A3 B1 W1 0x58 20 15 5 10 DGND 8 VSS 3 WP 11 AD1 2 AD0 9 SCL 7 SDA U9 VDD 0x5A 1 VSS 10 DGND WP AD0 4 AD1 16 SDA 9 14 SCL VDD AD5254 AD5252 A1 19 W4 17 A4 12 B3 13 W3 11 A3 7 B2 6 W2 8 A2 2 B1 1 W1 U7 3 A1 MULTICHANNEL VSS VDD VSS WP SDA SCL VDD I2C WP SCL SDA VDD B2 W2-11 A2 B1 W1-11 A1 B2 W2-10 A2 B1 W1-10 A1 B1 W1 B1 W1 A1 9 3 B2 W2 U1 AD5243 B2 W2 8 A2 1 10 2 9 3 8 A2 1 10 4 6 7 GND SCL SDA VDD 4 6 7 5 0x5E GND SCL SDA 0x5E AD5172_SOCKET 2 U3 VDD 5 A1 VDD SCL SDA VDD SCL SDA B2 W2-12 A2 B1 W1-12 A1 7 5 6 1 3 2 B2 W2 A2 B1 W1 A1 VDD VSS 13 12 11 10 9 GND 8 4 VSS CS CLK U/D DACSEL MODE U5 VDD 14 AD5222 U/D CS CLK U/D DACSEL MODE UG-276 Evaluation Board User Guide EVALUATION BOARD SCHEMATICS AND ARTWORK 09842-009 Evaluation Board User Guide UG-276 VDD 8 U15-C V+ V4 VDD VSS R39 AC_INPUT A1 C3 A20 A U15-A 3 + 2 1 B C - R40 VDD AC + DC AC R34 A1 AD8652AR VSS DAC + FLOATING DAC + BW W1-1 W1-2 W1-3 W1-4 W1-5 W1-6 W1-7 W1-8 W1-9 W1-10 W1-11 W1-12 AD8403-1 W1_BUF BUF-W1 AD5204-1 3 + 1 U14-A 2 AD8618ARZ AD5233-1 W1 AD5162-1 AD5232-1 ADN2850-1 W1 AD5235-1 R36 AD5254-1 PSEUDOLOG ATTENUATOR AD5252-1 AD5172 AD5243-1 B1 AD5222-1 A21 A VDD B1 R35 B1 B R3 C VSS AD8652AR 6 - 5 7 + U15-B 09842-010 R4 VSS Figure 12. Schematic of Multiboard RDAC1 Circuits INVERTING AND NON-INVERTING WITH LINEAR AND PSEUDO-LOG GAIN W2-11 W2-12 B AD5232 -2 A A30 NON-INVERTING W2 B2 ADN2850 -2 A2 VIN J2-1 W2 AD5252 -2 AD5172 -2 GND AD5243 -2 PSEUDOLOG INVERTING AD5254 -2 NON-INVERTING DIGIPOT B2 R42 R43 B AD5235 -2 CIRCUIT CONNE CTION OAVOU T 5 + 7 6 U14-B AD8618ARZ A2 LINEAR C1 R38 J2-2 09842-011 W2-10 R41 A W2-8 W2-9 W2 AD5162 -2 A27 W2-7 AD5233 -2 B W2-5 W2-6 VOU T INVERTING AD5204 -2 A W2-3 W2-4 AD8403 -2 A29 W2-1 W2-2 AD5322 -2 Figure 13. Schematic of Multiboard RDAC2 Circuits Rev. 0 | Page 9 of 16 Rev. 0 | Page 10 of 16 W3-8 W3-3 W3-2 W3-1 AD5254-4 AD5233-4 AD5204-4 AD8403-4 AD5254-3 AD5233-3 AD5204-3 AD8403-3 W4-8 W4-3 W4-2 W4-1 W3 W4 BUF-3 BUF-4 A3 B4 A4 B3 10 + 8 U14-C 9 AD8618ARZ 12 + 14 U14-D 13 AD8618ARZ CHANNELS 3 AND 4 B3 VOUT3 A3 B4 VOUT4 A4 O1 Figure 14. Schematic of ADN2850 Power Supplies and Other Channels O2 O2 O1 DIGITAL PINS +3.3V +5V GND GND EXT VSS B A A24 + V1 V2 V2 V1 + 10uF C27 C24 10uF C26 0.1uF C25 0.1uF POWER-SUPPLIES CURRENT MONITOR J1-3 J1-2 A25 EXT VDD A J1-1 +5V B +3.3V C POWER-SUPPLY C4 0.1uF C2 0.1uF VSS VDD UG-276 Evaluation Board User Guide 09842-012 +3.3V 24LC01 1 A0 2 A1 3 A2 4 VSS D6 LED U25 8 VCC 7 WP 6 SCL 5 SDA 1K R37 Rev. 0 | Page 11 of 16 RESET_BF SHDN_BF MUX-A0|CS MUX-A2|U/D SCL_BF SDA_BF DIN_BF SCLK_BF SYNC_BF +5V +3.3V J22 Figure 15. Schematic of SDP Connector 114 113 9 112 10 111 71 70 68 67 66 65 64 61 62 I2C FUTURE USE BLACKFIN CONTROL UART TIMERS INPUT/OUTPUT GENERAL SPI 90 31 91 92 35 PAR_D23 PAR_D21 SPORT_DR3 SPORT_DR2 SPORT_DT2 SPORT_DT3 TMR_C FUTURE FUTURE FUTURE FUTURE FUTURE FUTURE FUTURE RESET_IN UART_RX TMR_A 7 8 29 30 33 34 49 50 51 53 54 55 56 57 60 59 48 43 GPIO0 44 GPIO2 45 GPIO4 47 GPIO6 41 SDA_1 42 SCL_1 37 SPI_SEL_B 38 SPI_SEL_C 39 SPI_SEL1/_SS BLACKFIN-DB_FEMALE_CONNECTOR_2 PAR_D22 PAR_D20 PAR_D19 PAR_D18 PAR_D17 PAR_D16 FUTURE FUTURE FUTURE FUTURE FUTURE FUTURE FUTURE BMODE1 UART_TX 73 TMR_B 72 TMR_D 78 GPIO1 77 GPIO3 76 GPIO5 74 GPIO7 80 SDA_0-EEPROM 79 SCL_0-EEPROM 85 SPI_SEL_A 84 SPI_MOSI 83 SPI_MISO 82 SPI_CLK SPORT_RFS SPORT_DR1 SPORT_DR0 SPORT_RSCLK SPORT_INT 26 PAR_FS3 27 PAR_FS1 89 SPORT_TFS 32 SPORT_DT1 88 SPORT_DTO 87 SPORT_TSCLK 24 PAR_A3 25 PAR_A1 95 PAR_FS2 94 PAR_CLK 12 13 14 15 16 18 19 20 1 2 3 4 5 6 11 17 23 28 36 40 46 52 58 97 PAR_A2 96 PAR_A0 SPORT PORT PARALLEL PAR_D14 PAR_D13 PAR_D11 PAR_D9 PAR_D7 PAR_D5 PAR_D3 PAR_D1 VIN_4-12V N/C GND GND 5V_USB GND GND GND GND GND GND GND GND GND GND 21 PAR_RD 22 PAR_CS PAR_D15 PAR_D12 PAR_D10 PAR_D8 PAR_D6 PAR_D4 PAR_D2 PAR_D0 7V_UNREGOUT 7V_UNREGOUT GND GND V_IO(3.3V) GND GND POWER SUPPLY GND GND GND GND GND GND GND GND 100 PAR_WR 99 PAR_INT 110 108 107 106 105 103 102 101 120 119 118 117 116 115 109 104 98 93 86 81 75 69 63 SDP BOARD CONNECTOR AND EEPROM RDY|MODE WP_BF CLK_BF MUX-A1|DACSEL SDO_BF +5V A23 SYNC RDY|MODE CLK MUX-A2|U/D VDD A8 A7 A6 A5 MUX-A1|DACSEL MUX-A0|CS MUX-A1|DACSEL MUX-A2|U/D RDY|MODE CLK_BF MUX-A2|U/D MUX-A1|DACSEL MUX-A0|CS MUX-A0|CS D VDD ADG658 7 8 VSS GND 11 A0 10 9 A1 6 A2 EN 3 16 WP_BF SYNC_BF SDO_BF DIN_BF S8 S7 S6 S5 S4 S3 S2 S1 A22 4 2 5 1 12 15 14 13 MUX - CS WP_BF SYNC_BF SDO_BF DIN_BF SCLK_BF SCLK_BF A11 A10 A12 A13 A9 SYNC-7 SYNC-6 SYNC-5 SYNC-4 SYNC-3 SYNC-2 SYNC-1 RESET_BF SHDN_BF SCL_BF SDA_BF EXTERNAL CONTROL CONNECTION RDY_BF SDO_BF RESET_BF SHDN_BF SCL_BF SDA_BF A16 A17 A18 A14 SYNC_BF RESET_BF WP_BF SHDN_BF SCLK_BF DIN_BF R1 2k2 +3.3V VDD DGND 31 32 35 36 37 38 39 40 1 2 3 4 5 6 7 8 9 10 BE1 BE2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 SEL 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 34 U13 ADG3247-CSP 11 33 GND VCC +3.3V VSS +3V3 LEVEL TRANSLATOR SDA_BF SCL_BF MUX-A0|CS MUX-A1|DACSEL MUX-A2|U/D RDY|MODE CLK_BF R2 2k2 +3.3V VDD AGND VSS +5V SCLK DIN SDO SYNC RESET WP SHDN RDY SDA SCL CS DACSEL U/D MODE CLK +5V TEST POINTS Evaluation Board User Guide UG-276 09842-013 Evaluation Board User Guide 09842-014 UG-276 09842-015 Figure 16. Component Side View 09842-016 Figure 17. Component Placement Drawing Figure 18. Layer 2 Side PCB Drawing Rev. 0 | Page 12 of 16 UG-276 09842-017 Evaluation Board User Guide 09842-018 Figure 19. Layer 3 Side PCB Drawing Figure 20. Solder Side PCB Drawing Rev. 0 | Page 13 of 16 UG-276 Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 7. Qty 1 4 1 2 1 1 1 1 4 3 4 1 2 5 1 35 1 6 35 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Reference Designator C1 C2, C4, C25, C26 C3 C24, C27 D6 J1 J2 J22 A20, A21, A24, A25 A27, A29, A30 BUF-W1, OAVOUT, BUF-3, BUF-4 R41 R1, R2 R3, R4, R38, R39, R40 R34 AD5162-1, AD5162-2, AD5172-1, AD5172-2, AD5204-1, AD5204-2, AD5204-3, AD5204-4, AD5222-1, AD5222-2, AD5232-1, AD5232-2, AD5233-1, AD5233-2, AD5233-3, AD5233-4, ADN2850-1, ADN2850-2, AD5243-1, AD5243-2, AD5252-1, AD5252-2, ADN2850-1, ADN2850-2, ADN2850-3, ADN2850-4, AD8403-1, AD8403-2, AD8403-3, AD8403-4, ADN2850-1, ADN2850-2, R35, R42, R43 R37 3.3 V, 5 V, DGND, AGND, VDD, VSS A1, A2, A3, A4, RDY|MODE, RESET_BF, SCL_BF, SCLK_BF, SDA_BF, SDO_BF, SHDN_BF, SYNC_BF, MUX-A0|CS, MUX-A1|DACSEL, MUX-A2|U/D, O1, O2, DIN_BF, CLK, B1, B2, B3, B4, V1, V2, VOUT, VOUT2, VOUT3, VOUT4, W1, W1_BUF, W2, W3, W4, WP_BUF U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 U11 U12 U13 U14 U15 A22 U25 Description 10 nF capacitor, 0805 0.1 µF capacitor, 0603 1 µF capacitor, 0402 10 µF capacitor, 1206 LED, green 3-pin connector 2-pin connector Receptacle, 0.6 mm, 120 way Header, 2-row, 36 + 36 way, and jumper socket, black Header, 1-row, 3-way, and jumper socket, black Header, 1-row, 2-way, and jumper socket, black 1.78 kΩ resistor, 0603, 1% 2.2 kΩ resistor, 0603, 1% 2.7 kΩ resistor, 1206, 1% 4.7 kΩ resistor, 0603, 1% 0 Ω resistor, 0603 Supplier 1/Part Number FEC 1692285 FEC 138-2224 FEC 1288253 FEC 1611967 FEC 579-0852 FEC 151790 FEC 151789 Digi-Key H1219-ND FEC 148-535 and FEC 150-410 FEC 102-2248 and FEC 150-410 FEC 102-2247 and FEC 150-410 FEC 1170811 FEC 933-0810 FEC 9337288 FEC 9331247 FEC 9331662 1 kΩ resistor, 0603, 1% Test point, PCB, black, PK100 Test point, PCB, red, PK100 FEC 933-0380 FEC 873-1128 FEC 873-1144 AD5243 AD5162 AD5172 AD5233 AD5222 AD8403 ADN2850 AD5204 AD5252 AD5232 ADN2850 ADN2850 ADG3247 AD8618 AD8652 ADG658 24LC64 Analog Devices AD5243 Analog Devices AD5162 Analog Devices AD5172 Analog Devices AD5233 Analog Devices AD5222 Analog Devices AD8403 Analog Devices ADN2850 Analog Devices AD5204 Analog Devices AD5252 Analog Devices AD5232 Analog Devices ADN2850 Analog Devices ADN2850 Analog Devices ADG3247 Analog Devices AD8618 Analog Devices AD8652 Analog Devices ADG658 FEC 975-8070 FEC refers to Farnell Electronic Component Distributors; Digi-Key refers to Digi-Key Corporation. Rev. 0 | Page 14 of 16 Evaluation Board User Guide UG-276 NOTES Rev. 0 | Page 15 of 16 UG-276 Evaluation Board User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG09842-0-5/11(0) Rev. 0 | Page 16 of 16