Evaluation Board User Guide UG-441 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD5420 Single-Channel, 16-Bit, Serial Input, Current Source DAC FEATURES DEVICE DESCRIPTION Full-featured evaluation board for the AD5420 On-board reference Link options Direct hook-up to USB port of PC PC software for control The AD5420 is a low cost, precision, fully integrated 16-bit converter, offering a programmable current source output designed to meet the requirements of industrial process control applications. The output current range is programmable from 4 mA to 20 mA, 0 mA to 20 mA, or an overrange function of 0 mA to 24 mA. The output is open-circuit protected. The device is specified to operate with a power supply range from 10.8 V to 40 V. Output loop compliance is 0 V to AVDD − 2.5 V. EVALUATION BOARD DESCRIPTION The EVAL-AD5420 is a full-featured evaluation board, designed to allow the user to easily evaluate all features of the AD5420 current source, 16-bit digital-to-analog converter (DAC). All of the AD5420 pins are accessible at on-board connectors for external connection. The board can be controlled by two means, via the on-board connector (J8) or via the USB port of a Windows® 2000-, NT®-, XP®-based PC using the AD5420 evaluation software. The default setup is for control via the USB port. Complete specifications for the AD5420 are available in the AD5420 data sheet available from Analog Devices, Inc., and should be consulted in conjunction with this user guide when using the evaluation board. FUNCTIONAL BLOCK DIAGRAM POWER SUPPLY INPUTS USB CONNECTOR 5V VOLTAGE REFERENCE EXT REF REFIN REFOUT CONTROLLER CY7C68013 IOUT INPUT/ OUTPUT AD5420 SELECT ADC Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. D | Page 1 of 12 I TO V 08160-001 PIN HEADER (J8) UG-441 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Link Options ..................................................................................3 Evaluation Board Description......................................................... 1 Evaluation Board Software ...............................................................5 Device Description ........................................................................... 1 Software Installation .....................................................................5 Functional Block Diagram .............................................................. 1 Software Operation .......................................................................5 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ...................................7 Evaluation Board Hardware ............................................................ 3 Ordering Information .................................................................... 10 Power Supplies .............................................................................. 3 Bill of Materials ........................................................................... 10 REVISION HISTORY 10/13—Rev. C to Rev. D Added Text to Evaluation Board Schematics and Artwork Section ................................................................................................ 7 Changes to C3 Supplier Number; Table 5 ................................... 10 3/13—Rev. B to Rev. C Change to Control Register Section and Added Figure 4; Renumbered Sequentially................................................................ 6 11/12—Rev. A to Rev. B Change to Table 5 ........................................................................... 10 7/12—Rev. 0 to Rev. A Document Title Changed from EVAL-AD5420 to UG-441................................................................................. Universal Changes to Figure 3 .......................................................................... 5 Changes to Figure 4 .......................................................................... 7 Changes to Figure 5 .......................................................................... 8 Changes to Figure 6 to Figure 8 ...................................................... 9 Changes to Table 5 .......................................................................... 10 4/09—Revision 0: Initial Version Rev. D | Page 2 of 12 Evaluation Board User Guide UG-441 EVALUATION BOARD HARDWARE Default Link Option Setup POWER SUPPLIES The following external supplies must be provided: • • • 5 V between the 5 V and 0 V inputs for the digital supply of the AD5420 and digital circuitry. Alternatively, place LK6 in Position A to power the digital circuitry from the USB port (default). 10.8 V to 40 V between the AVDD and GND inputs for the analog supply of the AD5420. 10.8 V to 16.5 V between the V+ and AGND inputs for the analog supply of the AD7321 (on-board analog-to-digital converter [ADC]) and ADR435 (on-board voltage reference). If the analog supply connected to the AVDD input is less than 16.5 V, the AD7321 and ADR435 can be powered from this by placing LK9 in Position A, and the V+ input can be left unconnected. The analog and digital planes are connected at one location, close to the AD5420. It is recommended not to connect AGND and DGND elsewhere in the system to avoid ground loop problems. Each supply is decoupled to the relevant ground plane with 10 µF and 0.1 µF capacitors. Each device supply pin is again decoupled with a 10 µF and 0.1 µF capacitor pair to the relevant ground plane. Excessive Power Supply If a power supply in excess of 16.5 V is connected to the AVDD input, LK9 must be in Position B to prevent potential damage to the 5 V voltage reference and to the ADC (see U2 and U6, respectively, in Figure 6). LINK OPTIONS The position of LK7 configures the board for either PC control via the USB port (default setup) or for control by an external source via J8. Set the link options on the evaluation board for the required operating setup before using the board. The functions of the link options are described in Table 4. The default setup is for control by the PC via the USB port. The default link options are listed in Table 1. Table 1. Link and Switch Options for PC Control Link No. LK1 LK2 LK3 LK4 LK5 LK6 LK7 LK8 LK9 LK10 LK11 LK12 LK13 LK14 LK15 LK16 LK17 LK18 Option Not applicable A Inserted Not applicable B A A A A Inserted Not applicable Not applicable Inserted Not applicable C Not applicable Inserted Inserted Connector J8 Pin Descriptions Table 2. Connector J81 Pin Configuration 2 1 1 4 3 6 5 8 7 LK7 must be in Position B to enable the use of J8. Table 3. Connector J8 Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 Rev. D | Page 3 of 12 Description SDO Not applicable Digital ground Clear Digital ground Fault SDIN Digital ground SCLK Latch 10 9 UG-441 Evaluation Board User Guide Table 4. Link Options Link No. LK1 LK2 LK3 LK4 LK5 LK6 LK7 LK8 LK9 LK10 LK11 LK12 LK13 LK14 LK15 LK16 LK17 LK18 Description Not applicable. This link selects the state of the CLEAR pin (when the evaluation board is configured for external control). Position A ties the CLEAR pin to 0 V. Position B ties the CLEAR pin to DVCC. This link selects the state of the DVCC SELECT pin. When this link is inserted, the DVCC SELECT pin is tied to 0 V, disabling the internal supply; an external supply must be connected to the DVCC pin via LK17. When this link is removed, the DVCC SELECT pin is unconnected, enabling the internal supply. Removing the requirement for an external digital supply, LK17 can be removed. Not applicable. This link selects how the IOUT current loop return is connected to ground on the evaluation board. Position A connects the IOUT current loop return directly to ground. Position B connects the IOUT current loop return input to GND through a 51 Ω resistor. The high side of the resistor is connected to the VIN1 input of the on-board ADC, allowing readback to the PC of the output current. This link selects the 5 V power supply source for the digital circuitry. Position A selects the USB port as the 5 V digital circuitry power supply source. Position B selects J7 as the 5 V digital circuitry power supply source. This link selects whether the AD5420 evaluation board is controlled by the PC via the USB port or by an external source via J8. Position A selects the evaluation board to be controlled by the PC via the USB port. Position B selects the evaluation board to be controlled by an external source via J8. This link selects the digital supply voltage value for the AD5420 and the on-board ADC (U6). Position A selects 5 V as the supply value. Position B selects 3.3 V as the supply value. This link selects the positive power supply source for U2 and U6. Position A selects the AVDD input as the positive power supply source (use only if the power supply applied to AVDD is less than 16.5 V). Position B selects the V+ input as the positive power supply source (use if the power supply applied to AVDD input is greater than 16.5 V). A power supply voltage of 10.8 V to 16.5 V can be applied to V+. This link is used to enable/disable the external boost transistor. When this link is inserted, the external boost transistor is disabled. When this link is removed, the external boost transistor is enabled. Not applicable. Not applicable. This link connects the IOUT connector directly to the GND connector. When this link is inserted, the IOUT connector is connected directly to the GND connector. When this link is removed, the IOUT connector is disconnected from the GND connector (an external load must be connected). Not applicable. This link selects the voltage reference source. Position A selects the internal voltage reference of the AD5420 as the voltage reference source. Position B selects an external source that can be applied at Connector J3. Position C selects the on-board ADR435 as the voltage reference source. Not applicable. This link connects the DVCC pin of the AD5420 to the on-board digital power supply. When this link is inserted, the DVCC pin of the AD5420 is connected to the on-board digital power supply (LK3 must be inserted to disable the AD5420 internal digital power supply). When this link is removed, the DVCC pin of the AD5420 is disconnected from the on-board digital power supply (LK3 should be removed to enable the AD5420 internal digital power supply). This link connects the AVDD pin of the AD5420 to the power supply applied at the AVDD input connector, J2 (LK18 must be inserted for operation of the AD5420). Rev. D | Page 4 of 12 Evaluation Board User Guide UG-441 EVALUATION BOARD SOFTWARE SOFTWARE OPERATION The AD5420 evaluation kit includes self-installing software on a CD. The software is compatible with Windows 2000/NT/XP. If the setup file does not run automatically, run the setup.exe file from the CD. To launch the software, complete the following steps: 1. From the Start menu, select Analog Devices – AD5420/ AD5420 Evaluation Software. The main window of the software then displays (see Figure 3). To install the evaluation software, do the following: 2. If the evaluation board is not connected to the USB port when the software is launched, a connectivity error is displayed (see Figure 2). Simply connect the evaluation board to the USB port of the PC and click Retry. 2. 3. 4. Install the evaluation software before connecting the evaluation board to the USB port of the PC to ensure that the evaluation board is correctly recognized when connected to the PC. After installation from the CD is complete, power up the AD5420 evaluation board as described in the Power Supplies section. Connect the board to the USB port of the PC using the supplied cable. When the evaluation board is detected, proceed through any dialog boxes that appear. This finishes the installation. Figure 2. Connectivity Error Alert 08160-003 1. 08160-002 SOFTWARE INSTALLATION Figure 3. Main Window Rev. D | Page 5 of 12 UG-441 Evaluation Board User Guide The main window is divided into eight sections: Input Register, Status Register, Control Register, Reset Register, Clear Pin, Read/Write Registers, Measure Output Current, and Program Current. Reset Register Input Register CLEAR Pin The Input Register section displays the contents of the input register. The 24-bit display is updated each time a read or a write operation is requested via the main window controls. It allows users to associate the value written to the AD5420 with the various programmable functions. In the Clear Pin section, you can change the state of the CLEAR pin by clicking the CLEAR button. Status Register The Status Register section displays the states of the three bits of the read-only status register. To read the register, click the Read Status Register button. Control Register The Control Register section facilitates programming of the control register on an individual bit basis. To change the value of a bit, click the relevant button. Each button also displays the current state of the bit. You can also enter code in the SR CLOCK and SR STEP text boxes and select an output range from the OUTPUT RANGE drop-down box. When using an external current setting resistor, it is recommended to only set REXT when also setting the OUTEN bit. Alternately, REXT can be set before the OUTEN bit is set, but the range must be changed on the write in which the output is enabled. The Read/Write Registers section should be used for these commands (see Figure 4). The sole function of the Reset Register section is to allow the AD5420 to be reset to its power-on state. To change the value of the reset bit, click the RESET button. Read/Write Registers In the Read/Write Registers section, you can read and write to all registers in the AD5420. To select a register and request a read or write, click the Select Control Function box. Then, to write data to the register, click the Data Write button until the desired data is displayed in the Data Write text box and then click OK. Register data is updated and displayed for you to read in the Data Read text box each time you click OK. Measure Output Current To display the programmed output current in the Measure Output Current section, click the Measure output Current button. The output current is measured using the on-board ADC and is displayed in milliamperes (mA) in the IOUT box. The output current is measured with an accuracy of approximately 1% and is not intended as precise, but rather as an approximate, feedback of the programmed current. Program Current To program a current output value, enter the value in milliamperes (mA) in the Enter Value text box of the Program Current section, and press Enter. The output must first be enabled, and the output range must be selected via the Control Register section. POWER-ON SOFTWARE RESET CONTROL REGISTER WRITE (ONE WRITE COMMAND) • SELECT RSET EXTERNAL/INTERNAL • SET THE REQUIRED RANGE • CONFIGURE THE SLEW RATE CONTROL (IF REQUIRED) • CONFIGURE DAISY CHAIN MODE (IF REQUIRED) • ENABLE THE OUTPUT CONTROL REGISTER WRITE • DISABLE OUTPUT DATA REGISTER WRITE RSET CONFIGURATION CHANGE RANGE CHANGE Figure 4. Programming Sequence to Write/Enable the Output Correctly Rev. D | Page 6 of 12 08160-300 • WRITE REQUIRED CODE TO DATA REGISTER DGND DVCC PGND SHIELD J7-2 C55 PA2 PA3 PA5 PA6 PA7 FD8 FD7 LK1 LK2 PGND DVCC DVCC DGND DVCC 10µF + C56 USB_POWER J1 USB-MINI-B 1 VBUS 2 D– 3 D+ 4 IO 5 GND 0.1µF B A 0V B A VDD S1A S2A S3A S4A DGND 2 5 11 14 16 U8 LK6 D1 R23 1kΩ 5V PGND RED 1 15 4 7 9 12 ADG774 DGND 8 D1 D2 D3 D4 IN EN GND + 10µF DVCC 20% C19 U7 2 5 11 14 16 0.1µF VDD PGND ADP3303-3.3 8 OUT1 7 IN1 OUT2 5 IN2 SD ERROR NR GND C18 U3 4 PGND B A 3 S1B 6 S2B 10 S3B 13 S4B PGND DGND EXT_5V S1A S2A S3A S4A C28 0.1µF R16 100kΩ 15 ADG774 DGND 8 4 7 9 12 R17 100kΩ PGND R20 10kΩ C57 3.3V PGND SDIN SCLK LATCH FAULT SDO CLEAR_SELECT CLEAR PGND R22 10kΩ 13 14 1 2 33 34 35 36 37 38 39 40 9 8 54 42 44 C31 2.2µF IFCLK RSVD RDY0/*SLRD RDY1/*SLWR PA0/INT0 PA1/INT1 PA2/*SLOE PA3/*WU2 PA4/FIFOADR0 PA5/FIFOADR1 PA6/*PKTEND PA7/*FLD/SLCS U4 D– D+ CY7C68013-CSP CLKOUT RESET *WAKEUP 3.3V R18 0Ω PGND PGND 0.1µF C30 PGND 0.1µF R21 10kΩ PA5 PA6 PA7 PA2 PA3 CS_ADC PGND C29 0.1µF 3.3V 0.1µF PGND R19 10kΩ D1 D2 D3 D4 IN EN GND 1 C20 PGND 3.3V 1 2 6 3 3 S1B 6 S2B 10 S3B 13 S4B +5V B A Figure 5. Schematic of the Controller Circuitry LK7 AGND PGND 6 FAULT SDO CLEAR_SELECT DGND CLEAR DGND SDIN DGND SCLK LATCH J8-6 J8-1 J8-2 J8-3 J8-4 J8-5 J8-7 J8-8 J8-9 J8-10 3 AVCC LK8 A 3.3V B 7 11 17 27 32 43 55 PB0/FD0 PB1/FD1 PB2/FD2 PB3/FD3 PB4/FD4 PB5/FD5 PB6/FD6 PB7/FD7 PD0/FD8 PD1/FD9 PD2/FD10 PD3/FD11 PD4/FD12 PD5/FD13 PD6/FD14 PD7/FD15 DGND PGND XTALIN XTALOUT SDA SCL C32 22pF 5 4 16 15 29 30 31 18 19 20 21 22 23 24 25 45 46 47 48 49 50 51 52 DVCC CTL0/*FLAGA CTL1/*FLAGB CTL2/*FLAGC VCC VCC VCC VCC VCC VCC VCC GND GND GND GND GND GND GND Rev. D | Page 7 of 12 10 12 26 28 41 53 56 J7-1 24 MHz PGND Y2 SDIN_ADC SCLK_ADC DOUT_ADC FD7 FD8 C33 22pF R24 2.2kΩ PGND 3.3V C23 R25 2.2kΩ 0.1µF 3.3V PGND C22 0.1µF C21 0.1µF 3.3V C24 3.3V C25 C26 C34 0.1µF C27 U5 1 2 3 4 0.1µF 24LC64 8 A0 7 VCC A1 6 WP A2 5 SCL SDA VSS 0.1µF 0.1µF PGND 0.1µF PGND 3.3V PGND Evaluation Board User Guide UG-441 EVALUATION BOARD SCHEMATICS AND ARTWORK Because the AD5422 and AD5420 share the same schematic, U1 is shown as AD5422. Reference the AD5420 data sheet for the equivalent pins. 08160-004 V+ AVDD B CS_ADC SDIN_ADC SCLK_ADC DOUT_ADC LATCH SCLK SDIN SDO CLEAR_SELECT CLEAR R6 R5 R10 R4 R8 R9 R7 0Ω 0Ω 0Ω 0Ω 0Ω 0Ω 0Ω 1 2 14 12 11 20% 10µF DVCC 0.1µF CS DIN SCLK DOUT VDRIVE U6 C35 C36 DGND C12 + FAULT 1kΩ DVCC DGND LK16 B C45 DGND 10kΩ R14 10kΩ R3 C43 VIN0 A C46 C44 VIN1 AD7321 0.1µF 10µF 10µF 0.1µF 8 7 5 2 15 B 24 VIN0 4 12 U1 6 11 C49 C48 U9 R13 39kΩ R1 15kΩ R27 20% 0.1µF 10µF C8 + C9 LK18 SOCKETED 4nF C1 AVSS 13 19 20 23 21 22 18 17 R12 5.6kΩ 0.1µF 10µF 10µF C11 3 + AD820 2 – 4 V– 7 V+ C10 0.1µF 1 AVSS RSET IOUT BOOST –VSENSE VOUT +VSENSE CCOMP2 CCOMP1 AD5422_TSSOP GND GND GND LATCH SCLK SDIN SDO CLEAR_SELECT CLEAR FAULT DVCC_SELECT 10µF C47 20% 0.1µF AVSS V– 14 J3 REFIN 6 C DVCC REFOUT REFIN AVDD + C50 7 8 9 10 5 6 3 16 DGND 2 4 VOUT U2 ADR435 TRIM GND +VIN + C16 C15 20% 1µF 0.1µF LK3 LK17 + C42 C41 20% 10µF 0.1µF DVCC TP1 TP2 TP3 TP4 TP5 TP6 TP7 D2 RED R26 THE FOLLOWING COMPONENTS ARE NOT TO BE POPULATED : C12, C14, C17, C52, C53, R27 TP8 TP9 TP10 TP11 C17 LK15 A A LK9 680nF C51 C3 22nF LK10 V– LK14 1kΩ R2 AVDD V+ Q1 LK11 R11 51Ω V– 0.1µF C40 0.1µF C39 LK12 VIN0 + C38 20% 10µF + C37 20% 10µF V+ R15 4.7kΩ J6-2 J6-1 LK5 LK13 AVSS AVDD J13-1 J12-1 J11-1 J10-1 J9-1 LK4 C6,C7,C10,C11 MUST BE RATED OVER 30V C4,C5,C8,C9 MUST BE RATED OVER 60V 13 3 9 20% B C6 J5-2 J5-1 J4-3 J4-2 X1 AVSS AGND AVDD J2-1 J2-2 J2-3 CLAMP-SOIC-TSSOP GND IOUT –VSENSE VOUT J4-1 10µF 0.1µF C7 C4 + C5 20% 10µF 0.1µF +VSENSE A 0.1µF C13 20% C14 VCC 10 DGND DGND 5 REFIN/OUT 4 AGND VDD VSS 6 + 20% B A Rev. D | Page 8 of 12 + Figure 6. Schematic of the AD5420 Circuitry + UG-441 Evaluation Board User Guide 08160-005 SOCKETED UG-441 08160-006 Evaluation Board User Guide 08160-007 Figure 7. Component Placement 08160-008 Figure 8. Solder Side PCB Figure 9. Component Side PCB Rev. D | Page 9 of 12 UG-441 Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 5. Qty 1 1 1 1 Reference Designator U1 U2 U3 U4 Description 16-bit current source DAC 5 V voltage reference 3.3 V low dropout voltage regulator USB microcontroller 1 1 1 1 1 1 1 5 7 1 1 7 1 22 U5 U6 U7, U8 U9 C51 LK15 J8 LK3, LK10, LK13, LK17, LK18 LK1, LK2, LK5, LK6, LK7, LK8, LK9 J3 C3 C19, C36, C37, C42, C45, C49, C56 R1 C13, C15,C18, C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30, C34, C35, C39, C41, C43, C48, C55, C57 C4, C8 J2, J5, J6, J7 C16 D1, D2 C32, C33 TP1 to TP11 R2, R23, R26 R3, R14, R19, R20, R21, R22 R16, R17 R24, R25 R13 R11 R12 R4 to R10, R18 C31 Y2 C5, C9 J1 Q1 64 K EEPROM 12-bit ADC Quad 2:1 multiplexers Low power, precision operational amplifier 680 nF, 16 V, Y5V, ceramic capacitor 6-pin (3 × 2) 0.1" header and shorting bar 2-row, 36 + 36 header 2-pin (0.1" pitch) header and shorting shunt 3-pin (0.1" pitch) header and shorting shunt 50 Ω SMB jack 22 nF, 16 V, X7R ceramic capacitor 10 µF, 10 V SMD tantalum capacitors 15 kΩ SMD precision resistor 0.1 μF, 16 V, X7R ceramic capacitors Supplier/Number Analog Devices/AD5420AREZ Analog Devices/ADR435ARZ Analog Devices/ADP3303ARZ-3.3 Cypress Semiconductor Corporation/CY7C68013-56LFC Digi-Key/24LC64-I/SN-ND Analog Devices/AD7321BRUZ Analog Devices/ADG774BRQZ AD820ARZ Digi-Key/490-1581-1-ND FEC 1022231 and FEC 150411 FEC 1022244 (36 + 36 pin strip) FEC 1022247 and FEC 150-411 FEC 1022249 and FEC 150-411 FEC 1111349 FEC 1658869 FEC 1135234 FEC 1140932 FEC 1216538 0.1 μF, 100 V ceramic capacitors 2-pin terminal blocks (5 mm pitch) 1 μF, 10 V SMD tantalum capacitor Red SMD LEDs 22 pF, 50 V, NPO ceramic capacitors Black test points 1 kΩ SMD resistors 10 kΩ SMD resistors 100 kΩ SMD resistors 2.2 kΩ SMD resistors 39 kΩ SMD resistor 51 Ω SMD resistor 5.6 kΩ SMD resistor 0 Ω SMD resistor 2.2 µF, 10 V, Y5V ceramic capacitors 24 MHz plastic SMD crystal 10 µF, 63 V (FK series) electrolytic capacitors USB Mini-B connector (USB-OTG) NPN transistor, PBSS8110Z FEC 1288275 FEC 151789 FEC 197099 FEC 5790840 FEC 722005 FEC 8731128 FEC 9330380 FEC 9330399 FEC 9330402 FEC 9330810 FEC 9331158 FEC 9331336 FEC 9331352 FEC 9331662 FEC 9402098 FEC 9509658 FEC 9696008 FEC 9786490 FEC 8736677 2 4 1 2 2 11 3 6 2 2 1 1 1 8 1 1 2 1 1 Rev. D | Page 10 of 12 Evaluation Board User Guide UG-441 NOTES Rev. D | Page 11 of 12 UG-441 Evaluation Board User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2009–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG08160-0-10/13(D) Rev. D | Page 12 of 12