Technical Data Sheet

FEATURES
PIN CONFIGURATIONS
Low noise (0.1 Hz to 10.0 Hz): 3.5 µV p-p @ 2.5 V output
No external capacitor required
Low temperature coefficient
A Grade: 10 ppm/°C maximum
B Grade: 3 ppm/°C maximum
Load regulation: 15 ppm/mA
Line regulation: 20 ppm/V
Wide operating range
ADR430: 4.1 V to 18 V
ADR431: 4.5 V to 18 V
ADR433: 5.0 V to 18 V
ADR434: 6.1 V to 18 V
ADR435: 7.0 V to 18 V
High output source and sink current: +30 mA and −20 mA
Wide temperature range: −40°C to +125°C
TP 1
8
ADR43x
TP
COMP
TOP VIEW
6 VOUT
(Not to Scale)
5 TRIM
GND 4
VIN 2
7
NOTES
1. NIC = NO INTERNAL CONNECTION
2. TP = TEST PIN (DO NOT CONNECT)
04500-001
NIC 3
Figure 1. 8-Lead MSOP (RM-8)
TP 1
8
ADR43x
TP
COMP
TOP VIEW
6 VOUT
(Not to Scale)
5 TRIM
GND 4
VIN 2
7
NIC 3
NOTES
1. NIC = NO INTERNAL CONNECTION
2. TP = TEST PIN (DO NOT CONNECT)
APPLICATIONS
04500-041
Data Sheet
Ultralow Noise XFET Voltage References
with Current Sink and Source Capability
ADR430/ADR431/ADR433/ADR434/ADR435
Figure 2. 8-Lead SOIC_N (R-8)
Precision data acquisition systems
High resolution data converters
Medical instruments
Industrial process control systems
Optical control circuits
Precision instruments
GENERAL DESCRIPTION
The ADR43x series is a family of XFET® voltage references
featuring low noise, high accuracy, and low temperature drift
performance. Using Analog Devices, Inc., patented temperature
drift curvature correction and XFET (eXtra implanted junction
FET) technology, voltage change vs. temperature nonlinearity in
the ADR43x is minimized.
The XFET references operate at lower current (800 µA) and
lower supply voltage headroom (2 V) than buried Zener
references. Buried Zener references require more than 5 V
headroom for operation. The ADR43x XFET references are
the only low noise solutions for 5 V systems.
The ADR43x family has the capability to source up to 30 mA of
output current and sink up to 20 mA. It also comes with a trim
terminal to adjust the output voltage over a 0.5% range without
compromising performance.
Table 1. Selection Guide
Model
ADR430A
ADR430B
ADR431A
ADR431B
ADR433A
ADR433B
ADR434A
ADR434B
ADR435A
ADR435B
Output
Voltage (V)
2.048
2.048
2.500
2.500
3.000
3.000
4.096
4.096
5.000
5.000
Accuracy (mV)
±3
±1
±3
±1
±4
±1.5
±5
±1.5
±6
±2
Temperature
Coefficient
(ppm/°C)
10
3
10
3
10
3
10
3
10
3
The ADR43x is available in 8-lead MSOP and 8-lead narrow
SOIC packages. All versions are specified over the extended
industrial temperature range of −40°C to +125°C.
Rev. M
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ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Noise Performance ..................................................................... 15
Applications ....................................................................................... 1
High Frequency Noise ............................................................... 15
Pin Configurations ........................................................................... 1
Turn-On Time ............................................................................ 16
General Description ......................................................................... 1
Applications Information .............................................................. 17
Revision History ............................................................................... 3
Output Adjustment .................................................................... 17
Specifications..................................................................................... 4
ADR430 Electrical Characteristics............................................. 4
Reference for Converters in Optical Network Control
Circuits......................................................................................... 17
ADR431 Electrical Characteristics............................................. 5
High Voltage Floating Current Source .................................... 17
ADR433 Electrical Characteristics............................................. 6
Kelvin Connection ..................................................................... 17
ADR434 Electrical Characteristics............................................. 7
Dual Polarity References ........................................................... 18
ADR435 Electrical Characteristics............................................. 8
Programmable Current Source ................................................ 18
Absolute Maximum Ratings ............................................................ 9
Programmable DAC Reference Voltage .................................. 19
Thermal Resistance ...................................................................... 9
Precision Voltage Reference for Data Converters .................. 19
ESD Caution .................................................................................. 9
Precision Boosted Output Regulator ....................................... 20
Typical Performance Characteristics ........................................... 10
Outline Dimensions ....................................................................... 21
Theory of Operation ...................................................................... 15
Ordering Guide .......................................................................... 22
Basic Voltage Reference Connections ...................................... 15
Rev. M | Page 2 of 22
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
REVISION HISTORY
6/15—Rev. L to Rev. M
Changes to Ordering Guide ...........................................................22
7/14—Rev. K to Rev. L
Changes to Default Conditions, Typical Performance
Characteristics Section ...................................................................10
Changes to Ordering Guide ...........................................................22
5/14—Rev. J to Rev. K
Deleted ADR439 (Throughout) ...................................................... 1
Changes to Features Section and Table 1 ....................................... 1
Deleted Table 7; Renumbered Sequentially ................................... 9
Changes to Ordering Guide ...........................................................22
7/11—Rev. I to Rev. J
Changes to Figure 1 and Figure 2.................................................... 1
Changes to Ordering Guide ...........................................................23
5/11—Rev. H to Rev. I
Added Endnote 1 in Table 2............................................................. 4
Added Endnote 1 in Table 3............................................................. 5
Added Endnote 1 in Table 4............................................................. 6
Added Endnote 1 in Table 5............................................................. 7
Added Endnote 1 in Table 6............................................................. 8
Added Endnote 1 in Table 7............................................................. 9
Deleted Negative Precision Reference Without Precision
Resistors Section ..............................................................................17
Deleted Figure 36; Renumbered Sequentially .............................18
2/11—Rev. G to Rev. H
Updated Outline Dimensions ........................................................21
Changes to Ordering Guide ...........................................................22
7/10—Rev. F to Rev. G
Changes to Storage Temperature Range in Table 9....................... 9
6/10—Rev. E to Rev. F
Updated Pin Name NC to COMP Throughout ............................ 1
Changes to Figure 1 and Figure 2.................................................... 1
Changes to Figure 30 and High Frequency Noise Section ........15
Updated Outline Dimensions ........................................................21
Changes to Ordering Guide ...........................................................22
1/09—Rev. D to Rev. E
Added High Frequency Noise Section and Equation 3;
Renumbered Sequentially .............................................................. 15
Inserted Figure 31, Figure 32, and Figure 33; Renumbered
Sequentially ...................................................................................... 16
Changes to the Ordering Guide .................................................... 22
12/07—Rev. C to Rev. D
Changes to Initial Accuracy and Ripple Rejection Ratio
Parameters in Table 2 through Table 7 ........................................... 3
Changes to Table 9 ............................................................................ 9
Changes to Theory of Operation Section .................................... 15
Updated Outline Dimensions........................................................ 20
8/06—Rev. B to Rev. C
Updated Format ................................................................. Universal
Changes to Table 1 ............................................................................ 1
Changes to Table 3 ............................................................................ 4
Changes to Table 4 ............................................................................ 5
Changes to Table 7 ............................................................................ 8
Changes to Figure 26 ...................................................................... 14
Changes to Figure 31 ...................................................................... 16
Updated Outline Dimensions........................................................ 20
Changes to Ordering Guide ........................................................... 21
9/04—Rev. A to Rev. B
Added New Grade.............................................................. Universal
Changes to Specifications................................................................. 3
Replaced Figure 3, Figure 4, Figure 5 ........................................... 10
Updated Ordering Guide ............................................................... 21
6/04—Rev. 0 to Rev. A
Changes to Format ............................................................. Universal
Changes to the Ordering Guide .................................................... 20
12/03—Revision 0: Initial Version
Rev. M | Page 3 of 22
ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
SPECIFICATIONS
ADR430 ELECTRICAL CHARACTERISTICS
VIN = 4.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
OUTPUT VOLTAGE
A Grade
B Grade
INITIAL ACCURACY1
A Grade
Symbol
VO
Conditions
Min
Typ
Max
Unit
2.045
2.047
2.048
2.048
2.051
2.049
V
V
±3
±0.15
±1
±0.05
mV
%
mV
%
10
3
20
15
15
800
ppm/°C
ppm/°C
ppm/V
ppm/mA
ppm/mA
µA
µV p-p
nV/√Hz
µs
ppm
ppm
dB
mA
18
V
V
VOERR
B Grade
TEMPERATURE COEFFICIENT
A Grade
B Grade
LINE REGULATION
LOAD REGULATION
QUIESCENT CURRENT
VOLTAGE NOISE
VOLTAGE NOISE DENSITY
TURN-ON SETTLING TIME
LONG-TERM STABILITY2
OUTPUT VOLTAGE HYSTERESIS
RIPPLE REJECTION RATIO
SHORT CIRCUIT TO GND
SUPPLY VOLTAGE
OPERATING RANGE
SUPPLY VOLTAGE HEADROOM
1
2
TCVO
∆VO/∆VIN
∆VO/∆IL
∆VO/∆IL
IIN
eN p-p
eN
tR
∆VO
VO_HYS
RRR
ISC
−40°C < TA < +125°C
−40°C < TA < +125°C
VIN = 4.1 V to 18 V, −40°C < TA < +125°C
IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C
IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C
No load, −40°C < TA < +125°C
0.1 Hz to 10.0 Hz
1 kHz
CL = 0 µF
1000 hours
2
1
5
560
3.5
60
10
40
20
–70
40
fIN = 1 kHz
VIN
VIN − VO
4.1
2
Initial accuracy does not include shift due to solder heat effect.
The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Rev. M | Page 4 of 22
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
ADR431 ELECTRICAL CHARACTERISTICS
VIN = 4.5 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
OUTPUT VOLTAGE
A Grade
B Grade
INITIAL ACCURACY1
A Grade
Symbol
VO
Conditions
Min
Typ
Max
Unit
2.497
2.499
2.500
2.500
2.503
2.501
V
V
±3
±0.12
±1
±0.04
mV
%
mV
%
10
3
20
15
15
800
ppm/°C
ppm/°C
ppm/V
ppm/mA
ppm/mA
µA
µV p-p
nV/√Hz
µs
ppm
ppm
dB
mA
18
V
V
VOERR
B Grade
TEMPERATURE COEFFICIENT
A Grade
B Grade
LINE REGULATION
LOAD REGULATION
QUIESCENT CURRENT
VOLTAGE NOISE
VOLTAGE NOISE DENSITY
TURN-ON SETTLING TIME
LONG-TERM STABILITY2
OUTPUT VOLTAGE HYSTERESIS
RIPPLE REJECTION RATIO
SHORT CIRCUIT TO GND
SUPPLY VOLTAGE
OPERATING RANGE
SUPPLY VOLTAGE HEADROOM
1
2
TCVO
∆VO/∆VIN
∆VO/∆IL
∆VO/∆IL
IIN
eN p-p
eN
tR
∆VO
VO_HYS
RRR
ISC
−40°C < TA < +125°C
−40°C < TA < +125°C
VIN = 4.5 V to 18 V, −40°C < TA < +125°C
IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C
IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C
No load, −40°C < TA < +125°C
0.1 Hz to 10.0 Hz
1 kHz
CL = 0 µF
1000 hours
2
1
5
580
3.5
80
10
40
20
−70
40
fIN = 1 kHz
VIN
VIN − VO
4.5
2
Initial accuracy does not include shift due to solder heat effect.
The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Rev. M | Page 5 of 22
ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
ADR433 ELECTRICAL CHARACTERISTICS
VIN = 5.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 4.
Parameter
OUTPUT VOLTAGE
A Grade
B Grade
INITIAL ACCURACY1
A Grade
Symbol
VO
Conditions
Min
Typ
Max
Unit
2.996
2.9985
3.000
3.000
3.004
3.0015
V
V
±4
±0.13
±1.5
±0.05
mV
%
mV
%
10
3
20
15
15
800
ppm/°C
ppm/°C
ppm/V
ppm/mA
ppm/mA
µA
µV p-p
nV/√Hz
µs
ppm
ppm
dB
mA
18
V
V
VOERR
B Grade
TEMPERATURE COEFFICIENT
A Grade
B Grade
LINE REGULATION
LOAD REGULATION
QUIESCENT CURRENT
VOLTAGE NOISE
VOLTAGE NOISE DENSITY
TURN-ON SETTLING TIME
LONG-TERM STABILITY2
OUTPUT VOLTAGE HYSTERESIS
RIPPLE REJECTION RATIO
SHORT CIRCUIT TO GND
SUPPLY VOLTAGE
OPERATING RANGE
SUPPLY VOLTAGE HEADROOM
1
2
TCVO
∆VO/∆VIN
∆VO/∆IL
∆VO/∆IL
IIN
eN p-p
eN
tR
∆VO
VO_HYS
RRR
ISC
−40°C < TA < +125°C
−40°C < TA < +125°C
VIN = 5 V to 18 V, −40°C < TA < +125°C
IL = 0 mA to 10 mA, VIN = 6 V, −40°C < TA < +125°C
IL = −10 mA to 0 mA, VIN = 6 V, −40°C < TA < +125°C
No load, −40°C < TA < +125°C
0.1 Hz to 10.0 Hz
1 kHz
CL = 0 µF
1000 hours
2
1
5
590
3.75
90
10
40
20
−70
40
fIN = 1 kHz
VIN
VIN − VO
5.0
2
Initial accuracy does not include shift due to solder heat effect.
The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Rev. M | Page 6 of 22
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
ADR434 ELECTRICAL CHARACTERISTICS
VIN = 6.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 5.
Parameter
OUTPUT VOLTAGE
A Grade
B Grade
INITIAL ACCURACY1
A Grade
Symbol
VO
Conditions
Min
Typ
Max
Unit
4.091
4.0945
4.096
4.096
4.101
4.0975
V
V
±5
±0.12
±1.5
±0.04
mV
%
mV
%
10
3
20
15
15
800
ppm/°C
ppm/°C
ppm/V
ppm/mA
ppm/mA
µA
µV p-p
nV/√Hz
µs
ppm
ppm
dB
mA
18
V
V
VOERR
B Grade
TEMPERATURE COEFFICIENT
A Grade
B Grade
LINE REGULATION
LOAD REGULATION
QUIESCENT CURRENT
VOLTAGE NOISE
VOLTAGE NOISE DENSITY
TURN-ON SETTLING TIME
LONG-TERM STABILITY2
OUTPUT VOLTAGE HYSTERESIS
RIPPLE REJECTION RATIO
SHORT CIRCUIT TO GND
SUPPLY VOLTAGE
OPERATING RANGE
SUPPLY VOLTAGE HEADROOM
1
2
TCVO
∆VO/∆VIN
∆VO/∆IL
∆VO/∆IL
IIN
eN p-p
eN
tR
∆VO
VO_HYS
RRR
ISC
−40°C < TA < +125°C
−40°C < TA < +125°C
VIN = 6.1 V to 18 V, −40°C < TA < +125°C
IL = 0 mA to 10 mA, VIN = 7 V, −40°C < TA < +125°C
IL = −10 mA to 0 mA, VIN = 7 V, −40°C < TA < +125°C
No load, −40°C < TA < +125°C
0.1 Hz to 10.0 Hz
1 kHz
CL = 0 µF
1000 hours
2
1
5
595
6.25
100
10
40
20
−70
40
fIN = 1 kHz
VIN
VIN − VO
6.1
2
Initial accuracy does not include shift due to solder heat effect.
The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Rev. M | Page 7 of 22
ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
ADR435 ELECTRICAL CHARACTERISTICS
VIN = 7.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 6.
Parameter
OUTPUT VOLTAGE
A Grade
B Grade
INITIAL ACCURACY1
A Grade
Symbol
VO
Conditions
Min
Typ
Max
Unit
4.994
4.998
5.000
5.000
5.006
5.002
V
V
±6
±0.12
±2
±0.04
mV
%
mV
%
10
3
20
15
15
800
ppm/°C
ppm/°C
ppm/V
ppm/mA
ppm/mA
µA
µV p-p
nV/√Hz
µs
ppm
ppm
dB
mA
V
V
VOERR
B Grade
TEMPERATURE COEFFICIENT
A Grade
B Grade
LINE REGULATION
LOAD REGULATION
QUIESCENT CURRENT
VOLTAGE NOISE
VOLTAGE NOISE DENSITY
TURN-ON SETTLING TIME
LONG-TERM STABILITY2
OUTPUT VOLTAGE HYSTERESIS
RIPPLE REJECTION RATIO
SHORT CIRCUIT TO GND
SUPPLY VOLTAGE OPERATING RANGE
SUPPLY VOLTAGE HEADROOM
1
2
TCVO
∆VO/∆VIN
∆VO/∆IL
∆VO/∆IL
IIN
eN p-p
eN
tR
∆VO
VO_HYS
RRR
ISC
VIN
VIN − VO
−40°C < TA < +125°C
−40°C < TA < +125°C
VIN = 7 V to 18 V, −40°C < TA < +125°C
IL = 0 mA to 10 mA, VIN = 8 V, −40°C < TA < +125°C
IL = −10 mA to 0 mA, VIN = 8 V, −40°C < TA < +125°C
No load, −40°C < TA < +125°C
0.1 Hz to 10 Hz
1 kHz
CL = 0 µF
1000 hours
2
1
5
620
8
115
10
40
20
−70
40
fIN = 1 kHz
7.0
2
18
Initial accuracy does not include shift due to solder heat effect.
The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Rev. M | Page 8 of 22
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
THERMAL RESISTANCE
Table 7.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Parameter
Supply Voltage
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature, Soldering (60 sec)
Rating
20 V
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Table 8. Thermal Resistance
Package Type
8-Lead SOIC_N (R)
8-Lead MSOP (RM)
ESD CAUTION
Rev. M | Page 9 of 22
θJA
130
142
θJC
43
44
Unit
°C/W
°C/W
ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
Default conditions: VIN = 7 V, TA = 25°C, CIN = COUT = 0.1 μF, unless otherwise noted.
0.8
2.5009
SUPPLY CURRENT (mA)
OUTPUT VOLTAGE (V)
2.5007
2.5005
2.5003
2.5001
2.4999
0.7
+125°C
0.6
+25°C
–40°C
0.5
0.4
2.4997
50
65
80
95
110
125
TEMPERATURE (°C)
4
8
14
12
10
16
125
18
INPUT VOLTAGE (V)
Figure 3. ADR431 Output Voltage vs. Temperature
Figure 6. ADR435 Supply Current vs. Input Voltage
4.0980
700
4.0975
650
SUPPLY CURRENT (µA)
OUTPUT VOLTAGE (V)
6
04500-018
35
20
5
04500-019
–10
04500-020
0.3
–25
04500-015
2.4995
–40
4.0970
4.0965
4.0960
4.0955
600
550
500
450
–25
–10
5
20
35
50
65
80
95
110
TEMPERATURE (°C)
125
400
–40
04500-016
4.0950
–40
–25
–10
5
20
35
50
65
80
95
110
TEMPERATURE (°C)
Figure 4. ADR434 Output Voltage vs. Temperature
Figure 7. ADR435 Supply Current vs. Temperature
0.60
5.0025
+125°C
0.58
5.0020
SUPPLY CURRENT (mA)
5.0015
5.0010
5.0005
5.0000
0.54
0.52
+25°C
0.50
0.48
0.46
–40°C
0.44
4.9995
0.42
4.9990
–40
0.40
–25
–10
5
20
35
50
65
80
95
110
TEMPERATURE (°C)
125
04500-017
OUTPUT VOLTAGE (V)
0.56
Figure 5. ADR435 Output Voltage vs. Temperature
6
8
10
12
14
16
INPUT VOLTAGE (V)
Figure 8. ADR431 Supply Current vs. Input Voltage
Rev. M | Page 10 of 22
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
2.5
610
DIFFERENTIAL VOLTAGE (V)
SUPPLY CURRENT (µA)
580
550
520
490
460
2.0
–40°C
1.5
+25°C
1.0
+125°C
0.5
–10
5
20
35
50
65
80
95
110
125
TEMPERATURE (°C)
0
–10
–5
5
0
10
04500-024
–25
04500-021
400
–40
125
04500-025
430
LOAD CURRENT (mA)
Figure 9. ADR431 Supply Current vs. Temperature
Figure 12. ADR431 Minimum Input/Output
Differential Voltage vs. Load Current
15
1.9
IL = 0mA to 10mA
NO LOAD
12
MINIMUM HEADROOM (V)
LOAD REGULATION (ppm/mA)
1.8
9
6
1.7
1.6
1.5
1.4
1.3
1.2
3
1.1
–25
–10
5
20
35
50
65
80
95
110
125
TEMPERATURE (°C)
1.0
–40
04500-022
0
–40
–25
–10
5
20
35
50
65
80
95
110
TEMPERATURE (°C)
Figure 13. ADR431 Minimum Headroom vs. Temperature
Figure 10. ADR431 Load Regulation vs. Temperature
15
2.5
9
6
3
0
–40
–25
–10
5
20
35
50
65
80
95
110
TEMPERATURE (°C)
125
Figure 11. ADR435 Load Regulation vs. Temperature
2.0
–40°C
1.5
+25°C
1.0
+125°C
0.5
0
–10
–5
0
5
LOAD CURRENT (mA)
Figure 14. ADR435 Minimum Input/Output
Differential Voltage vs. Load Current
Rev. M | Page 11 of 22
10
04500-026
DIFFERENTIAL VOLTAGE (V)
12
04500-023
LOAD REGULATION (ppm/mA)
IL = 0mA to 10mA
ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
1.9
NO LOAD
MINIMUM HEADROOM (V)
1.7
CL = 0.01µF
NO INPUT CAPACITOR
VO = 1V/DIV
1.5
1.3
1.1
–25
–10
5
20
35
50
65
80
95
110
125
TEMPERATURE (°C)
TIME = 4µs/DIV
04500-027
0.9
–40
Figure 15. ADR435 Minimum Headroom vs. Temperature
04500-031
VIN = 2V/DIV
Figure 18. ADR431 Turn-On Response, 0.01 µF Load Capacitor
20
VIN = 7V TO 18V
VO = 1V/DIV
12
CIN = 0.01µF
NO LOAD
8
4
0
–10
5
20
35
50
65
80
95
110
125
TEMPERATURE (°C)
04500-032
–25
Figure 19. ADR431 Turn-Off Response
Figure 16. ADR435 Line Regulation vs. Temperature
CIN = 0.01µF
NO LOAD
BYPASS CAPACITOR = 0µF
LINE
INTERRUPTION
VO = 1V/DIV
VIN = 500mV/DIV
VO = 50mV/DIV
VIN = 2V/DIV
TIME = 4µs/DIV
TIME = 100µs/DIV
Figure 20. ADR431 Line Transient Response
Figure 17. ADR431 Turn-On Response
Rev. M | Page 12 of 22
04500-033
–4
–40
TIME = 4µs/DIV
04500-028
VIN = 2V/DIV
04500-030
LINE REGULATION (ppm/V)
16
Data Sheet
BYPASS CAPACITOR = 0.1µF
ADR430/ADR431/ADR433/ADR434/ADR435
LINE
INTERRUPTION
VIN = 500mV/DIV
VO = 50mV/DIV
TIME = 1s/DIV
Figure 21. ADR431 Line Transient Response, 0.1 μF Bypass Capacitor
04500-037
TIME = 100µs/DIV
04500-034
2µV/DIV
Figure 24. ADR435 0.1 Hz to 10.0 Hz Voltage Noise
1µV/DIV
50µV/DIV
Figure 22. ADR431 0.1 Hz to 10.0 Hz Voltage Noise
04500-038
TIME = 1s/DIV
04500-035
TIME = 1s/DIV
Figure 25. ADR435 10 Hz to 10 kHz Voltage Noise
14
NUMBER OF PARTS
12
10
8
6
4
50µV/DIV
0
–110 –90
04500-036
TIME = 1s/DIV
–70
–50
–30
–10
10
30
50
DEVIATION (PPM)
Figure 23. ADR431 10 Hz to 10 kHz Voltage Noise
Figure 26. ADR431 Typical Hysteresis
Rev. M | Page 13 of 22
70
90
110
04500-029
2
ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
50
10
45
–10
RIPPLE REJECTION (dB)
35
30
25
ADR435
20
15
ADR433
–30
–50
–70
–90
–110
10
ADR430
5
–150
1k
10k
FREQUENCY (Hz)
100k
10
100
1k
10k
FREQUENCY (Hz)
Figure 27. Output Impedance vs. Frequency
Figure 28. Ripple Rejection
Rev. M | Page 14 of 22
100k
1M
04500-040
0
100
–130
04500-039
OUTPUT IMPEDANCE (Ω)
40
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
THEORY OF OPERATION
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about −120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be compensated closely by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate band gap references. The primary
advantage of an XFET reference is its correction term, which is
~30 times lower and requires less correction than that of a band
gap reference. Because most of the noise of a band gap reference
comes from the temperature compensation circuitry, the XFET
results in much lower noise.
The ADR43x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.1 V
to 18 V. When these devices are used in applications at higher
currents, use the following equation to account for the
temperature effects due to the power dissipation increases:
TJ = PD × θJA + TA
where:
TJ and TA are the junction and ambient temperatures, respectively.
PD is the device power dissipation.
θJA is the device package thermal resistance.
BASIC VOLTAGE REFERENCE CONNECTIONS
Voltage references, in general, require a bypass capacitor
connected from VOUT to GND. The circuit in Figure 30
illustrates the basic configuration for the ADR43x family
of references. Other than a 0.1 µF capacitor at the output to
help improve noise suppression, a large output capacitor at
the output is not required for circuit stability.
TP 1
VIN
Figure 29 shows the basic topology of the ADR43x series. The
temperature correction term is provided by a current source
with a value designed to be proportional to absolute temperature.
The general equation is
VOUT = G (ΔVP – R1 × IPTAT)
ADR43x devices are created by on-chip adjustment of R2 and R3 to
achieve 2.048 V or 2.500 V, respectively, at the reference output.
VIN
I1
I1
ADR43x
IPTAT
VOUT
R2
*
R1
*EXTRA CHANNEL IMPLANT
VOUT = G(ΔVP – R1 × IPTAT)
Figure 29. Simplified Schematic Device
Power Dissipation Considerations
R3
GND
04500-002
ΔVP
10µF
0.1µF
NC
GND
8
TP
ADR43x
7 COMP
VOUT
TOP VIEW
3
6
(Not to Scale)
4
5 TRIM
2
+
0.1µF
NOTES:
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
(1)
where:
G is the gain of the reciprocal of the divider ratio.
∆VP is the difference in pinch-off voltage between the two JFETs.
IPTAT is the positive temperature coefficient correction current.
(2)
04500-044
The ADR43x series of references uses a reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFETs), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified and
used to form a highly stable voltage reference.
Figure 30. Basic Voltage Reference Configuration
NOISE PERFORMANCE
The noise generated by the ADR43x family of references is
typically less than 3.75 µV p-p over the 0.1 Hz to 10.0 Hz band
for ADR430, ADR431, and ADR433. Figure 22 shows the 0.1 Hz
to 10.0 Hz noise of the ADR431, which is only 3.5 µV p-p. The
noise measurement is made with a band-pass filter made of a
2-pole high-pass filter with a corner frequency at 0.1 Hz and a
2-pole low-pass filter with a corner frequency at 10.0 Hz.
HIGH FREQUENCY NOISE
The total noise generated by the ADR43x family of references is
composed of the reference noise and the op amp noise. Figure 31
shows the wideband noise from 10 Hz to 25 kHz. An internal node
of the op amp is brought out on Pin 7, and by overcompensating
the op amp, the overall noise can be reduced.
This is understood by considering that in a closed-loop
configuration, the effective output impedance of an op amp is
RO =
rO
1 + AVO β
where:
RO is the apparent output impedance.
rO is the output resistance of the op amp.
AVO is the open-loop gain at the frequency of interest.
β is the feedback factor.
Rev. M | Page 15 of 22
(3)
ADR430/ADR431/ADR433/ADR434/ADR435
1000
ADR431
NO COMPENSATION
CL = 1µF
CL = 50µF
1
8
ADR43x
2
+
10µF
0.1µF
NC
GND
7
TP
COMP 82kΩ
VOUT
TOP VIEW
6
(Not to Scale)
4
5 TRIM
10nF
3
0.1µF
NOTES
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
Figure 32. Compensated Reference
The 82 kΩ resistor and 10 nF capacitor can eliminate the noise
peaking (see Figure 33). The COMP pin should be left
unconnected if unused.
100
CL = 10µF
RC 82kΩ AND 10nF
CL = 1µF
RC 82kΩ AND 10nF
CL = 50µF
RC 82kΩ AND 10nF
10
10
CL = 0µF
100
1k
FREQUENCY (Hz)
10k
04500-043
100
Figure 33. Noise with Compensation Network
10
10
100
1k
10k
FREQUENCY (Hz)
Figure 31. Noise vs. Capacitive Loading
100k
04500-042
NOISE DENSITY (nV/√Hz)
CL = 10µF
TP
VIN
NOISE DENSITY (nV/√Hz)
However, references are used increasingly to drive the reference
input of an ADC that may present a dynamic, switching capacitive
load. Large capacitors, in the microfarad range, are used to reduce
the change in reference voltage to less than one-half LSB. Figure 31
shows the ADR431 noise spectrum with various capacitive values
to 50 µF. With no capacitive load, the noise spectrum is relatively
flat at approximately 60 nV/√Hz to 70 nV/√Hz. With various
values of capacitive loading, the predicted noise peaking
becomes evident.
The op amp within the ADR43x family uses the classic RC
compensation technique. Monolithic capacitors in an IC are
limited to tens of picofarads. With very large external capacitive
loads, such as 50 µF, it is necessary to overcompensate the op amp.
The internal compensation node is brought out on Pin 7, and
an external series RC network can be added between Pin 7 and
the output, Pin 6, as shown in Figure 32.
04500-003
Equation 3 shows that the apparent output impedance is reduced
by approximately the excess loop gain; therefore, as the frequency
increases, the excess loop gain decreases, and the apparent output
impedance increases. A passive element whose impedance
increases as its frequency increases is an inductor. When a
capacitor is added to the output of an op amp or a reference, it
forms a tuned circuit that resonates at a certain frequency and
results in gain peaking. This can be observed by using a model
of a semiperfect op amp with a single-pole response and some
pure resistance in series with the output. Changing capacitive
loads results in peaking at different frequencies. For most normal
op amp applications with low capacitive loading (<100 pF), this
effect is usually not observed.
Data Sheet
TURN-ON TIME
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error band
is defined as the turn-on settling time. Two components normally
associated with this are the time for the active circuits to settle
and the time for the thermal gradients on the chip to stabilize.
Figure 17 and Figure 18 show the turn-on settling time for the
ADR431.
Rev. M | Page 16 of 22
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
APPLICATIONS INFORMATION
OUTPUT ADJUSTMENT
SOURCE FIBER
GIMBAL + SENSOR
DESTINATION
FIBER
LASER BEAM
ACTIVATOR
LEFT
AMPL
PREAMP
ADR431
ADR431
DAC
OUTPUT
VO = ±0.5%
VOUT
ADC
DAC
ADR431
DSP
GND
Figure 35. All Optical Router Network
TRIM
GND
R2
RP
10kΩ
HIGH VOLTAGE FLOATING CURRENT SOURCE
10kΩ (ADR430)
15kΩ (ADR431)
The circuit in Figure 36 can be used to generate a floating
current source with minimal self heating. This particular
configuration can operate on high supply voltages determined
by the breakdown voltage of the N-channel JFET.
Figure 34. Output Trim Adjustment
REFERENCE FOR CONVERTERS IN OPTICAL
NETWORK CONTROL CIRCUITS
+VS
SST111
VISHAY
In Figure 35, the high capacity, all optical router network
employs arrays of micromirrors to direct and route optical
signals from fiber to fiber without first converting them to
electrical form, which reduces the communication speed. The
tiny micromechanical mirrors are positioned so that each is
illuminated by a single wavelength that carries unique information
and can be passed to any desired input and output fiber. The
mirrors are tilted by the dual-axis actuators, which are controlled
by precision ADCs and DACs within the system. Due to the
microscopic movement of the mirrors, not only is the precision
of the converters important but the noise associated with these
controlling converters is also extremely critical. Total noise
within the system can be multiplied by the number of converters
employed. Therefore, to maintain the stability of the control
loop for this application, the ADR43x, with its exceptionally low
noise, is necessary.
2
VIN
VOUT 6
ADR43x
OP90
2N3904
GND
4
RL
2.1kΩ
–VS
04500-007
R1
470kΩ
04500-004
ADR43x
AMPL
CONTROL
ELECTRONICS
INPUT
VIN
ACTIVATOR
RIGHT
MEMS MIRROR
04500-005
The ADR43x trim terminal can be used to adjust the output
voltage over a ±0.5% range. This feature allows the system designer
to trim system errors out by setting the reference to a voltage
other than the nominal. This is also helpful if the part is used in
a system at temperature to trim out any error. Adjustment of the
output has negligible effect on the temperature performance of the
device. To avoid degrading temperature coefficients, both the
trimming potentiometer and the two resistors need to be low
temperature coefficient types, preferably <100 ppm/°C.
Figure 36. High Voltage Floating Current Source
KELVIN CONNECTION
In many portable instrumentation applications, where printed
circuit board (PCB) cost and area go hand in hand, circuit
interconnects are very often of dimensionally minimum width.
These narrow lines can cause large voltage drops if the voltage
reference is required to provide load currents to various functions.
In fact, circuit interconnects can exhibit a typical line resistance
of 0.45 mΩ/square (for example, 1 oz. Cu). Force and sense
connections, also referred to as Kelvin connections, offer a
convenient method of eliminating the effects of voltage drops
in circuit wires. Load currents flowing through wiring resistance
produce an error (VERROR = R × IL) at the load. However, the
Kelvin connection of Figure 37 overcomes the problem by
including the wiring resistance within the forcing loop of the
operational amplifier.
Because the amplifier senses the load voltage, the operational
amplifier loop control forces the output to compensate for the
wiring error and to produce the correct voltage at the load.
Rev. M | Page 17 of 22
ADR430/ADR431/ADR433/ADR434/ADR435
VIN
PROGRAMMABLE CURRENT SOURCE
RLW
2
VOUT
SENSE
VIN
ADR43x
VOUT 6
Together with a digital potentiometer and a Howland current
pump, the ADR435 forms the reference source for a programmable
current as
RLW
A1
OP191
+
Data Sheet
VOUT
FORCE
 R2 A + R2 B

R1
IL = 

R2 B


RL
04500-008
GND
4
Figure 37. Advantage of Kelvin Connection
Dual polarity references can easily be made with an operational
amplifier and a pair of resistors. To avoid defeating the accuracy
obtained by the ADR43x, it is imperative to match the resistance
tolerance as well as the temperature coefficient of all the components.
VIN
2
VOUT 6
VIN
+5V
R1
10kΩ
ADR435
U1
GND
R2
10kΩ
+10V
TRIM 5
V+
4
OP1177
–5V
R3
5kΩ
04500-009
U2
V–
–10V
Figure 38. +5 V and −5 V References Using ADR435
+2.5V
VW =
D
× VREF
2N
(5)
where:
D is the decimal equivalent of the input code.
N is the number of bits.
In addition, R1' and R2' must be equal to R1 and (R2A + R2B),
respectively. In theory, R2B can be made as small as needed to
achieve the necessary current within the A2 output current
driving capability. In this example, the OP2177 can deliver a
maximum output current of 10 mA. Because the current pump
employs both positive and negative feedback, C1 and C2
capacitors are needed to ensure that the negative feedback
prevails and, therefore, avoids oscillation. This circuit also
allows bidirectional current flow if the VA and VB inputs of
the digital potentiometer are supplied with the dual polarity
references, as shown in Figure 40.
+10V
C1
10pF
2
VIN
VOUT 6
R1'
50kΩ
VDD
ADR435
U1
GND
4
R1
5.6kΩ
2
VIN
TRIM 5
R2
5.6kΩ
U1
OP1177
U2
V–
–10V
GND
VOUT 6
V+
U2
AD5232
VDD
C2
10pF
A
4
04500-010
–2.5V
VDD
TRIM 5
ADR435
V+
R2'
1kΩ
V+
B
W
OP2177
R1
50kΩ
OP2177
A2
V–
VSS
R2A
1kΩ
A1
V–
Figure 39. +2.5 V and −2.5 V References Using ADR435
VSS
R2B
10Ω
+
VL
–
IL
IL
Figure 40. Programmable Current Source
Rev. M | Page 18 of 22
04500-011
0.1µF
(4)
and
DUAL POLARITY REFERENCES
1µF


 ×V
 W


Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
PROGRAMMABLE DAC REFERENCE VOLTAGE
PRECISION VOLTAGE REFERENCE FOR DATA
CONVERTERS
By employing a multichannel DAC, such as the AD7398,
quad, 12-bit voltage output DAC, one of its internal DACs
and an ADR43x voltage reference can be used as a common
programmable VREFX for the rest of the DACs. The circuit
configuration is shown in Figure 41.
The ADR43x family has a number of features that make it ideal
for use with ADCs and DACs. The exceptional low noise, tight
temperature coefficient, and high accuracy characteristics make
the ADR43x ideal for low noise applications, such as cellular
base station applications.
R2
± 0.1%
VOUTA
R1 ± 0.1%
Another example of an ADC for which the ADR431 is well
suited is the AD7701. Figure 42 shows the ADR431 used as
the precision reference for this converter. The AD7701 is a 16-bit
ADC with on-chip digital filtering intended for the measurement
of wide dynamic range and low frequency signals, such as those
representing chemical, physical, or biological processes. It contains
a charge-balancing Σ-Δ ADC, a calibration microcontroller
with on-chip static RAM, a clock oscillator, and a serial
communications port.
VREF
DAC A
VIN
VREFB
VOUTB
ADR43x
VOB = VREFX (DB)
DAC B
VREFC
VOUTC
DAC C
VOC = VREFX (DC)
+5V
ANALOG
SUPPLY 0.1µF
VREFD
VOUTD
10µF
AVDD
VOD = VREFX (DD)
2
VIN
04500-012
DAC D
AD7398
VOUT 6
Figure 41. Programmable DAC Reference
0.1µF
R2
VREF × 1 + 
R1 

=
 + D × R2 
1 N

R1 
 2
(6)
where:
D is the decimal equivalent of the input code.
N is the number of bits.
VREF is the applied external reference.
VREFX is the reference voltage for DAC A to DAC D.
Digital Code
0000 0000 0000
1000 0000 0000
1111 1111 1111
0000 0000 0000
1000 0000 0000
1111 1111 1111
CS
CAL
DATA READY
READ (TRANSMIT)
SCLK
SERIAL CLOCK
SDATA
SERIAL CLOCK
CLKIN
CLKOUT
SC1
ANALOG
INPUT
ANALOG
GROUND
AIN
AGND
SC2
DGND
0.1µF
0.1µF
AVSS
–5V
ANALOG
SUPPLY
0.1µF
MODE
DRDY
BP/UP
CALIBRATE
Table 9. VREFX vs. R1 and R2
R1, R2
R1 = R2
R1 = R2
R1 = R2
R1 = 3R2
R1 = 3R2
R1 = 3R2
VREF
ADR431
RANGES
SELECT
DVDD
SLEEP
GND
4
The relationship of VREFX to VREF depends on the digital code
and the ratio of R1 and R2, given by
VREFX
AD7701
0.1µF
DVSS
10µF
Figure 42. Voltage Reference for the AD7701 16-Bit ADC
VREF
2 VREF
1.3 VREF
VREF
4 VREF
1.6 VREF
VREF
Rev. M | Page 19 of 22
04500-013
VREFA
ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
N1
A precision voltage output with boosted current capability can
be realized with the circuit shown in Figure 43. In this circuit,
U2 forces VO to be equal to VREF by regulating the turn-on of
N1. Therefore, the load current is furnished by VIN. In this
configuration, a 50 mA load is achievable at a VIN of 5 V. Moderate
heat is generated on the MOSFET, and higher current can be
achieved with a replacement of the larger device. In addition,
for a heavy capacitive load with step input, a buffer can be
added at the output to enhance the transient response.
VIN
Rev. M | Page 20 of 22
2
RL
25Ω
5V
VIN
U1
2N7002
ADR431
VOUT 6
+
U2
TRIM 5
GND
VO
V+
AD8601
–
V–
4
04500-014
PRECISION BOOSTED OUTPUT REGULATOR
Figure 43. Precision Boosted Output Regulator
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
3.20
3.00
2.80
5.15
4.90
4.65
5
1
4
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
6°
0°
0.40
0.25
0.80
0.55
0.40
0.23
0.09
10-07-2009-B
0.15
0.05
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 44. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 45. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Rev. M | Page 21 of 22
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
ADR430/ADR431/ADR433/ADR434/ADR435
Data Sheet
ORDERING GUIDE
Model1
ADR430ARZ
ADR430ARZ-REEL7
ADR430ARMZ
ADR430ARMZ-REEL7
ADR430BRZ
ADR430BRZ-REEL7
ADR431ARZ
ADR431ARZ-REEL7
ADR431ARMZ
ADR431ARMZ-REEL7
ADR431BRMZ
ADR431BRMZ-R7
ADR431BRZ
ADR431BRZ-REEL7
ADR433ARZ
ADR433ARZ-REEL7
ADR433ARMZ
ADR433ARMZ-REEL7
ADR433BRZ
ADR433BRZ-REEL7
ADR434ARZ
ADR434ARZ-REEL7
ADR434ARMZ
ADR434ARMZ-REEL7
ADR434BRZ
ADR434BRZ-REEL7
ADR435ARZ
ADR435ARZ-REEL7
ADR435ARMZ
ADR435ARMZ-REEL7
ADR435BRMZ
ADR435BRMZ-R7
ADR435BRZ
ADR435BRZ-REEL7
1
Output
Voltage (V)
2.048
2.048
2.048
2.048
2.048
2.048
2.500
2.500
2.500
2.500
2.500
2.500
2.500
2.500
3.000
3.000
3.000
3.000
3.000
3.000
4.096
4.096
4.096
4.096
4.096
4.096
5.000
5.000
5.000
5.000
5.000
5.000
5.000
5.000
Initial
Accuracy, ±
(mV)
(%)
3
0.15
3
0.15
3
0.15
3
0.15
1
0.05
1
0.05
3
0.12
3
0.12
3
0.12
3
0.12
1
0.04
1
0.04
1
0.04
1
0.04
4
0.13
4
0.13
4
0.13
4
0.13
1.5
0.05
1.5
0.05
5
0.12
5
0.12
5
0.12
5
0.12
1.5
0.04
1.5
0.04
6
0.12
6
0.12
6
0.12
6
0.12
2
0.04
2
0.04
2
0.04
2
0.04
Temperature
Coefficient
Package (ppm/°C)
10
10
10
10
3
3
10
10
10
10
3
3
3
3
10
10
10
10
3
3
10
10
10
10
3
3
10
10
10
10
3
3
3
3
Temperature
Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Z = RoHS Compliant Part.
©2003–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04500-0-6/15(M)
Rev. M | Page 22 of 22
Package
Description
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
Package
Option
R-8
R-8
RM-8
RM-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
R-8
R-8
R-8
R-8
RM-8
RM-8
R-8
R-8
R-8
R-8
RM-8
RM-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
R-8
R-8
Ordering
Quantity
98
1,000
50
1,000
98
1,000
98
1,000
50
1,000
50
1000
98
1,000
98
1,000
50
1,000
98
1,000
98
1,000
50
1,000
98
1,000
98
1,000
50
1,000
50
1,000
98
1,000
Branding
R10
R10
R12
R12
R13
R13
R14
R14
R16
R16
R18
R18
R19
R19