TLE8250GVIO Data Sheet (1.6 MB, EN)

TLE8250GVIO
High Speed CAN-Transceiver
Data Sheet
Rev. 1.1, 2014-10-08
Automotive Power
TLE8250GVIO
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
4.1
4.2
4.3
4.4
4.5
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High Speed CAN Physical Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Normal Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stand-By Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5.1
5.2
5.3
5.4
5.5
Fail Safe Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Open Logic Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TxD Time-Out function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Under-Voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over-Temperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
10
10
11
12
6
6.1
6.2
6.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
14
14
7
7.1
7.2
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Functional Device Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8
8.1
8.2
8.3
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Characteristics of the RxD Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Data Sheet
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6
6
8
9
9
9
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20
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Rev. 1.1, 2014-10-08
High Speed CAN-Transceiver
1
TLE8250GVIO
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Fully compatible to ISO 11898-2
Wide common mode range for electromagnetic immunity (EMI)
Very low electromagnetic emission (EME)
Excellent ESD robustness
Extended supply range at VCC and VIO
Suitable for 5V and 3.3V microcontroller I/O voltages
CAN Short-Circuit proof to ground, battery and VCC
TxD time-out function
Low CAN bus leakage current in Power Down mode
Over temperature protection
Protected against automotive transients
CAN data transmission rate up to 1 MBit/s
VIO input for voltage adaption to the micro controller supply
Green Product (RoHS compliant)
AEC Qualified
PG-DSO-8
Description
The TLE8250GVIO is a transceiver designed for CAN networks in automotive and industrial applications. As an
interface between the physical bus layer and the CAN protocol controller, the TLE8250GVIO drives the signals to
the bus and protects the microcontroller against disturbances coming from the network. Based on the high
symmetry of the CANH and CANL signals, the TLE8250GVIO provides a very low level of electromagnetic
emission (EME) within a broad frequency range. The TLE8250GVIO is integrated in a RoHS complaint PG-DSO-8
package and fulfills or exceeds the requirements of the ISO11898-2.
As a successor to the first generation of HS CAN transceivers, the TLE8250GVIO is fully pin and function
compatible to his predecessor model, the TLE6250GV33. The TLE8250GVIO is optimized to provide an excellent
passive behavior in Power Down mode. This feature makes the TLE8250GVIO extremely suitable for mixed
supply CAN networks.
Based on the Infineon Smart Power Technology SPT®, the TLE8250GVIO provides industry leading ESD
robustness together with a very high electromagnetic immunity (EMI). The Infineon Smart Power Technology
SPT® allows bipolar and CMOS control circuitry in accordance with DMOS power devices to exist on the same
monolithic circuit. The TLE8250GVIO and the Infineon SPT® technology are AEC qualified and tailored to
withstand the harsh conditions of the Automotive Environment.
Two different operation modes, additional Fail Safe features like a TxD time-out and the optimized output slew
rates on the CANH and CANL signals are making the TLE8250GVIO the ideal choice for large CAN networks with
high data rates.
Type
Package
Marking
TLE8250GVIO
PG-DSO-8
8250GVIO
Data Sheet
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Rev. 1.1, 2014-10-08
TLE8250GVIO
Block Diagram
2
Block Diagram
3
Output Driver
Stage
5
VCC
VIO
7
Driver
CANH
CANL
Output
Stage
6
1
TxD
TempProtection
Timeout
Mode Control
Receive Unit
8
NEN
= VCC/2
Receiver
*
GND
Figure 1
2
4
RxD
Block Diagram
Note: In comparison to the TLE6250GV33 the pin 8 (INH) was renamed to the term NEN, the function remains
unchanged. NEN stands for Not ENable.
Data Sheet
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Rev. 1.1, 2014-10-08
TLE8250GVIO
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
TxD
1
8
NEN
GND
2
7
CANH
VCC
3
6
CANL
RxD
4
5
VIO
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
Table 1
Pin Definition and Functions
Pin
Symbol
Function
1
TxD
Transmit Data Input;
internal pull-up to VIO, “Low” for “Dominant” state.
2
GND
Ground
3
VCC
Transceiver Supply Voltage;
100 nF decoupling capacitor to GND required.
4
RxD
Receive Data Output;
“Low” in “Dominant” state.
5
VIO
Digital Supply Voltage Input;
Supply voltage input to adapt the logical input and output voltage levels of the
transceiver to the microcontroller supply.
100 nF decoupling capacitor to GND required.
6
CANL
CAN Bus Low level I/O;
“Low “ in “Dominant” state.
7
CANH
CAN Bus High level I/O;
“High” Sin “Dominant” state.
8
NEN
Not ENable Input1);
internal pull-up to VIO, “Low” for Normal Operation mode.
1) The naming of pin 8 is different between the TLE8250GVIO and its forerunner model the TLE6250GV33. The function of
pin 8 remains the same.
Data Sheet
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Rev. 1.1, 2014-10-08
TLE8250GVIO
Functional Description
4
Functional Description
CAN is a serial bus system that connects microcontrollers, sensor and actuators for real-time control applications.
The usage of the Control Area Network (abbreviated CAN) within road vehicles is described by the international
standard ISO 11898. According to the 7 layer OSI reference model the physical layer of a CAN bus system
specifies the data transmission from one CAN node to all other available CAN nodes inside the network. The
physical layer specification of a CAN bus system includes all electrical and mechanical specifications of a CAN
network. The CAN transceiver is part of the physical layer specification. Several different physical layer standards
of CAN networks have been developed over the last years. The TLE8250GVIO is a High Speed CAN transceiver
without any dedicated Wake-Up function. High Speed CAN Transceivers without Wake-Up function are defined
by the international standard ISO 11898-2.
4.1
High Speed CAN Physical Layer
TxD
VIO
t
CAN_H
CAN_L
VCC
= Logic Power Supply
= CAN Power Supply
= Input from the
Microcontroller
RxD = Output to the
Microcontroller
CANH = Voltage on the CANH
Input/Output
CANL = Voltage on the CANL
Input/Output
Differential Voltage
VDIFF =
between CANH and CANL
VDIFF = VCANH – VCANL
VIO
VCC
TxD
t
VDIFF
Dominant
VDIFF = ISO Level Dominant
VDIFF = ISO Level Recessive
Recessive
t
RxD
VIO
t
Figure 3
Data Sheet
High Speed CAN Bus Signals and Logic Signals
6
Rev. 1.1, 2014-10-08
TLE8250GVIO
Functional Description
The TLE8250GVIO is a High Speed CAN transceiver, operating as an interface between the CAN controller and
the physical bus medium. A HS CAN network is a two wire, differential network which allows data transmission
rates up to 1 MBit/s. Characteristic for a HS CAN network are the two signal states on the CAN bus: “Dominant”
and “Recessive” (see Figure 3).
The pins CANH and CANL are the interface to the CAN bus and both pins operate as a input and as an output.
The pins RxD and TxD are the interface to the microcontroller. The pin TxD is the serial data input from the CAN
controller, the pin RxD is the serial data output to the CAN controller. As shown in Figure 1, the HS CAN
transceiver TLE8250GVIO has a receive and a transmit unit, allowing the transceiver to send data to the bus
medium and monitor the data from the bus medium at the same time. The HS CAN transceiver TLE8250GVIO
converts the serial data stream available on the transmit data input TxD, into a differential output signal on
CAN bus, provided by the pins CANH and CANL. The receiver stage of the TLE8250GVIO monitors the data on
the CAN bus and converts them to a serial, single ended signal on the RxD output pin. A logical “Low” signal on
the TxD pin creates a “Dominant” signal on the CAN bus, followed by a logical “Low” signal on the RxD pin (see
Figure 3). The feature, broadcasting data to the CAN bus and listening to the data traffic on the CAN bus
simultaneous is essential to support the bit to bit arbitration inside CAN networks.
The voltage levels for HS CAN transceivers are defined by the ISO 11898-2 and the ISO 11898-5 standards. If a
data bit is “Dominant” or “Recessive” depends on the voltage difference between pins CANH and CANL:
VDIFF = VCANH - VCANL.
In comparison to other differential network protocols the differential signal on a CAN network can only be larger or
equal to 0 V. To transmit a “Dominant” signal to the CAN bus the differential signal VDIFF is larger or equal to 1.5 V.
To receive a “Recessive” signal from the CAN bus the differential VDIFF is smaller or equal to 0.5 V.
Partially supplied CAN networks are networks where the CAN bus participants have different power supply
conditions. Some nodes are connected to the power supply, some other nodes are disconnected from the power
supply. Regardless, if the CAN bus participant is supplied or not supplied, each participant connected to the
common bus media must not disturb the communication. The TLE8250GVIO is designed to support partially
supplied networks. In Power Down mode, the receiver input resistors are switched off and the transceiver input is
high resistive.
The voltage level on the digital input TxD and the digital output RxD is determined by the power supply level at the
pin VIO. Depending on voltage level at the VIO pin, the signal levels on the logic pins (NEN, TxD and RxD) are
compatible to microcontrollers with 5 V or 3.3 V I/O supply. Usually the VIO power supply of the transceiver is
connected to same power supply as I/O power supply of the microcontroller.
Data Sheet
7
Rev. 1.1, 2014-10-08
TLE8250GVIO
Functional Description
4.2
Operation Modes
Two different operation modes are available on TLE8250GVIO. Each mode with specific characteristics in terms
of quiescent current or data transmission. For the mode selection the digital input pin NEN is used. Figure 4
illustrates the different mode changes depending on the status of the NEN pin. After suppling VCC and VIO to the
HS CAN transceiver, the TLE8250GVIO starts in Stand-By mode. The internal pull-up resistor is setting the
TLE8250GVIO to Stand-By per default. If the microcontroller is up and running the TLE8250GVIO can change to
operation mode within the time for mode change tMode.
VCC < VCC(UV)
Undervoltage
Detection on VCC
and VIO
Start – Up
Supply VCC
and VIO
VIO < VIO(UV)
Power Down
Stand-By Mode
NEN = 1
NEN = 0
NEN = 1
Normal Operation
Mode
NEN = 0
Figure 4
Operation Modes
The TLE8250GVIO has 2 major operation modes:
•
•
Stand-By mode
Normal Operation mode
Table 2
Operating modes
Mode
NEN
Bus Bias
Comments
Normal Operation
“Low”
VCC/2
Output driver stage is active.
Receiver unit is active.
Stand-By
“High”
Floating
Output driver stage is disabled.
Receiver unit is disabled.
VCC off
“Low”
or
“High”
Floating
Output driver stage is disabled.
Receiver unit is disabled.
Data Sheet
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Rev. 1.1, 2014-10-08
TLE8250GVIO
Functional Description
4.3
Normal Operation Mode
In Normal Operation mode the HS CAN transceiver TLE8250GVIO sends the serial data stream on the TxD pin
to the CAN bus while at the same time the data available on the CAN bus are monitored to the RxD pin. In Normal
Operation mode all functions of the TLE8250GVIO are active:
•
•
•
•
The output driver stage is active and drives data from the TxD to the CAN bus.
The receiver unit is active and provides the data from the CAN bus to the RxD pin.
The bus basing is set to VCC/2.
The under-voltage monitoring on the power supply VCC and on the power supply VIO is active.
To enter the Normal Operation mode set the pin NEN to logical “Low” (see Table 2 or Figure 4). The NEN pin has
an internal pull-up resistors to the power-supply VIO.
4.4
Stand-By Mode
Stand-By mode is an idle mode of the TLE8250GVIO with optimized power consumption. In Stand-By mode the
TLE8250GVIO can not send or receive any data. The output driver stage and the normal receiver unit are disabled.
Both CAN bus pins, CANH and CANL are floating.
•
•
•
•
The output driver stage is disabled.
The receiver unit is disabled.
The bus basing is floating.
The under-voltage monitoring on the power supply VCC and on the power supply VIO is active.
To enter the Stand-By mode set the pin NEN to logical “High” (see Table 2 or Figure 4). The NEN pin has an
internal pull-up resistor to the power-supply VIO. In case the Stand-By mode will not be used in the application, the
NEN pin needs to get connected to GND.
4.5
Power Down
Power Down mode means the TLE8250GVIO is not supplied. In Power Down the differential input resistors of the
receiver stage are switched off. The CANH and CANL bus interface of the TLE8250GVIO acts as an high
impedance input with a very small leakage current. The high ohmic input doesn’t influence the “Recessive” level
of the CAN network and allows an optimized EME performance of the whole CAN network.
Data Sheet
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Rev. 1.1, 2014-10-08
TLE8250GVIO
Fail Safe Functions
5
Fail Safe Functions
5.1
Short circuit protection
The CANH and CANL bus outputs are short-circuit-proof, either against GND or a positive supply voltage. A
current limiting circuit protects the transceiver against damages. If the device is heating up due to a continuos short
on CANH or CANL, the internal over-temperature protection switches off the bus transmitter.
5.2
Open Logic Pins
All logic input pins have internal pull-up resistor to VIO. In case the VIO supply is activated and the logical pins are
open or floating, the TLE8250GVIO enters into the Stand-By mode per default. In Stand-By mode the output driver
stage of the TLE8250GVIO is disabled, the bus biasing is shut off and the HS CAN TLE8250GVIO transceiver will
not influence the data on the CAN bus.
5.3
TxD Time-Out function
The TxD Time-out feature protects the CAN bus against permanent blocking in case the logical signal on the TxD
pin is continuously “Low”. A continuous “Low” signal on the TxD pin can have it’s root cause in a locked-up
microcontroller or a short on the printed circuit board for example. In Normal Operation mode, a logical “Low”
signal on the TxD pin for the time t > tTxD enables the TxD Time-out feature and the TLE8250GVIO disables the
output driver stage (see Figure 5). The receive unit is still active and the data on the bus are still monitored by the
RxD output pin.
t > tTxD
TxD Time - Out
CANH
CANL
TxD Time – Out released
t
TxD
t
RxD
t
Figure 5
TxD Time-Out function
Figure 5 shows the way how the transmission stage is deactivated and activated again. A permanent “Low” signal
on the TxD input pin activates the TxD time-out function and deactivates the transmitter output stage. To release
the transmitter output stage after a TxD time-out event the TLE8250GVIO requires a signal change on the TxD
input pin from logical “Low” to logical “High”.
Data Sheet
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Rev. 1.1, 2014-10-08
TLE8250GVIO
Fail Safe Functions
5.4
Under-Voltage detection
The HS CAN Transceiver TLE8250GVIO is equipped with an under-voltage detection on the power supply VCC
and the power supply VIO. In case of an under-voltage event on VCC or VIO, the under-voltage detection changes
the operation mode of TLE8250GVIO to the Stand-By mode, regardless to the logical signal on the NEN pin (see
Figure 6).If the transceiver TLE8250GVIO recovers from the under-voltage event, the operation mode returns to
the programmed mode by the NEN pin.
Supply voltage VCC
Power down reset level
VCC(UV)
Time for mode change
tMode
Blanking time
tblank,UV
NEN = 0
NRM = 1
Normal Operation
Mode
Stand-By
Mode
Normal Operation
Mode1)
Supply voltage VIO
Power down reset level
VIO(UV)
Time for mode change
tMode
Blanking time
tblank,UV
NEN = 0
NRM = 1
Normal Operation
Mode
Stand-By
Mode
Normal Operation
Mode1)
1)
Assuming the logical signal on the pin NEN keeps its values during the undervoltage event. In this case NEN remains „Low“.
Figure 6
Data Sheet
Under-Voltage detection on VCC and VIO
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Rev. 1.1, 2014-10-08
TLE8250GVIO
Fail Safe Functions
5.5
Over-Temperature protection
Overtemperature Event
TJ
Cool Down
TJSD (Shut Down temperature)
TJSO (Switch On temperature)
t
CANH
CANL
t
TxD
t
RxD
t
Figure 7
Over-Temperature protection
The TLE8250GVIO has an integrated over-temperature detection to protect the device against thermal overstress
of the output driver stage. In case of an over-temperature event, the temperature sensor will disable the output
driver stage (see Figure 1). After the device cools down the output driver stage is activated again (see Figure 7).
Inside the temperature sensor a hysteresis is implemented.
Data Sheet
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Rev. 1.1, 2014-10-08
TLE8250GVIO
General Product Characteristics
6
General Product Characteristics
6.1
Absolute Maximum Ratings
Table 3
Absolute Maximum Ratings Voltages, Currents and Temperatures1)
All voltages with respect to ground; positive current flowing into pin;
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Remarks
Voltages
6.1.1
Transceiver Supply Voltage VCC
-0.3
6.0
V
–
6.1.2
Logic Supply Voltage
VIO
-0.3
6.0
V
–
6.1.3
CANH DC voltage versus
GND
VCANH
-40
40
V
–
6.1.4
CANL DC voltage versus
GND
VCANL
-40
40
V
–
6.1.5
Differential voltage
VCAN diff
between CANH and CANL
-40
40
V
6.1.6
Logic voltages at NEN,
TxD, RxD
VI
-0.3
6.0
V
–
Temperatures
6.1.7
Junction temperature
Tj
-40
150
°C
–
6.1.8
Storage temperature
TS
- 55
150
°C
–
VESD
-8
8
kV
Human Body Model
(100pF via 1.5 kΩ)2)
VESD
-2
2
kV
Human Body Model
(100pF via 1.5 kΩ)2)
ESD Resistivity
6.1.9
ESD Resistivity at CANH,
CANL versus GND
6.1.10 ESD Resistivity all other
pins
1) Not subject to production test, specified by design
2) ESD susceptibility HBM according to EIA / JESD 22-A 114
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
Data Sheet
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Rev. 1.1, 2014-10-08
TLE8250GVIO
General Product Characteristics
6.2
Functional Range
Table 4
Operating Range
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
Supply Voltages
6.2.1
Transceiver Supply Voltage
VCC
4.5
5.5
V
–
6.2.2
Logical Supply Voltage
VIO
3.0
5.5
V
–
Tj
-40
150
°C
1)
Thermal Parameters
6.2.3
Junction temperature
1) Not subject to production test, specified by design
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
6.3
Thermal Characteristics
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Thermal Resistance1)
Table 5
Pos.
Parameter
Symbol
Limit Values
Unit
Remarks
Min.
Typ.
Max.
–
130
–
K/W
2)
150
175
200
°C
–
K
–
Thermal Resistance
6.3.1
Junction to Ambient1)
RthJA
Thermal Shutdown Junction Temperature
6.3.2
Thermal shutdown temp. TJSD
6.3.3
Thermal shutdown
hysteresis
ΔT
10
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The Product
(TLE8250GVIO) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Data Sheet
14
Rev. 1.1, 2014-10-08
TLE8250GVIO
Electrical Characteristics
7
Electrical Characteristics
7.1
Functional Device Characteristics
Table 6
Electrical Characteristics
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < TJ < +150°C; all voltages with respect to ground;
positive current flowing into pin; unless otherwise specified.
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
Current Consumption
7.1.1
Current consumption on VCC
ICC
–
6
10
mA
“Recessive” state;
VTxD = VIO
7.1.2
Current consumption on VCC
ICC
–
45
70
mA
“Dominant” state;
VTxD = 0 V
7.1.3
Current consumption
ICC(STB)
–
7
15
μA
Stand-By mode;
TxD = VIO, NEN = “Low”
7.1.4
Current consumption
IIO
–
–
1
mA
Normal Operation mode
NEN = “Low”
VCC(UV)
VCC(UV,H)
1.3
3.2
4.3
V
–
–
200
–
mV
1)
VIO(UV)
VIO(UV,H)
1.3
2.4
2.8
V
–
–
200
–
mV
1)
tblank(UV)
–
15
–
μs
1)
7.1.10 HIGH level output current
IRD,H
–
-4
-2
mA
VRxD = 0.8 × VIO
VDIFF < 0.5 V
7.1.11 LOW level output current
IRD,L
2
4
–
mA
VRxD = 0.2 × VIO
VDIFF > 0.9 V
7.1.12 HIGH level input voltage
threshold
VTD,H
–
0.5 ×
0.7 ×
V
“Recessive” state
VIO
VIO
7.1.13 LOW level input voltage
threshold
VTD,L
0.3 ×
0.4 ×
–
V
“Dominant” state
VIO
VIO
7.1.14 TxD pull-up resistance
RTD
10
25
50
kΩ
–
Supply Resets
VCC under-voltage monitor
7.1.6 VCC under-voltage monitor
7.1.5
hysteresis
VIO under-voltage monitor
7.1.8 VIO under-voltage monitor
7.1.7
hysteresis
7.1.9
VCC and VIO under-voltage
blanking time
Receiver Output: RxD
Transmission Input: TxD
7.1.15 TxD input hysteresis
VHYS(TxD)
–
200
–
mV
1)
7.1.16 TxD permanent dominant
disable time
tTxD
0.3
–
1.0
ms
–
Data Sheet
15
Rev. 1.1, 2014-10-08
TLE8250GVIO
Electrical Characteristics
Table 6
Electrical Characteristics (cont’d)
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < TJ < +150°C; all voltages with respect to ground;
positive current flowing into pin; unless otherwise specified.
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
0.5 ×
0.7 ×
VIO
VIO
Not Enable Input NEN
7.1.17 HIGH level input voltage
threshold
VNEN,H
–
7.1.18 LOW level input voltage
threshold
VNEN,L
0.3 ×
0.4 ×
VIO
VIO
7.1.19 NEN pull-up resistance
RNEN
10
25
V
Stand-By mode;
–
V
Normal Operation mode;
50
kΩ
–
VHYS(NEN)
–
200
–
mV
1)
7.1.21 Differential receiver threshold
“Dominant”
VDIFF,(D)
–
0.75
0.9
V
Normal Operation mode
7.1.22 Differential receiver threshold
“Recessive”
VDIFF,(R)
0.5
0.6
–
7.1.23 Differential receiver input
range - “Dominant”
Vdiff,rdN
0.9
–
5.0
V
Normal Operation mode
7.1.24 Differential receiver input
range - “Recessive”
Vdiff,drN
-1.0
–
0.5
V
Normal Operation mode
7.1.25 Common Mode Range
CMR
-12
–
12
V
VCC = 5 V
7.1.26 Differential receiver hysteresis Vdiff,hys
–
100
–
mV
1)
7.1.27 CANH, CANL input resistance Ri
10
20
30
kΩ
“Recessive” state
7.1.28 Differential input resistance
20
40
60
kΩ
“Recessive” state
“Recessive” state
7.1.20 NEN input hysteresis
Bus Receiver
Rdiff
Normal Operation mode
7.1.29 Input resistance deviation
between CANH and CANL
Δ Ri
-3
–
3
%
1)
7.1.30 Input capacitance CANH,
CANL versus GND
CIN
–
20
40
pF
1)
VTxD = VCC
7.1.31 Differential input capacitance
CInDiff
–
10
20
pF
1)
VTxD = VCC
7.1.32 CANL/CANH recessive output VCANL/H
voltage
2.0
2.5
3.0
V
VTxD = VIO;
7.1.33 CANH, CANL recessive
output voltage difference
-500
–
50
mV
VTxD = VIO;
no load
7.1.34 CANL dominant output voltage VCANL
0.5
–
2.25
V
4.75 V < VCC < 5.25 V,
VTxD = 0 V,
50 Ω < RL < 65 Ω;
7.1.35 CANH dominant output voltage VCANH
2.75
–
4.5
V
7.1.36 CANH, CANL dominant output Vdiff
voltage difference
Vdiff = VCANH - VCANL
1.5
–
3.0
V
7.1.37 Driver Symmetry
VSYM = VCANH + VCANL
4.5
–
5.5
V
4.75 V < VCC < 5.25 V,
VTxD = 0 V,
50 Ω < RL < 65 Ω;
4.75 V < VCC < 5.25 V,
VTxD = 0 V,
50 Ω < RL < 65 Ω;
VTxD = “Low”;VCC = 5 V
50 Ω < RL < 65 Ω
Bus Transmitter
Data Sheet
Vdiff
VSYM
no load
16
Rev. 1.1, 2014-10-08
TLE8250GVIO
Electrical Characteristics
Table 6
Electrical Characteristics (cont’d)
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < TJ < +150°C; all voltages with respect to ground;
positive current flowing into pin; unless otherwise specified.
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
7.1.38 CANL short circuit current
ICANLsc
50
100
200
mA
7.1.39 CANH short circuit current
ICANHsc
ICANHL,lk
-200
-100
-50
mA
-5
0
5
μA
7.1.40 Leakage current
Data Sheet
17
VCANLshort = 18 V
VCANHshort = 0 V
VCC = 0 V; VCANH = VCANL;
0 V < VCANH,L < 5 V
Rev. 1.1, 2014-10-08
TLE8250GVIO
Electrical Characteristics
Table 6
Electrical Characteristics (cont’d)
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; RL = 60 Ω; -40°C < TJ < +150°C; all voltages with respect to ground;
positive current flowing into pin; unless otherwise specified.
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Typ.
Max.
td(L),TR
–
–
255
ns
CL = 100 pF;
VCC = 5 V; CRxD = 15 pF
7.1.42 Propagation delay
td(H),TR
TxD-to-RxD HIGH (“Dominant”
to “Recessive”)
–
–
255
ns
CL = 100 pF;
VCC = 5 V; CRxD = 15 pF
CL = 100 pF;
VCC = 5 V; CRxD = 15 pF
CL = 100 pF;
VCC = 5 V; CRxD = 15 pF
CL = 100 pF;
VCC = 5 V; CRxD = 15 pF
CL = 100 pF;
VCC = 5 V; CRxD = 15 pF
Dynamic CAN-Transceiver Characteristics
7.1.41 Propagation delay
TxD-to-RxD LOW
(“Recessive” to “Dominant”)
7.1.43 Propagation delay
TxD LOW to bus “Dominant”
td(L),T
–
110
–
ns
7.1.44 Propagation delay
TxD HIGH to bus “Recessive”
td(H),T
–
110
–
ns
7.1.45 Propagation delay
bus “Dominant” to RxD “Low”
td(L),R
–
70
–
ns
7.1.46 Propagation delay
td(H),R
bus “Recessive” to RxD “High”
–
100
–
ns
–
–
10
μs
tMode
7.1.47 Time for mode change
1)
1) Not subject to production test, specified by design
7.2
Diagrams
VIO
7
CANH
TxD
NEN
CL
6
1
8
4
CRxD
CANL
GND
2
Data Sheet
100 nF
RL
RxD
Figure 8
5
VCC
3
100 nF
Simplified test circuit
18
Rev. 1.1, 2014-10-08
TLE8250GVIO
Electrical Characteristics
VTxD
VIO
GND
VDIFF
td(L),T
0,9V
0,5V
td(L),R
VRxD
t
td(H),T
t
td(H),R
td(L),TR
td(H),TR
VIO
0.8 x VIO
0.2 x VIO
GND
t
Figure 9
Data Sheet
Timing diagram for dynamic characteristics
19
Rev. 1.1, 2014-10-08
TLE8250GVIO
Application Information
8
Application Information
8.1
Application Example
VBAT
I
Q1
22 uF
TLE4476D
CANH
CANL
EN
GND
100 nF
100 nF
Q2
3
VCC
22 uF
120
Ohm
VIO
TLE8250GVIO
NEN
7
CANH a
6
TxD
RxD
CANL
100 nF
5
8
VCC
Out
1
Out
4
In
Microcontroller
e.g. XC22xx
Optional:
Common Mode Choke
GND
GND
2
Example ECU Design
I
Q1
22 uF
TLE4476D
EN
GND
100 nF
Q2
3
VCC
22 uF
VIO
TLE8250GVIO
7
6
NEN
CANH
TxD
RxD
CANL
Optional:
Common Mode Choke
5
8
1
4
100 nF
100 nF
VCC
Out
Out
In
Microcontroller
e.g. XC22xx
GND
120
Ohm
GND
2
CANH
Figure 10
Data Sheet
CANL
Simplified Application for the TLE8250GVIO
20
Rev. 1.1, 2014-10-08
TLE8250GVIO
Application Information
8.2
Output Characteristics of the RxD Pin
The RxD output pin is designed as a push-pull output stage (see Figure 1), meaning to produce a logical “Low”
signal the TLE8250GVIO switches the RxD output to GND. Vice versa to produce a logical “High” signal the
TLE8250GVIO switches the RxD output to VIO.
The level VRXD,H for a logical “High” signal on the RxD output depends on the load at the RxD output pin and
therefore on the RxD output current IRD,H. The voltage level VRxD,H also depends on the voltage of the power
supply VIO. According to the operating range (see Table 4) the power supply VIO can vary between 3.0 V and
5.5 V. At a VIO supply of 5 V the output current of the RxD pin on the TLE8250GVIO is higher as in comparison
for a VIO supply of 3.3 V. For a load against the GND potential, the current IRD,H is flowing out of the RxD output pin.
Similar to the logical “High” signal, the level VRXD,L for a logical “Low” signal on the RxD output pin depends on the
input current IRD,L and the power supply voltage VIO. For a load against the power supply VIO the current IRD,L is
flowing into the RxD output pin.
Currents flowing into the device are marked positive inside the data sheet and currents flowing out of the device
TLE8250GVIO are marked negative inside the data sheet (see Table 6).
The diagram in Figure 11 shows the output current capability of the RxD output pin depended on the chip
temperature TJ at a VIO power supply of 5.0 V. Figure 12 shows the output current capability of the RxD output pin
at a VIO power supply of 3.3 V.
Both diagrams show the output current for a logical “High” level VRxD,H = 4.6 V. The CAN transceiver
TLE8250GVIO provides a logical “High” signal on the RxD output while the signal on the CAN bus is “Recessive”
(see Figure 3):
•
•
•
•
•
•
The curve “VRxD,H = 4.6 V; typ. output current; VCC = 5.0 V; VIO =5.0 V;” displays the typical output current
at the RxD output pin of the TLE8250GVIO (see Figure 11).
For this graph VCC = 5.0 V and VIO = 5.0 V.
The curve “VRxD,H = 4.6 V; typ. output current + 6 sigma; VCC = 5.0 V; VIO =5.0 V;” displays the expected
maximum value of the output current at the RxD output pin (see Figure 11).
For this graph VCC = 5.0 V and VIO = 5.0 V.
The curve “VRxD,H = 4.6 V; typ. output current - 6 sigma; VCC = 5.0 V; VIO =5.0 V;” displays the expected
minimum value of the output current at the RxD output pin (see Figure 11).
For this graph VCC = 5.0 V and VIO = 5.0 V.
The curve “VRxD,H = 4.6 V; typ. output current; VCC = 5.0 V; VIO =3.3 V;” displays the typical output current
at the RxD output pin of the TLE8250GVIO (see Figure 12).
For this graph VCC = 5.0 V and VIO = 3.3 V.
The curve “VRxD,H = 4.6 V; typ. output current + 6 sigma; VCC = 5.0 V; VIO =3.3 V;” displays the expected
maximum value of the output current at the RxD output pin (see Figure 12).
For this graph VCC = 5.0 V and VIO = 3.3 V.
The curve “VRxD,H = 4.6 V; typ. output current - 6 sigma; VCC = 5.0 V; VIO =3.3 V;” displays the expected
minimum value of the output current at the RxD output pin (see Figure 12).
For this graph VCC = 5.0 V and VIO = 3.3 V.
The diagram in Figure 13 and the diagram in Figure 14 show the current capability of the RxD output pin
depended on the chip temperature TJ. Figure 13 shows the current capability of the RxD output pin at a VIO power
supply of 5.0 V and Figure 14 shows the current capability of the RxD output pin at a VIO power supply of 3.3 V.
Both diagrams show the output current for a logical “Low” level VRxD,H = 0.4 V. The CAN transceiver
TLE8250GVIO provides a logical “Low” signal on the RxD output while the signal on the CAN bus is “Dominant”
(see Figure 3):
•
The curve “VRxD,H = 0.4 V; typ. output current; VCC = 5.0 V; VIO =5.0 V;” displays the typical output current
at the RxD output pin of the TLE8250GVIO (see Figure 13).
For this graph VCC = 5.0 V and VIO = 5.0 V.
Data Sheet
21
Rev. 1.1, 2014-10-08
TLE8250GVIO
Application Information
•
•
•
•
•
The curve “VRxD,H = 0.4 V; typ. output current + 6 sigma; VCC = 5.0 V; VIO =5.0 V;” displays the expected
maximum value of the output current at the RxD output pin (see Figure 13).
For this graph VCC = 5.0 V and VIO = 5.0 V.
The curve “VRxD,H = 0.4 V; typ. output current - 6 sigma; VCC = 5.0 V; VIO =5.0 V;” displays the expected
minimum value of the output current at the RxD output pin (see Figure 13).
For this graph VCC = 5.0 V and VIO = 5.0 V.
The curve “VRxD,H = 0.4 V; typ. output current; VCC = 5.0 V; VIO =3.3 V;” displays the typical output current
at the RxD output pin of the TLE8250GVIO (see Figure 14).
For this graph VCC = 5.0 V and VIO = 3.3 V.
The curve “VRxD,H = 0.4 V; typ. output current + 6 sigma; VCC = 5.0 V; VIO =3.3 V;” displays the expected
maximum value of the output current at the RxD output pin (see Figure 14).
For this graph VCC = 5.0 V and VIO = 3.3 V.
The curve “VRxD,H = 0.4 V; typ. output current - 6 sigma; VCC = 5.0 V; VIO =3.3 V;” displays the expected
minimum value of the output current at the RxD output pin (see Figure 14).
For this graph VCC = 5.0 V and VIO = 3.3 V.
Data Sheet
22
Rev. 1.1, 2014-10-08
TLE8250GVIO
Application Information
Figure 11
RxD Output driver capability for a logical “High” signal VRxD,H=4.6 V, VCC=5.0 V, VIO=5.0 V1)
Figure 12
RxD Output driver capability for a logical “High” signal VRxD,H=4.6 V, VCC=5.0 V, VIO=3.3 V1)
1) Characteristics generated by simulation and specified by design. Production test criteria is described in Table 6;
Pos.: 7.1.10
Data Sheet
23
Rev. 1.1, 2014-10-08
TLE8250GVIO
Application Information
Figure 13
RxD Output driver capability for a logical “Low” signal VRxD,H=0.4 V, VCC=5.0 V, VIO=5.0 V1)
Figure 14
RxD Output driver capability for a logical “Low” signal VRxD,H=0.4 V, VCC=5.0 V, VIO=3.3 V1)
1) Characteristics generated by simulation and specified by design. Production test criteria is described in Table 6;
Pos.: 7.1.11
Data Sheet
24
Rev. 1.1, 2014-10-08
TLE8250GVIO
Application Information
8.3
•
•
•
Further Application Information
Please contact us for information regarding the FMEA pin.
Existing App. Note (Title)
For further information you may contact http://www.infineon.com/transceiver
Data Sheet
25
Rev. 1.1, 2014-10-08
TLE8250GVIO
Package Outlines
9
Package Outlines
0.1
2)
0.41+0.1
-0.06
0.2
8
5
1
4
5 -0.2 1)
M
B
0.19 +0.06
C
8 MAX.
1.27
4 -0.21)
1.75 MAX.
0.175 ±0.07
(1.45)
0.35 x 45˚
0.64 ±0.25
6 ±0.2
A B 8x
0.2
M
C 8x
A
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
GPS01181
Figure 15
PG-DSO-8 (Plastic Dual Small Outline PG-DSO-8-16)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
26
Dimensions in mm
Rev. 1.1, 2014-10-08
TLE8250GVIO
Revision History
10
Revision History
Revision
Date
Changes
1.1
2014-9-26
Update from Data Sheet Rev. 1.00:
• All pages:
Revision and date updated.
Spelling and grammar corrected.
• Cover page:
Logo and layout updated.
• Page 3, Overview:
Feature list updated (“Extended supply range at VCC and VIO”).
• Page 14, Table 4, Parameter 6.2.1:
Supply range updated (“4.5 V < VCC < 5.5V”).
• Page 14, Table 4, Parameter 6.2.2:
Supply range updated (“3.0 V < VIO < 5.5V”).
• Page 15, Table 6:
Table header updated (“4.5 V < VCC < 5.5V”).
Table header updated (“3.0 V < VIO < 5.5V”).
• Page 16, Table 6, Parameter 7.1.29:
New parameter added.
• Page 16, Table 6, Parameter 7.1.30:
New parameter added.
• Page 16, Table 6, Parameter 7.1.31:
New parameter added.
• Page 16, Table 6, Parameter 7.1.34:
Remark added (“4.75 V < VCC < 5.25V”).
• Page 16, Table 6, Parameter 7.1.35:
Remark added (“4.75 V < VCC < 5.25V”).
• Page 16, Table 6, Parameter 7.1.36:
Remark added (“4.75 V < VCC < 5.25V”).
• Page 20, Figure 10:
Picture updated.
• Page 21, Chapter 8.2:
Description updated,
renamed the term typical input current to typical output current.
• Page 23ff, Figure 11, Figure 12, Figure 13, Figure 14:
Picture updated
• Page 27:
Revision history updated
1.0
2010-09-02
Data Sheet created
Data Sheet
27
Rev. 1.1, 2014-10-08
Edition 2014-10-08
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2006 Infineon Technologies AG
All Rights Reserved.
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characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
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For further information on technology, delivery terms and conditions and prices, please contact the nearest
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