ADSP-BF518F EZ-Board Evaluation System Manual TM Revision 1.0, January 2009 Part Number 82-000217-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 Copyright Information © 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc. Trademark and Service Mark Notice The Analog Devices icon bar and logo, VisualDSP++, the VisualDSP++ logo, Blackfin, the Blackfin logo, the CROSSCORE logo, EZ-KIT Lite, and EZ-Extender are registered trademarks of Analog Devices, Inc. EZ-Board is a trademark of Analog Devices, Inc. All other brand and product names are trademarks or service marks of their respective owners. Regulatory Compliance The ADSP-BF518F EZ-Board is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end product or as a portion of a consumer end product. The board is an open system design which does not include a shielded enclosure and therefore may cause interference to other electrical devices in close proximity. This board should not be used in or near any medical equipment or RF devices. The ADSP-BF518F EZ-Board is currently being processed for certification that it complies with the essential requirements of the European EMC directive 89/336/EEC amended by 93/68/EEC and therefore carries the “CE” mark. The EZ-Board evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-Board boards in the protective shipping package. CONTENTS PREFACE Purpose of This Manual .................................................................. xv Intended Audience .......................................................................... xv Manual Contents ........................................................................... xvi What’s New in This Manual ........................................................... xvi Technical or Customer Support ..................................................... xvii Supported Processors ..................................................................... xvii Product Information .................................................................... xviii Analog Devices Web Site ........................................................ xviii VisualDSP++ Online Documentation ....................................... xix Technical Library CD ............................................................... xix Related Documents ................................................................... xx Notation Conventions .................................................................... xxi USING ADSP-BF518F EZ-BOARD Package Contents .......................................................................... 1-3 Default Configuration ................................................................... 1-4 EZ-Board Installation ................................................................... 1-4 EZ-Board Session Startup .............................................................. 1-6 ADSP-BF518F EZ-Board Evaluation System Manual v CONTENTS Evaluation License Restrictions ..................................................... 1-8 Memory Map ............................................................................... 1-9 SDRAM Interface ....................................................................... 1-11 Parallel Flash Memory Interface .................................................. 1-11 eMMC Interface ......................................................................... 1-12 SD Interface ............................................................................... 1-13 SPI Interface .............................................................................. 1-13 Parallel Peripheral Interface (PPI) ................................................ 1-15 Rotary Encoder Interface ............................................................ 1-15 Ethernet Interface ....................................................................... 1-16 Audio Interface ........................................................................... 1-17 ADC Interface ............................................................................ 1-18 UART Interface .......................................................................... 1-19 RTC Interface ............................................................................ 1-20 LEDs and Push Buttons .............................................................. 1-21 JTAG Interface ........................................................................... 1-22 Land Grid Array ......................................................................... 1-22 Expansion Interface II ................................................................. 1-23 Power Measurements .................................................................. 1-24 Power-On-Self Test ..................................................................... 1-24 Example Programs ...................................................................... 1-25 Background Telemetry Channel .................................................. 1-25 Reference Design Information ..................................................... 1-25 vi ADSP-BF518F EZ-Board Evaluation System Manual CONTENTS ADSP-BF518F EZ-BOARD HARDWARE REFERENCE System Architecture ...................................................................... 2-2 Programmable Flags ...................................................................... 2-3 Push Button and Switch Settings ................................................... 2-7 Boot Mode Select Switch (SW1) .............................................. 2-8 PB Enable Switch (SW2) ......................................................... 2-8 Flash Enable Switch (SW3) ...................................................... 2-9 SPORT1 Enable Switch (SW4) ................................................ 2-9 MIC Gain Switch (SW5) ....................................................... 2-10 Mic/HP LPBK, Audio Mode Switch (SW6) ........................... 2-10 Ethernet Port 1 Configuration Switch (SW7) ......................... 2-11 Ethernet Configuration Switch (SW8) ................................... 2-11 UART Setup Switch (SW10) ................................................. 2-12 Reset Push Button (SW11) .................................................... 2-12 Programmable Flag Push Buttons (SW12–13) ........................ 2-12 Rotary Encoder with Momentary Switch (SW14) .................. 2-13 SPORT0 ENBL Switch (SW15) ............................................. 2-13 SPI/TWI Switch (SW16) ....................................................... 2-13 Ethernet Mode Switch (SW17) .............................................. 2-14 Ethernet Port 2 Configuration Switch (SW18) ....................... 2-14 Encoder Enable Switch (SW19) ............................................. 2-14 eMMC Enable Switch (SW20–21) ......................................... 2-15 ADC Loopback Switches (SW22–23) ..................................... 2-15 Jumpers ...................................................................................... 2-16 ADSP-BF518F EZ-Board Evaluation System Manual vii CONTENTS Flash WP Jumper (JP3) ......................................................... 2-17 ADC Range Jumper (JP4) ..................................................... 2-17 LED Select Jumpers (JP11–12) ............................................. 2-17 Ethernet Power Down Jumper (JP13) .................................... 2-17 OTP Flag Enable Jumper (JP14) ........................................... 2-18 MIC Select Jumper (JP15) .................................................... 2-18 SPI FLASH CS Enable Jumper (JP16) ................................... 2-18 ADC Channel Select Jumpers (JP17–28) ............................... 2-19 VDDINT Power Jumper (P8) ............................................... 2-19 VDDEXT Power Jumper (P9) ............................................... 2-19 VDDMEM Power Jumper (P10) ........................................... 2-20 VDDFLASH Power Jumper (P11) ......................................... 2-20 LEDs ......................................................................................... 2-21 GPIO LEDs (LED1–3) ......................................................... 2-22 Ethernet LEDs (LED4–8, LED10–12) .................................. 2-22 Reset LED (LED9) ............................................................... 2-22 Power LED (LED13) ............................................................ 2-23 Connectors ................................................................................. 2-24 Expansion Interface II Connector (J1) ................................... 2-25 RS-232 Connector (J2) ......................................................... 2-25 Power Connector (J3) ........................................................... 2-25 Dual Audio Connectors (J4–5) .............................................. 2-26 SMA Connectors (J7, J16–26) .............................................. 2-26 Battery Holder (J12) ............................................................. 2-26 viii ADSP-BF518F EZ-Board Evaluation System Manual CONTENTS SD Connector (J13) .............................................................. 2-26 Ethernet Connectors (J14–15) ............................................... 2-27 JTAG Connector (P1) ........................................................... 2-27 Expansion Interface II Connectors (P2 and P4) ...................... 2-27 Expansion Interface II Connector (P3) ................................... 2-28 DMAX Land Grid Array Connectors (P5–7) .......................... 2-28 Standalone Debug Agent Connector (ZP1) ............................ 2-29 ADSP-BF518F EZ-BOARD BILL OF MATERIALS ADSP-BF518F EZ-BOARD SCHEMATIC Title Page .................................................................................... B-1 Processor EBIU and Control ........................................................ B-2 Processor Power, Bypass Caps ....................................................... B-3 External Memory ......................................................................... B-4 ADC ........................................................................................... B-5 Audio Codec ................................................................................ B-6 Ethernet Switch ........................................................................... B-7 Ethernet Config/LEDs ................................................................. B-8 Ethernet Jacks .............................................................................. B-9 Rotary Encoder, JTAG, RS-232, RSI .......................................... B-10 Logic Analyzer Conn .................................................................. B-11 Push Buttons, Reset, LEDs ......................................................... B-12 Expansion Interface .................................................................... B-13 OTP and Dual Power ................................................................. B-14 ADSP-BF518F EZ-Board Evaluation System Manual ix CONTENTS Power ......................................................................................... B-15 Series Terminators ...................................................................... B-16 INDEX x ADSP-BF518F EZ-Board Evaluation System Manual PREFACE Thank you for purchasing the ADSP-BF518F EZ-Board™, Analog Devices, Inc. evaluation system for Blackfin® processors. Blackfin processors embody a new type of embedded processor designed specifically to meet the computational demands and power constraints of today’s embedded audio, video, and communications applications. They deliver breakthrough signal-processing performance and power efficiency within a reduced instruction set computing (RISC) programming model. Blackfin processors support a media instruction set computing (MISC) architecture. This architecture is the natural merging of RISC, media functions, and digital signal processing (DSP) characteristics. Blackfin processors deliver signal-processing performance in a microprocessor-like environment. Based on the Micro Signal Architecture (MSA), Blackfin processors combine a 32-bit RISC instruction set, dual 16-bit multiply accumulate (MAC) DSP functionality, and eight-bit video processing performance that had previously been the exclusive domain of very-long instruction word (VLIW) media processors. ADSP-BF518F EZ-Board Evaluation System Manual xi The evaluation board is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of the ADSP-BF518F Blackfin processors. The VisualDSP++ development environment aids advanced application code development and debug, such as: • Create, compile, assemble, and link application programs written in C++, C, and ADSP-BF518F assembly • Load, run, step, halt, and set breakpoints in application programs • Read and write data and program memory • Read and write core and peripheral registers • Plot memory Access to the ADSP-BF518F processor from a personal computer (PC) is achieved through a USB port or an external JTAG emulator. The USB interface of the standalone debug agent gives unrestricted access to the ADSP-BF518F processor and evaluation board’s peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. To learn more about Analog Devices emulators and processor development tools, go to http://www.analog.com/dsp/tools/. The ADSP-BF518F EZ-Board provides example programs to demonstrate the capabilities of the product. ADSP-BF518F EZ-Board installation is part of the VisuL The alDSP++ installation. As an EZ-KIT Lite, an EZ-Board is a licensed product that offers an unrestricted evaluation license for the first 90 days. For details about evaluation license restrictions after the 90 days, refer to “Evaluation License Restrictions” on page 1-8 and the VisualDSP++ Installation Quick Reference Card. xii ADSP-BF518F EZ-Board Evaluation System Manual Preface The board features: • Analog Devices ADSP-BF518F Blackfin processor D Core performance up to 400 MHz D External bus performance up to 80 MHz D 176-pin LQFP package D 25 MHz crystal • Programmable VDDINT core power • D Analog Devices AD5258 TWI digital potentiometer D Analog Devices ADP1715 low dropout linear regulator Synchronous dynamic random access memory (SDRAM) D Micron MT48LC32M16A2TG – 64 MB (32M x 16-bits) • Parallel flash memory D Numonyx M29W320EB – 4 MB (2M x 16-bits) • eMMC flash memory D Micron MTFC2GDKDM – 2 GB • SPI flash memory D Numonyx M25P16 – 16 Mb • Analog audio interface D Analog Devices SSM2602 low-power audio codec D One stereo LINE D One headphone LINE D One input MIC jack D One input stereo LINE OUT jack IN IN jack ADSP-BF518F EZ-Board Evaluation System Manual xiii • Ethernet interface D Micrel KSZ8893M PHY device D 10-BaseT and 100-BaseTX Ethernet controller D Auto-MDIX • ADC interface D Analog Devices AD7266 2 MSPS, 12-bit, 3-channel SAR analog-to-digital converter • Thumbwheel D Panasonic EVQ-WKA001 rotary encoder • Universal asynchronous receiver/transmitter (UART) D ADM3202 RS-232 line driver/receiver D DB9 female connector • LEDs D Thirteen LEDs: one board reset (red), three general-purpose (amber), eight configurable ethernet LEDs (amber) and one power (green) • Push buttons D Three push buttons: one reset, two programmable flags with debounce logic • Expansion interface II™ D Next generation of the expansion interface design, provides access to most of the ADSP-BF518F processor signals • Land grid array D xiv Easy probing of all port pins and most EBIU signals ADSP-BF518F EZ-Board Evaluation System Manual Preface • Other features D JTAG ICE 14-pin header D Blackfin power measurement jumpers For information about the hardware components of the EZ-Board, refer to “ADSP-BF518F EZ-Board Hardware Reference” on page 2-1. Purpose of This Manual The ADSP-BF518F EZ-Board Evaluation System Manual provides instructions for installing the product hardware (board). The text describes operation and configuration of the board components and provides guidelines for running your own code on the ADSP-BF518F EZ-Board. Finally, a schematic and a bill of materials are provided as a reference for future designs. The product software installation is detailed in the VisualDSP++ Installation Quick Reference Card. Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual, but should supplement it with other texts (such as the ADSP-BF51x Blackfin Processor Hardware Reference and Blackfin Processor Instruction Set Reference) that describe your target architecture. Programmers who are unfamiliar with VisualDSP++ should refer to the VisualDSP++ online Help and user’s or getting started guides. For the locations of these documents, see “Related Documents”. ADSP-BF518F EZ-Board Evaluation System Manual xv Manual Contents Manual Contents The manual consists of: • Chapter 1, “Using ADSP-BF518F EZ-Board” on page 1-1 Describes EZ-Board functionality from a programmer’s perspective and provides an easy-to-access memory map. • Chapter 2, “ADSP-BF518F EZ-Board Hardware Reference” on page 2-1 Provides information on the EZ-Board hardware components. • Appendix A, “ADSP-BF518F EZ-Board Bill Of Materials” on page A-1 Provides a list of components used to manufacture the EZ-Board. • Appendix B, “ADSP-BF518F EZ-Board Schematic” on page B-1 Provides the resources to allow EZ-Board board-level debugging or to use as a reference design. Appendix B is part of the online Help. What’s New in This Manual This is the first revision of the ADSP-BF518F EZ-Board Evaluation System Manual. xvi ADSP-BF518F EZ-Board Evaluation System Manual Preface Technical or Customer Support You can reach Analog Devices, Inc. Customer Support in the following ways: • Visit the Embedded Processing and DSP products Web site at http://www.analog.com/processors/technical_support • E-mail tools questions to [email protected] • E-mail processor questions to [email protected] (World wide support) [email protected] (Europe support) [email protected] (China support) • Phone questions to 1-800-ANALOGD • Contact your Analog Devices, Inc. local sales office or authorized distributor • Send questions by mail to: Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA Supported Processors This evaluation system supports Analog Devices ADSP-BF518F Blackfin embedded processors. ADSP-BF518F EZ-Board Evaluation System Manual xvii Product Information Product Information Product information can be obtained from the Analog Devices Web site, VisualDSP++ online Help system, and a technical library CD. Analog Devices Web Site The Analog Devices Web site, www.analog.com, provides information about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors. To access a complete technical library for each processor family, go to http://www.analog.com/processors/technical_library. The manuals selection opens a list of current manuals related to the product as well as a link to the previous revisions of the manuals. When locating your manual title, note a possible errata check mark next to the title that leads to the current correction report against the manual. Also note, MyAnalog.com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information about products you are interested in. You can choose to receive weekly e-mail notifications containing updates to the Web pages that meet your interests, including documentation errata against all manuals. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more. Visit MyAnalog.com to sign up. If you are a registered user, just log on. Your user name is your e-mail address. xviii ADSP-BF518F EZ-Board Evaluation System Manual Preface VisualDSP++ Online Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, Dinkum Abridged C++ library, and FLEXnet License Tools software documentation. You can search easily across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary Portable Documentation Format (.pdf) files for all manuals are provided on the VisualDSP++ installation CD. Each documentation file type is described as follows. File Description .chm Help system files and manuals in Microsoft help format .htm or .html Dinkum Abridged C++ library and FLEXnet License Tools software documentation. Viewing and printing the .html files requires a browser, such as Internet Explorer 6.0 (or higher). .pdf VisualDSP++ and processor manuals in PDF format. Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher). Technical Library CD The technical library CD contains seminar materials, product highlights, a selection guide, and documentation files of processor manuals, VisualDSP++ software manuals, and hardware tools manuals for the following processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and ADSP-219x. To order the technical library CD, go to http://www.analog.com/procesnavigate to the manuals page for your processor, click the request CD check mark, and fill out the order form. sors/technical_library, ADSP-BF518F EZ-Board Evaluation System Manual xix Product Information Data sheets, which can be downloaded from the Analog Devices Web site, change rapidly, and therefore are not included on the technical library CD. Technical manuals change periodically. Check the Web site for the latest manual revisions and associated documentation errata. Related Documents For information on product related development software, see the following publications. Table 1. Related Processor Publications Title Description ADSP-BF512/ADSP-BF514/ADSP-BF516/ADSP- General functional description, pinout, and BF518 Blackfin Embedded Processor Preliminary timing of the processor. Data Sheet ADSP-BF51x Blackfin Processor Hardware Reference Description of internal processor architecture and all register functions. Blackfin Processor Programming Reference Description of all allowed processor assembly instructions. Table 2. Related VisualDSP++ Publications xx Title Description ADSP-BF518F EZ-Board Evaluation System Manual Description of the hardware capabilities of the evaluation system; description of how to access these capabilities in the VisualDSP++ environment. VisualDSP++ User’s Guide Description of VisualDSP++ features and usage. VisualDSP++ Assembler and Preprocessor Manuals Description of the assembler function and commands. VisualDSP++ C/C++ Complier and Library Manual for Blackfin Processors Description of the complier function and commands for Blackfin processors. ADSP-BF518F EZ-Board Evaluation System Manual Preface Table 2. Related VisualDSP++ Publications (Cont’d) Title Description VisualDSP++ Linker and Utilities Manual Description of the linker function and commands. VisualDSP++ Loader and Utilities Manual Description of the loader/splitter function and commands. VisualDSP++ Device Drivers and System Services Manual for Blackfin Processors Description of the device drivers’ and system services’ functions and commands. Notation Conventions Text conventions used in this manual are identified and described as follows. Example Description Close command (File menu) Titles in reference sections indicate the location of an item within the VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu). {this | that} Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars; read the example as this or that. One or the other is required. [this | that] Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that. [this,…] Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an optional comma-separated list of this. .SECTION Commands, directives, keywords, and feature names are in text with letter gothic font. filename Non-keyword placeholders appear in text with italic style format. ADSP-BF518F EZ-Board Evaluation System Manual xxi Notation Conventions Example L a [ xxii Description Note: For correct operation, ... A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol. Caution: Incorrect device operation may result if ... Caution: Device damage may result if ... A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol. Warning: Injury to device users may result if ... A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users. In the online version of this book, the word Warning appears instead of this symbol. ADSP-BF518F EZ-Board Evaluation System Manual 1 USING ADSP-BF518F EZ-BOARD This chapter provides specific information to assist you with development of programs for the ADSP-BF518F EZ-Board evaluation system. The following topics are covered. • “Package Contents” on page 1-3 • “Default Configuration” on page 1-4 • “EZ-Board Installation” on page 1-4 • “EZ-Board Session Startup” on page 1-6 • “Evaluation License Restrictions” on page 1-8 • “Memory Map” on page 1-9 • “SDRAM Interface” on page 1-11 • “Parallel Flash Memory Interface” on page 1-11 • “eMMC Interface” on page 1-12 • “SPI Interface” on page 1-13 • “Parallel Peripheral Interface (PPI)” on page 1-15 • “Rotary Encoder Interface” on page 1-15 • “Ethernet Interface” on page 1-16 • “Audio Interface” on page 1-17 ADSP-BF518F EZ-Board Evaluation System Manual 1-1 • “ADC Interface” on page 1-18 • “UART Interface” on page 1-19 • “RTC Interface” on page 1-20 • “LEDs and Push Buttons” on page 1-21 • “JTAG Interface” on page 1-22 • “Land Grid Array” on page 1-22 • “Expansion Interface II” on page 1-23 • “Power Measurements” on page 1-24 • “Power-On-Self Test” on page 1-24 • “Example Programs” on page 1-25 • “Background Telemetry Channel” on page 1-25 • “Reference Design Information” on page 1-25 For information about VisualDSP++, including the boot loading, target options, and other facilities, refer to the online Help. For more information about the ADSP-BF518F Blackfin processor, see documents referred to as “Related Documents”. 1-2 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board Package Contents Your ADSP-BF518F EZ-KIT Lite evaluation system package contains the following items. • ADSP-BF518F EZ-Board • VisualDSP++ Installation Quick Reference Card • CD containing: D VisualDSP++ software D ADSP-BF518F EZ-Board debug software D USB driver files D Example programs D ADSP-BF518F EZ-Board Evaluation System Manual • Universal 5.0V DC power supply • 256 MB SD card • 7-foot Ethernet patch cable • Two 6-foot 3.5 mm male-to-male audio cables • 18-inch SMA to SMA coaxial cable If any item is missing, contact the vendor where you purchased your EZ-Board or contact Analog Devices, Inc. ADSP-BF518F EZ-Board Evaluation System Manual 1-3 Default Configuration Default Configuration The ADSP-BF518F EZ-Board board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your computer case. The EZ-Board evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-Board in the protective shipping package. When removing the EZ-Board from the package, handle the board carefully to avoid the discharge of static electricity, which can damage some components. Figure 1-1 shows the default jumper and switch settings, connector locations, and LEDs used in installation. Confirm that your board is in the default configuration before using the board. EZ-Board Installation For correct operation, install the software in the order presented in the VisualDSP++ Installation Quick Reference Card. Substitute instructions in step 3 with instructions in this section. There are two options to connect the EZ-Board hardware to a personal computer (PC) running VisualDSP++ 5.0: via an Analog Devices emulator or via a standalone debug agent module. The standalone debug agent allows a debug agent to interface to the ADSP-BF518F EZ-Board. The standalone debug agent is shipped with the kit. 1-4 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board Figure 1-1. Default EZ-Board Hardware Setup ADSP-BF518F EZ-Board Evaluation System Manual 1-5 EZ-Board Session Startup To connect the EZ-Board to a PC via an emulator: 1. Plug the 5V adaptor into connector J3 (labeled 5V). 2. Attach the emulator header to connector P1 (labeled JTAG) on the back side of the EZ-Board. To connect the EZ-Board to a PC via a standalone debug agent: The debug agent can be used only when power is supplied from the a wall adaptor. 1. Attach the standalone debug agent to connectors P1 (labeled JTAG) and ZP1 on the backside of the EZ-Board, watching for the keying pin of P1 to connect correctly. Plug the 5V adaptor into connector J3 (labeled 5V). 2. Plug one side of the provided USB cable into the USB connector of the standalone debug agent. Plug the other side of the cable into a USB port of the PC running VisualDSP++ 5.0 update 5 or later. 3. Verify that the yellow USB monitor LED on the standalone debug agent (LED4, located on the back side of the board) is lit. This signifies that the board is communicating properly with the host PC and ready to run VisualDSP++. EZ-Board Session Startup 1. If you are running VisualDSP++ for the first time, navigate to the VisualDSP++ environment via the Start–>Programs menu. The main window appears. Note that VisualDSP++ is not connected to any session. Skip the rest of this step to step 2. If you have run VisualDSP++ previously, the last opened session appears on the screen. You can override the default behavior and force VisualDSP++ to start a new session by pressing and holding 1-6 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board down the Ctrl key while starting VisualDSP++. Do not release the Ctrl key until the Session Wizard appears on the screen. Go to step 3. 2. To connect to a new EZ-KIT Lite session, start Session Wizard by selecting one of the following. • From the Session menu, New Session. • From the Session menu, Session List. Then click New Session from the Session List dialog box. • From the Session menu, Connect to Target. 3. The Select Processor page of the wizard appears on the screen. Ensure Blackfin is selected in Processor family. In Choose a target processor, select ADSP-BF518F. Click Next. 4. The Select Connection Type page of the wizard appears on the screen. For standalone debug agent connection, select EZ-KIT Lite and click Next. For emulator connection select Emulator, and click Next 5. The Select Platform page of the wizard appears on the screen. For standalone debug agent connection, ensure that the selected platform is ADSP-BF518F EZ-KIT Lite via Debug Agent. For emulator connection, choose the type of emulator that is connected. Specify your own Session name for the session or accept the default name. The session name can be a string of any length; although, the box displays approximately 32 characters. The session name can include space characters. If you do not specify a session name, VisualDSP++ creates a session name by combining the name of the selected platform with the selected processor. The only way to change a session name later is to delete the session and open a new ADSP-BF518F EZ-Board Evaluation System Manual 1-7 Evaluation License Restrictions session. Click Next. 6. The Finish page of the wizard appears on the screen. The page displays your selections. Check the selections. If you are not satisfied, click Back to make changes; otherwise, click Finish. VisualDSP++ creates the new session and connects to the EZ-Board. Once connected, the main window’s title is changed to include the session name set in step 5. disconnect from a session, click the disconnect button L Toor select Session–>Disconnect from Target. To delete a session, select Session –> Session List. Select the session name from the list and click Delete. Click OK. Evaluation License Restrictions The ADSP-BF518F EZ-Board installation is part of the VisualDSP++ installation. The EZ-Board is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial unrestricted 90-day evaluation license expires: • VisualDSP++ restricts a connection to the ADSP-BF518F EZ-Board via the USB port of the standalone debug agent interface only. Connections to simulators and emulation products are no longer allowed. • The linker restricts a user’s program to 20 KB of memory for code space with no restrictions for data space. • The EZ-Board hardware must be connected and powered up to use VisualDSP++ with a valid evaluation or permanent license. Refer to the VisualDSP++ Installation Quick Reference Card for details. 1-8 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board Memory Map The ADSP-BF518F processor has internal static random access memory (SRAM) used for instructions and data storage. See Table 1-1. The internal memory details can be found in the ADSP-BF51x Blackfin Processor Hardware Reference. The ADSP-BF518F EZ-Board includes four types of external memory: synchronous dynamic random access memory (SDRAM), serial peripheral interconnect (SPI) flash, parallel flash, and eMMC. See Table 1-2. For more information about a specific memory type, go to the respective section in this chapter. Table 1-1. EZ-Board Internal Memory Map Start Address Content 0xEF00 0000 BOOT ROM (32K BYTE) 0xEF00 8000 Reserved 0xFF80 0000 DATA BANKA SRAM (16K BYTE) 0xFF80 4000 DATA BANKA SRAM/CACHE (16K BYTE) 0xFF80 8000 Reserved 0xFF90 0000 DATA BANKB SRAM (16K BYTE) 0xFF90 4000 DATA BANKB SRAM/CACHE (16K BYTE) 0xFF90 8000 Reserved 0xFFA0 0000 INSTRUCTION BANK A SRAM (16K BYTE) 0xFFA0 4000 Reserved 0xFFA0 8000 INSTRUCTION BANK B SRAM (16 BYTE) 0xFFA0 C000 Reserved 0xFFA1 0000 INSTRUCTION SRAM/CACHE (16K BYTE) 0xFFA1 4000 Reserved ADSP-BF518F EZ-Board Evaluation System Manual 1-9 Memory Map Table 1-1. EZ-Board Internal Memory Map (Cont’d) Start Address Content 0xFFB0 0000 SCRATCHPAD SRAM (4K BYTE) 0xFFB0 1000 Reserved 0xFFC0 0000 SYSTEM MMR REGISTERS 0xFFE0 0000 CORE MMR REGISTERS Table 1-2. EZ-Board External Memory Map Start Address End Address Content 0x0000 0000 0x03FF FFFF SDRAM (SDRAM) 0x0800 0000 0x1FFF FFFF Reserved 0x2000 0000 0x200F FFFF ASYNC memory bank 0 (flash) 0x2010 0000 0x201F FFFF ASYNC memory bank 1 (flash) 0x2020 0000 0x202F FFFF ASYNC memory bank 2 (flash) 0x2030 0000 0x203F FFFF ASYNC memory bank 3 (flash) 0x2040 0000 0xEEFF FFFF Reserved 1-10 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board SDRAM Interface The ADSP-BF518F processor connects to a 64 MB Micron MT48LC32M16A2TG-75 chip through the external bus interface unit (EBIU). The SDRAM chip can operate at a maximum clock frequency of 80 MHz, which is the ADSP-BF518F processor limitation. With a VisualDSP++ session running and connected to the EZ-Board via the USB standalone debug agent, the SDRAM registers are configured automatically each time the processor is reset. The values are used whenever SDRAM is accessed through the debugger (for example, when viewing memory windows or loading a program). To disable the automatic setting of the SDRAM registers, select Target Options from the Settings menu in VisualDSP++ and uncheck Use XML reset values. For more information on changing the reset values, refer to the online Help. An example program is included in the EZ-Board installation directory to demonstrate how to setup and access the SDRAM interface. For more information on how to initialize the registers after a reset, search the VisualDSP++ online Help for “reset values”. Parallel Flash Memory Interface The parallel flash memory interface of the ADSP-BF518F EZ-Board contains a 4 MB (2M x 16 bits) Numonyx M29W320EB chip. Flash memory connects to the 16-bit data bus and address lines 1 through 19. Chip enable is decoded by the AMS0—3 select lines through NAND and AND gates. The address range for flash memory is 0x2000 0000 to 0x203F FFFF. ADSP-BF518F EZ-Board Evaluation System Manual 1-11 eMMC Interface Flash memory is pre-loaded with boot code for the power-on-self test (POST) program. For more information, refer to “Power-On-Self Test” on page 1-24. Flash memory also is preloaded with configuration flash information, which contains board revision, BOM revision, and other data. By default, the EZ-Board boots from the 16-bit parallel flash memory. The processor boots from flash memory if the boot mode select switch (SW1) is set to position 1 (see “Boot Mode Select Switch (SW1)” on page 2-8). Flash memory code can be modified. For instructions, refer to the online Help and example program included in the EZ-Board installation directory. For more information about the parallel flash device, refer to the Numonyx Web site: http://www.numonyx.com/. eMMC Interface The ADSP-BF518F processor is equipped with a removable storage interface (RSI), which allows the 2 Gb Micron eMMC device to be attached gluelessly to the processor. The eMMC device is attached via the processor’s specific RSI control and data lines. The eMMC device shares pins with the secure digital (SD) interface, push buttons, analog-to-digital converter (ADC) and expansion interface II. The RSI signals can be disconnected from the eMMC device by turning switches SW20 and SW21 all OFF. See “eMMC Enable Switch (SW20–21)” on page 2-15 for more information. For more information about the eMMC device, refer to the Micron Web site: http://www.micron.com/. An example program is included in the EZ-Board installation directory to demonstrate how to setup and access the eMMC device. 1-12 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board SD Interface The ADSP-BF518F processor has a secure digital interface. The SD interface consists of a clock pin, a command pin, and a four-bit data bus. The SD interface of the processor connects gluelessly to the on-board SD connector. The SD interface is attached via the processor’s specific RSI control and data lines. The interface shares pins with the eMMC interface, codec, and expansion interface II. The memory can be written to in both one-bit and four-bit modes. For more information, refer to “SD Connector (J13)” on page 2-26. An example program is included in the EZ-Board installation directory to demonstrate how to setup and access the SD interface. SPI Interface The ADSP-BF518F processor has two serial peripheral interface (SPI) ports with multiple chip select lines. The SPI0 port connects directly to serial flash memory, audio codec, Ethernet IC, and the expansion interface II. Serial flash memory is a 16 Mb ST M25P16 device, which is selected using the SPISEL2 line of the processor. SPI flash memory is factory programmed with Das U-Boot—the universal boot loader. Das U-Boot (U-Boot for short) is open source firmware for embedded processors, including the ADSP-BF518F Blackfin processors. U-Boot can load files from a variety of peripherals, such as a serial connection, an Ethernet network connection, or flash memories. U-Boot is executed at system reset, which automatically loads up another application (such as the Linux kernel or a stand alone application). U-Boot can parse many types of files on many types of storage devices. ADSP-BF518F EZ-Board Evaluation System Manual 1-13 SPI Interface U-Boot is controlled via a serial connection. The default setting is 56700 baud, 8 data bits, No parity, 1 stop bit. See “RS-232 Connector (J2)” on page 2-25 for information on the serial connector. For more information about U-Boot, refer to the online documentation at: http://docs.blackfin.uclinux.org/doku.php?id=bootloaders:u-boot. For U-Boot support on the Blackfin processors, refer to the online help forums at: http://blackfin.uclinux.org/gf/project/u-boot/forum/?action=ForumBrowse&foru m_id=51. SPI flash can be modified. For instructions, refer to the VisualDSP++ online Help, example program included in the EZ-Board installation directory, and U-Boot documentation. U-Boot includes an SPI flash driver and can be used to download a new file over Ethernet or serial connection, and write the file to SPI flash. By default, the EZ-Board boots from the 16-bit flash parallel memory. SPI flash can be selected as the boot source by setting the boot mode select switch (SW1) to position 3. See “Boot Mode Select Switch (SW1)” on page 2-8. The audio codec is set up to use the SPISEL3 signal as the SPI chip select. The chip select is shared with the CUD signal. For more information, refer to “Audio Interface” on page 1-17. The Ethernet IC is set up to use the SPISEL1 signal as the SPI chip select. For more information, refer to “Ethernet Interface” on page 1-16. 1-14 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board Parallel Peripheral Interface (PPI) The ADSP-BF518F processor provides a parallel peripheral interface (PPI), supporting data widths up to 16 bits. The PPI interface provides three multiplexed frame syncs, a multiplexed clock, and 16 multiplexed data lines. The full PPI port is accessible on the expansion interface II connector (P3). See “Expansion Interface II Connector (P3)” on page 2-28. The PPI signals connect to multi-functional pins. The PPI is shared with the on-board codec, eMMC, SD, and Ethernet IC. To use the PPI on the expansion interface, disable the codec by turning switch SW15 to all OFF (see “SPORT0 ENBL Switch (SW15)” on page 2-13). The eMMC is disabled by turning switches SW20 and SW21 to all OFF, and the SPI flash is disabled by removing the jumper from JP16. See “eMMC Enable Switch (SW20–21)” on page 2-15 and “SPI FLASH CS Enable Jumper (JP16)” on page 2-18. The PPI is not used on the EZ-Board, the PPI is intended for use on the expansion interface II. Rotary Encoder Interface The ADSP-BF518F processor has a built-in, up-down counter with support for a rotary encoder. The three-wire rotary encoder interface connects to the thumbwheel rotary switch (SW19) and expansion interface II. The rotary encoder can be turned clockwise for the up function, counter clockwise for the down function, or can be pushed towards the center of the board to clear the counter. The rotary switch is a two-bit quadrature (gray code) counter with a detent, meaning that both the down signal (CDG) and up signal (CUD) toggle when the count register increases on a rotation to the right. Upon rotating to the left, CDG and CUD toggle, and the overall count decreases. ADSP-BF518F EZ-Board Evaluation System Manual 1-15 Ethernet Interface If the processor pins are needed for the expansion interface II, disconnect the rotary encoder switch via the three-position rotary enable switch (SW19). For more information, see “Encoder Enable Switch (SW19)” on page 2-14. An example program is included in the EZ-Board installation directory to demonstrate how to set up and access the rotary encoder interface. Ethernet Interface The ADSP-BF518F processor has an integrated Ethernet MAC with media independent interface (MII) which connects to an external PHY. The EZ-Board provides a Micrel KSZ8893M Integrated 3-Port 10/100 Managed Switch with PHYs, fully compliant with IEEE 802.3u standards. The KSZ8893M chip supports 10BASE-T and 100BASE-TX operations. The part is attached gluelessly to the processor. The Ethernet signals are shared with the PPI signals connected to the expansion interface II. The Ethernet mode is set by three switches. Switch SW7 controls the configuration of the port 1 connector. SW7 configures the flow control, duplex, speed, and auto-negotiation. Switch SW18 controls the configuration of the port 2 connector. SW18 configures the flow control, duplex, speed, auto-negotiation, auto MDI/MDI-X, and MDI/MDI-X settings. Switch SW8 controls the Ethernet IC configuration. SW8 configures the flow control, hardware pin overwrite, and serial bus mode. See “Ethernet Port 1 Configuration Switch (SW7)” on page 2-11, “Ethernet Port 2 Configuration Switch (SW18)” on page 2-14, and “Ethernet Configuration Switch (SW8)” on page 2-11 for more information. The Ethernet chip is pre-loaded with a MAC address. The MAC address for the EZ-Board is stored in the configuration flash section of the parallel flash memory and can be found on a sticker on the bottom side of the board. 1-16 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board The PHY portion of the Ethernet chip connects to a Pulse HX1188 magnetics, then to standard RJ-45 Ethernet connectors (J14 and J15). For more information, see “Ethernet Connectors (J14–15)” on page 2-27. Example programs are included in the EZ-Board installation directory to demonstrate how to use the Ethernet interface. Audio Interface The audio interface of the EZ-Board consists of a low-power stereo codec, SSM2602, with an integrated headphone driver and associated passive components. There are two inputs, a stereo line in, and a mono microphone, as well as two outputs, a headphone, and a stereo line out. The codec has integrated stereo ADCs, digital-to-analog converters (DACs), and requires minimal external circuitry. The codec connects to the ADSP-BF518F processor via the processor’s serial port 0. The SPORT0 is disconnected from the codec by turning switch SW15 OFF, which enables SPORT0 for the SD/eMMC interface or the expansion interface II. See “SPORT0 ENBL Switch (SW15)” on page 2-13 for more information. The control interface of the codec is selected by switching SW16 between the 2-wire interface (TWI) and SPI. The board’s default is SPI mode. Refer to“SPI/TWI Switch (SW16)” on page 2-13 for more information. Mic gain values of 14 dB, 0 dB, or –6 dB are selectable through switch SW5. For more information, see “MIC Gain Switch (SW5)” on page 2-10. Microphone bias is provided through a low-noise reference voltage. A jumper on positions 2&3 of JP15 connects the MICBIAS signal to the audio jack. Placing a jumper on positions 1&2 of JP15 connects the bias directly to the mic signal. For more information, see “MIC Select Jumper (JP15)” on page 2-18. ADSP-BF518F EZ-Board Evaluation System Manual 1-17 ADC Interface and J5 are 3.5 mm connectors for the audio portion of the board. J5 connects the mic on the top portion and line-in on the bottom. J4 connects the headphone on the top portion and line-out on the bottom. If there is no 3.5 mm cable plugged into the bottom of either J4 or J5, the signals are looped back inside the connector. For more information, see “Dual Audio Connectors (J4–5)” on page 2-26. J4 For testing, SW6 positions 1&2 connect the MICIN signal to either the left or right headphone. Do not connect the left and right to the MICIN signal at the same time—only position 1 or 2 of SW6 should be ON at the same time. For more information, see “Mic/HP LPBK, Audio Mode Switch (SW6)” on page 2-10. The EZ-Board is shipped with two 3.5 mm cables, which allow you to run the example programs provided in the EZ-Board installation directory and learn about the audio interface. ADC Interface The ADC interface of the EZ-Board consists of a dual, 12-bit, high-speed, low-power, successive approximation analog-to-digital converter. The device contains two converters, each preceded by a 3-channel multiplexer, a low-noise, wide-bandwidth track, and holds an amplifier that can handle input frequencies in excess of 30 MHz. There are four differential and four single-ended inputs on the EZ-Board that are accessed via SMA connectors. The ADC connects to the ADSP-BF518F processor via the processor’s serial port 1. SPORT1 is disconnected from the ADC by turning switch SW4 OFF, which enables SPORT1 for the expansion interface II or for the multi-function pins, in which case the port’s signals can be used for the RSI or as push buttons. See “SPORT1 Enable Switch (SW4)” on page 2-9 for more information. 1-18 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board The ADC range is controlled by jumper JP4. This jumper selects whether the input range for the ADC is 2.5V or 5 V. The max voltage range for a signal connected to the SMA connector is 0–5V. Any voltage outside of this range can damage the EZ-Board. For more information, see “ADC Range Jumper (JP4)” on page 2-17. Jumpers JP17–28 are used to connect the SMA connector to the ADC input. When there is no input connected to the SMA connector, the jumper should have the shunt installed on pins 2&3. This setting connects the signal going to the ADC input to ground and keeps the noise level low. When an input signal is connected to the SMA connector, the shunt should be installed on position 1&2. For more information, see “ADC Channel Select Jumpers (JP17–28)” on page 2-19. For testing, switches SW22–23 connect an audio output signal from the codec to the input channels of the ADC. Do not connect to the SMA connectors and have these switches ON at the same time. For more information, see “Mic/HP LPBK, Audio Mode Switch (SW6)” on page 2-10. UART Interface The ADSP-BF518F processor has two built-in universal asynchronous receiver transmitters (UARTs). UART0—1 share the processor’s pins with other peripherals on the EZ-Board. has full RS-232 functionality via the Analog Devices 3.3V ADM3202 line driver and receiver (U21). When using UART0, do not set switch SW10 position 4 to ON. This setting enables UART loopback and should be installed only when running the POST program. UART0 and UART1 are connected to the expansion interface II connectors. For more information, see “Expansion Interface II Connectors (P2 and P4)” on page 2-27. UART0 ADSP-BF518F EZ-Board Evaluation System Manual 1-19 RTC Interface Example programs are included in the EZ-Board installation directory to demonstrate UART and RS-232 operations. For more information on the UART interface, refer to the ADSP-BF51x Blackfin Processor Hardware Reference. RTC Interface The ADSP-BF518F processor has a real-time clock (RTC) and a watchdog timer. Typically, the RTC interface is used to implement a real-time watchdog or a life counter of the time elapsed since the last system reset. The EZ-Board is equipped with a Panasonic CR1632 lithium coin and 3V battery supplying 125 mAh. The 3V battery and 3.3V supply of the board connect to the RTC power pin of the processor. When the EZ-Board is powered, the RTC circuit uses the board power to supply voltage to the RTC pin. When the EZ-Board is not powered, the RTC circuit uses the lithium battery to maintain power to the RTC pin. After removing the mylar, the battery lasts for about one year with the EZ-Board unpowered. Example programs are included in the EZ-Board installation directory to demonstrate the RTC features. EZ-Board is shipped with a protective Mylar sheet placed L The between the coin battery and positive pin of the battery holder. Remove the Mylar sheet before using the RTC in the processor. For more information on the RTC and watchdog timer, refer to the ADSP-BF51x Blackfin Processor Hardware Reference. 1-20 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board LEDs and Push Buttons The EZ-Board provides two push buttons and three LEDs for general-purpose I/O, as well as two additional push buttons intended for power down and wake functionality, which also can be used as GPIO flag pins. The three LEDs, labeled LED1 through LED3, are accessed via the PH3, PH5, and PH6 pins of the processor (respectively). For information on how to program the flag pins, refer to the ADSP-BF51x Blackfin Processor Hardware Reference. is shared with the ADC_A0, MMC_D7, and OTP_EN signals. LED2 is shared with the CDG and ADC_A1 signals. LED3 is shared with the CZM and ADC_A2 signals. LED1 The LED1—3 signals also connect to the expansion interface II connectors. See “Expansion Interface II Connector (J1)” on page 2-25 and “Expansion Interface II Connectors (P2 and P4)” on page 2-27 for more information. The two general-purpose push buttons are labeled PB1 and PB2. The status of each individual button can be read through programmable flag inputs PH0 and PH1. The flag reads ‘1’ when a corresponding switch is being pressed. When the switch is released, the flag reads ‘0’. A connection between the push buttons and processor inputs is established through positions 1&2 of the DIP switch SW2. Push buttons 1 and 2 of SW2 are used as GPIO signals on the expansion interface II connectors (J1, P2, P4). To use the PH0 and PH1 port pins as GPIO signals on the expansion interface II, turn SW2 to all OFF. is shared with the DR1PRI and MMC_D4 signals. PB2 is shared with the RFS1 and MMC_D5 signals. PB1 An example program is included in the ADSP-BF518F installation directory to demonstrate functionality of the LEDs and push buttons. ADSP-BF518F EZ-Board Evaluation System Manual 1-21 JTAG Interface JTAG Interface The JTAG connector (P1) allows the standalone debug agent to connect a debug session to the ADSP-BF518F processor. The debug agent operates only when the external 5V wall adaptor is used (J3). When operating the EZ-Board from a battery or USB bus power, the debug agent is not powered. The standalone debug agent can be removed, and an external emulator can be attached to the EZ-Board. Be careful not to damage the connectors when removing the debug agent. The emulator connects to P1 on the back side of the board. See “EZ-Board Installation” on page 1-4 for more information. For more information about emulators, contact Analog Devices or go to: http://www.analog.com/processors/blackfin/evaluationDevelopment/crosscore/. Land Grid Array The ADSP-BF518F EZ-Board has provisions for probing every port pin and the EBIU interface of the processor on connectors P5—7. The connector locations are intended for use with a Tektronix DMAX logic analyzer connector, but can be probed with any oscilloscope or logic analyzer. For pinout information, refer to“ADSP-BF518F EZ-Board Schematic” on page B-1. For more information on the Tektronix DMAX logic analyzer interface, go to the Tektronix Web site. 1-22 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board Expansion Interface II The expansion interface II allows an Analog Devices EZ-Extender or a custom-design daughter board to be tested across various hardware platforms that have the same expansion interface. The expansion interface II implemented on the ADSP-BF518F EZ-Board consists of four connectors, three of which are 0.1 in. shrouded headers (P2—4), and the last of which is a Samtec QMS series header (J1). The connectors contain a majority of the ADSP-BF518F processor signals. For pinout information, go to “ADSP-BF518F EZ-Board Schematic” on page B-1. The mechanical dimensions of the expansion connectors can be obtained by contacting Technical or Customer Support. For more information about daughter boards, visit the Analog Devices Web site at: http://www.analog.com/processors/blackfin/evaluationDevelopment/crosscore/. Limits to current and interface speed must be taken into consideration when using the expansion interface II. Current for the expansion interface II is sourced from the EZ-Board; therefore, the current should be limited to 1A for 5V and 500 mA for the 3.3V planes. If more current is required, then a separate power connector and a regulator must be designed on a daughter card. Additional circuitry can add extra loading to signals, decreasing their maximum effective speed. Devices does not support and is not responsible for the L Analog effects of additional circuitry. ADSP-BF518F EZ-Board Evaluation System Manual 1-23 Power Measurements Power Measurements Several locations are provided for measuring the current draw from various power planes. Precision 0.1 ohm shunt resistors are available on the VDDINT, VDDEXT, VDDMEM, and VDDFLASH voltage domains. For current draw measuments, the associated jumper (P8—11) should be removed. Once the jumper is removed, the voltage across the resistor can be measured using an oscilloscope. Once voltage is measured, current can be calculated by dividing the voltage by 0.1. For the highest accuracy, a differential probe should be used for measuring voltage across the resistor. For more information, see “VDDINT Power Jumper (P8)” on page 2-19, “VDDEXT Power Jumper (P9)” on page 2-19, “VDDMEM Power Jumper (P10)” on page 2-20, and “VDDFLASH Power Jumper (P11)” on page 2-20. Power-On-Self Test The power-on-self-test program (POST) tests all EZ-Board peripherals and validates functionality as well as connectivity to the processor. Once assembled, each EZ-Board is fully tested for an extended period of time with a POST. All EZ-Boards are shipped with the POST preloaded into one of its on-board flash memories. The POST is executed by resetting the board and pressing the proper push button(s). The POST also can be used as a reference for a custom software design or hardware troubleshooting. Note that the source code for the POST program is included in the VisualDSP++ installation directory along with the readme text file, which describes how the EZ-Board is configured to run a POST. 1-24 ADSP-BF518F EZ-Board Evaluation System Manual Using ADSP-BF518F EZ-Board Example Programs Example programs are provided with the ADSP-BF518F EZ-Board to demonstrate various capabilities of the product. The programs are installed with the VisualDSP++ software and can be found in the <install_path>\Blackfin\Examples\ADSP-BF518F EZ-Board directory. Refer to the readme file provided with each example for more information. Background Telemetry Channel The USB debug agent supports the background telemetry channel (BTC), which facilitates data exchange between VisualDSP++ and the processor without interrupting processor execution. The BTC allows you to read and write data in real time while the processor continues to execute. For increased performance of the BTC, including faster reading and writing, please check our latest line of processor emulators at: http://www.analog.com/en/embedded-processing-dsp/sharc/USB-EMULATOR/products/product.html. For more information about BTC, see the online help. Reference Design Information A reference design info package is available for download on the Analog Devices Web site. The package provides information on the design, layout, fabrication, and assembly of the EZ-KIT Lite and EZ-Board products. The information can be found at: http://www.analog.com/en/embedded-processing-dsp/content/reference_designs/fca.html. ADSP-BF518F EZ-Board Evaluation System Manual 1-25 Reference Design Information 1-26 ADSP-BF518F EZ-Board Evaluation System Manual 2 ADSP-BF518F EZ-BOARD HARDWARE REFERENCE This chapter describes the hardware design of the ADSP-BF518F EZ-Board board. The following topics are covered. • “System Architecture” on page 2-2 Describes the ADSP-BF518F EZ-Board configuration and explains how the board components interface with the processor. • “Programmable Flags” on page 2-3 Shows the locations and describes the programming flags (PFs). • “Push Button and Switch Settings” on page 2-7 Shows the locations and describes the push buttons and switches. • “Jumpers” on page 2-16 Shows the locations and describes the configuration jumpers. • “LEDs” on page 2-21 Shows the locations and describes the LEDs. • “Connectors” on page 2-24 Shows the locations and provides part numbers for the on-board connectors. In addition, the manufacturer and part number information is provided for the mating parts. ADSP-BF518F EZ-Board Evaluation System Manual 2-1 System Architecture System Architecture This section describes the processor’s configuration on the EZ-Board (Figure 2-1). 64 MB SDRAM (32M x 16) 4 MB Flash (2M x 16 ) 3.3 Volts 3.3 Volts 32.768 KHz Oscillator 3.3 volt SD Connector eMMC RSI RJ45 RJ45 UARTs CLKIN SPI GPIO Low Speed Group 1B Low Speed Group 1A 3.3 Volts ADSP-BF518F Processor 400 MHz 176-lead LQFP Low Speed Group 2A Micrel KSZ8893 MAC High Speed I/O LEDs (8) 2GB UP/DN CNTR IDC Conn 14 Pin 0.1 EBIU JTAG Port RTC Rotary LEDs (3) PBs (2) SPORT TWI SPORT 16 Mb SPI Flash 3.3 Volts RS-232 TX/RX 3.3 Volts 25 MHz Oscillator 3.3 Volts 12 bit 3 Channel A/D AD7266 SSM2602 Codec 3.3 Volts 4 Differential Inputs 4 Single Ended Inputs RS-232 Female Mic In Aud In Head Out Aud Out 12 MHz Oscillator 3.3 Volts Figure 2-1. System Architecture This EZ-Board is designed to demonstrate the ADSP-BF518F Blackfin processor capabilities. The processor has an I/O voltage of 3.3V. The core voltage of the processor is controlled by an Analog Devices ADP1715 low dropout regulator (LDO) and an Analog Devices AD5258 digipot, which 2-2 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference is configurable over the 2-wire interface (TWI) signals. Refer to the power-on-self test (POST) example in the ADSP-BF518F installation directory of VisualDSP++ for information on how to set up the TWI interface. The core voltage and clock rate can be set on the fly by the processor. The input clock is 25 MHz. A 32.768 kHz crystal supplies the real-time clock (RTC) inputs of the processor. The default boot mode for the processor is external parallel flash boot. See “Boot Mode Select Switch (SW1)” on page 2-8 for information on how to change the default boot mode. Programmable Flags The processor has 40 general-purpose input/output (GPIO) signals spread across three ports (PF, PG, and PH). The pins are multi-functional and depend on the ADSP-BF518F processor setup. The following tables show how the programmable flag pins are used on the EZ-Board. • PF programmable flag pins – Table 2-1 • PG programmable flag pins – Table 2-2 • PH programmable flag pins – Table 2-3 Table 2-1. PF Port Programmable Flag Connections Processor Pin Other Processor Function EZ-Board Function PF0 ETxD2/PPID0/SPI1_SSEL2/TA CLK6 Default: ETXD2 Land grid array, expansion interface II PF1 ERxD2/PPID1/PWM_AH/TACLK7 Default: ERXD2 Land grid array, expansion interface II PF2 ETxD3/PPID2/PWM_AL Default: ETXD3 Land grid array, expansion interface II PF3 ERxD3/PPID3/PWM_BH/TACLK0 Default: ERXD3 Land grid array, expansion interface II ADSP-BF518F EZ-Board Evaluation System Manual 2-3 Programmable Flags Table 2-1. PF Port Programmable Flag Connections (Cont’d) Processor Pin Other Processor Function EZ-Board Function PF4 ERxCLK/PPID4/PWM_BL/TACLK1 Default: ERXCLK Land grid array, expansion interface II PF5 ERxDV/PPID5/PWM_CH/TACI0 Default: ERXDV Land grid array, expansion interface II PF6 COL/PPID6/PWM_CL/TACI1 Default: COL Land grid array, expansion interface II PF7 SPI0_SSEL1/PPID7/PWM_SYNC Default: SPI0_SSEL1 Land grid array, expansion interface II PF8 MDC/PPID8/SPI1_SSEL4 Default: MDC Land grid array, expansion interface II PF9 RMIIMDIO/PPID9/TMR2 Default: MDIO Land grid array, expansion interface II PF10 ETxD0/PPID10/TMR3 Default: ETXD0 Land grid array, expansion interface II PF11 ERxD0/PPID11/PWM_AH/TACI3 Default: ERXD0 Land grid array, expansion interface II PF12 ETxD1/PPID12/PWM_AL Default: ETXD1 Land grid array, expansion interface II PF13 ERxD1/PPID13/PWM_BH Default: ERXD1 Land grid array, expansion interface II PF14 ETxEN/PPID14/PWM_BL Default: ETXEN Land grid array, expansion interface II PF15 RMII_PHYINT/PPID15/ PWM_SYNC Default: RMII_PHYINT Land grid array, expansion interface II 2-4 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Table 2-2. PG Port Programmable Flag Connections Processor Pin Other Processor Function EZ-Board Function PG0 MIICRS/RMIICRS/HWAIT/SPI1_SSEL3 Default: MIICRS HWAIT, land grid array, expansion interface II PG1 ERxER/DMAR1/PWM_CH Default: ERXER Land grid array, expansion interface II PG2 MIITxCLK/RMIIREF_CLK/ DMAR0/PWM_CL Default: MIITXCLK Land grid array, expansion interface II PG3 DR0PRI/RSI_DATA0/ SPI0_SSEL5/TACLK3 Default: DR0PRI SD_D0, land grid array, expansion interface II PG4 RSCLK0/RSI_DATA1/TMR5/ TACI5 Default: RSCLK0 SD_D1, land grid array, expansion interface II PG5 RFS0/RSI_DATA2/PPICLK_1/ TMRCLK Default: RFS0 SD_D2, land grid array, expansion interface II PG6 TFS0/RSI_DATA3/TMR0/ PPIFS1_1 Default: TFS0 SD_D3, land grid array, expansion interface II PG7 DT0PRI/RSI_CMD/TMR1/ PPIFS2_1 Default: DT0PRI SD_CMD, land grid array, expansion interface II PG8 TSCLK0/RSI_CLK/TMR6/TACI6 Default: TSCLK0 SD_CLK, land grid array, expansion interface II PG9 DT0SEC/UART0_TX/TMR4 Default: UART0_TX Land grid array, expansion interface II PG10 DR0SEC/UART0_RX/TACI4 Default: UART0_RX Land grid array, expansion interface II PG11 SPI0_SS/AMS[2]/SPI1_SSEL5/ TACLK2 Default: AMS2 Land grid array, expansion interface II PG12 SPI0_SCK/PPICLK_2/TMRCLK Default: SPI0_SCK Land grid array, expansion interface II PG13 SPI0_MISO/TMR0/PPIFS1_2 Default: SPI0_MISOI Land grid array, expansion interface II ADSP-BF518F EZ-Board Evaluation System Manual 2-5 Programmable Flags Table 2-2. PG Port Programmable Flag Connections (Cont’d) Processor Pin Other Processor Function EZ-Board Function PG14 SPI0_MOSI/TMR1/PPIFS2_2/ PWM_TRIPB Default: SPI0_MOSI Land grid array, expansion interface II PG15 SPI0_SSEL2/PPIFS3/AMS[3] Default: AMS3 SPI0_SEL2, land grid array, expansion interface II Table 2-3. PH Port Programmable Flag Connections Processor Pin Other Processor Function EZ-Board Function PH0 DR1PRI/SPI1_SS/RSI_DATA4 Default: PB1 DR1PRI, MMC_D4, land grid array, expansion interface II PH1 RFS1/SPI1_MISO/RSI_DATA5 Default: PB2 RFS1, MMC_D5, land grid array, expansion interface II PH2 RSCLK1/SPI1_SCK/RSI_DATA6 Default: not used RSCLK1, MMC_D6, land grid array, expansion interface II PH3 DT1PRI/SPI1_MOSI/RSI_DATA7 Default: LED1 ADC_A0, MMC_D7, OTP_EN, land grid array, expansion interface II PH4 TFS1/AOE/SPI0_SSEL3/CUD Default: SPI0_SSEL3 CUD, land grid array, expansion interface II PH5 TSCLK1/ARDY/ECLK/CDG Default: LED2 CDG, ADC_A1, land grid array, expansion interface II PH6 DT1SEC/UART1_TX/ SPI1_SSEL1/CZM Default: LED3 CZM, ADC_A2, land grid array, expansion interface II PH7 DR1SEC/UART1_RX/TMR7/TACI2 Default: not used DR1SEC, land grid array, expansion interface II 2-6 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Push Button and Switch Settings This section describes operation of the push buttons and switches. The push button and switch locations are shown in Figure 2-2. Figure 2-2. Push Button and Switch Locations ADSP-BF518F EZ-Board Evaluation System Manual 2-7 Push Button and Switch Settings Boot Mode Select Switch (SW1) The boot mode select switch (SW1) determines the boot mode of the processor. Table 2-4 shows the available boot mode settings. By default, the ADSP-BF518F processor boots from the on-board parallel flash memory. The selected position of is marked by the notch down the L entire rotating portion of the switch, not the small arrow. SW1 Table 2-4. Boot Mode Select Switch (SW1) SW1 Position Processor Boot Mode 0 Reserved 1 Boot from 8- or 16-bit external flash memory (default) 2 Boot from 16-bit asynchronous FIFO 3 Boot from serial SPI memory 4 Boot from SPI host device 5 Boot from serial TWI memory 6 Boot from TWI host 7 Boot from UART0 host PB Enable Switch (SW2) The PB enable switch (SW2) disconnects the associated push buttons from the GPIO pins of the processor and allows the signals to be used for other purposes (see Table 2-5). 2-8 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Table 2-5. Push Button Enable Switch (SW2) SW2 Position (Default) From To Function 1 (ON) Push button 1 (SW12) Processor (U12, PH0) ON (PB1) OFF (ADC DR1PRI, Processor (U12, PH1) ON (PB2) OFF (ADC RFS1, 2 (ON) Push button 2 (SW13) eMMC, expansion interface II) eMMC, expansion interface II) Flash Enable Switch (SW3) The flash enable switch (SW3) disconnects the ~AMSx signals from parallel flash memory (U5) and allows other devices to utilize the signals via the expansion interface II. For each switch listed in Table 2-6 that is turned OFF, the size of available flash memory is reduced by 1 MB. ~AMS3 is shared with ~SPI0_SEL2 of the external SPI flash. When using the external SPI flash, the available size for parallel flash is 3 MB. Table 2-6. Flash Enable Switch (SW3) SW3 Switch Position (Default) Processor Signal 1 (ON) ~AMS0 2 (ON) ~AMS1 3 (ON) ~AMS2 4 (ON) ~AMS3 SPORT1 Enable Switch (SW4) The SPORT1 enable switch (SW4) connects the SPORT1 interface of the processor to the ADC7266 (U2) device. When the SPORT1 interface is used on the expansion interface II, turn SW4 all OFF. SW4 is set to all OFF by default. ADSP-BF518F EZ-Board Evaluation System Manual 2-9 Push Button and Switch Settings The SPORT1 interface is shared with other on-board components, such as the eMMC device and push buttons. MIC Gain Switch (SW5) The microphone gain switch (SW5) sets the gain of the MIC signal, which is connected to the top 3.5 mm jack (J5). The gain can be set to 14 dB, 0 dB, or –6 dB by turning position 1, 2, or 3 of SW5 ON (see Table 2-7). When the corresponding position for the desired gain is ON, the remaining positions must be OFF. Refer to “Audio Interface” on page 1-17 for more information about the audio codec. Table 2-7. MIC Gain Switch (SW5) Gain SW5 Switch Settings 5 (14 dB) ON, OFF, OFF, OFF 1 (0 dB) OFF, ON, OFF, OFF 0.5 (–6 dB) OFF, OFF, ON, OFF (default) Unused OFF, OFF, OFF, OFF Mic/HP LPBK, Audio Mode Switch (SW6) The SW6 switch places the EZ-Board in a loopback to test the board for signal/circuit continuity and functionality. SW6 positions 1&2 connect the MICIN signal to the headphone’s left and right outputs for audio loopback. Do not turn SW6 positions 1&2 ON at the same time. See “Power-On-Self Test” on page 1-24 for more information. positions 3&4 select the control interface for the audio codec. positions 3 ON and 4 OFF select the SPI interface, while position 3 OFF and position 4 ON select TWI mode. By default, SW6 is OFF, OFF, ON, OFF. See “SPI/TWI Switch (SW16)” on page 2-13 for more information. SW6 SW6 2-10 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Ethernet Port 1 Configuration Switch (SW7) The Ethernet port 1 configuration switch (SW7) is used to configure certain Ethernet settings related to port 1 via hardware, instead of software (see Table 2-8). Table 2-8. Ethernet Port 1 Configuration Switch (SW7) SW7 Position (Default) Description Position Function 1 (ON) Force flow control OFF ON Disable Enable 2 (ON) Force full/half OFF ON Half duplex Full duplex 3 (ON) Force speed OFF ON 10BaseT 100BaseTX 4 (OFF) Auto-negotiation OFF ON Enable Disable Ethernet Configuration Switch (SW8) The Ethernet configuration switch (SW8) is used to configure certain Ethernet settings via hardware, instead of software (see Table 2-9). Table 2-9. Ethernet Configuration Switch (SW8) SW8 Position (Default) Description Position Function 1 (ON) Advertise flow control OFF ON Disable Enable 2 (ON) Hardware pin overwrite OFF ON Enable Disable 3, 4 (ON, OFF) Serial bus mode OFF OFF ON ON ADSP-BF518F EZ-Board Evaluation System Manual OFF ON OFF ON Not used TWI slave SPI slave Not used 2-11 Push Button and Switch Settings UART Setup Switch (SW10) The UART setup switch (SW10) configures the UART0 signals from the GPIO pins of the processor. Position 4 is used to place the UART0 port of the processor in a loopback condition. The jumper connects the UART0_TX line of the processor to the UART0_RX signal of the processor. This is required when a POST program is run to test the serial port interface. By default, SW10 is ON, OFF, ON, OFF. Reset Push Button (SW11) The reset push button (SW11) resets the following ICs. • Processor (U12), parallel flash (U5), and Ethernet IC (U4) The reset push button does not reset the following ICs. • SDRAM (U14), eMMC (U16) • Audio codec (U1), UART0 (U21), schmitt trigger hex inverter (U6) • Digipot (U7), power (VR1—5) The reset push button does not reset the standalone debug agent once the debug agent is connected to a personal computer (PC). After communication between the debug agent and PC is initialized, pushing a reset button does not reset the USB chip on the debug agent. The only way to reset the USB chip on the debug agent is to power down the EZ-Board. Programmable Flag Push Buttons (SW12–13) Two momentary push buttons (SW12 and SW13) are provided for general-purpose user input. The buttons connect to the PH0 and PH1 GPIO pins of the processor. The push buttons are active high and, when pressed, 2-12 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference send a high (1) to the processor. The GPIO enable switch (SW2) disconnects the push buttons from the corresponding push button signals. Refer to “PB Enable Switch (SW2)” on page 2-8 for more information. Rotary Encoder with Momentary Switch (SW14) The rotary encoder (SW14) can be turned clockwise for an up count or counter-clockwise for a down count. The encoder also features a momentary switch, activated by pushing the switch towards the processor, which resets the counter to zero. The rotary encoder is a two-bit quadrature (gray code) encoder. Refer to the Rotary Counter section of the ADSP-BF51x Blackfin Processor Hardware Reference for more information. The rotary encoder is disconnected from the processor by setting SW19 positions 1, 2, and 3 to OFF. See “Encoder Enable Switch (SW19)” on page 2-14 for more information. SPORT0 ENBL Switch (SW15) The SPORT0 enable switch (SW15) connects the SPORT0 interface of the processor to the audio codec, SSM2602 (U1). When the SPORT0 interface is used on the expansion interface II, turn SW15 all OFF. By default, SW15 is set to all ON. SPI/TWI Switch (SW16) The SPI/TWI switch (SW16) selects the control interface for the SSM2602 audio codec. By default, SW16 is ON, OFF, ON, OFF, ON, OFF and selects the SPI interface. TWI is selected by setting SW16 to OFF, OFF, OFF, ON, OFF, ON. ADSP-BF518F EZ-Board Evaluation System Manual 2-13 Push Button and Switch Settings Ethernet Mode Switch (SW17) The Ethernet mode switch (SW17) selects the control interface for the KSZ8893M device. By default, SW17 is ON, ON, ON, OFF, ON, OFF and selects the SPI interface. TWI is selected by setting SW17 to OFF, OFF, OFF, ON, OFF, ON. Ethernet Port 2 Configuration Switch (SW18) The Ethernet port 2 configuration switch (SW18) is used to configure certain Ethernet settings related to port 1 via hardware, instead of software (see Table 2-10). Table 2-10. Ethernet Port 2 Configuration Switch (SW18) SW18 Position (Default) Description Position Function 1 (ON) Force flow control OFF ON Disable Enable 2 (ON) Force full/half OFF ON Half duplex Full duplex 3 (ON) Force speed OFF ON 10BaseT 100BaseTX 4 (OFF) Auto-negotiation OFF ON Enable Disable 5 (OFF) Auto MDI/MDI-X OFF ON Enable Disable 6 (OFF) MDI/MDI-X setting OFF ON MDI-X MDI Encoder Enable Switch (SW19) The encoder enable switch (SW19) disconnects the rotary encoder signals from the GPIO pins of the processor. When SW19 is OFF, its associated GPIO signals can be used on the expansion interface II (see Table 2-11). 2-14 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Table 2-11. Encoder Enable Switch (SW19) SW19 Position (Default) From To 1 (OFF) Encoder (SW14) Processor (U1, PF13) 2 (OFF) Encoder (SW14) Processor (U1, PF12) 3 (OFF) Encoder (SW14) Processor (U1, PF11) eMMC Enable Switch (SW20–21) The eMMC enable switches (SW20 and SW21) connect the RSI signals to the on-board eMMC memory device. The eMMC interface and the SD interface share the same signals; therefore, no card should be inserted into the SD connector when the eMMC device is used. The default for the switches is all OFF so that the SD connector can be used. ADC Loopback Switches (SW22–23) The ADC loopback switches (SW22 and SW23) are used for testing only. The switches are used to send an analog signal generated from the codec to the ADC circuit for evaluation. ADSP-BF518F EZ-Board Evaluation System Manual 2-15 Jumpers Jumpers This section describes functionality of the configuration jumpers. Figure 2-2 shows the jumper locations. Figure 2-3. Configuration Jumper Locations 2-16 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Flash WP Jumper (JP3) The flash WP jumper (JP3) is used to write-protect block 70 of the parallel flash chip. Block 70 contains 64 KB of configuration data at address range 0x203 F0000—0x203 FFFFF. When the jumper is installed on JP3, and the parallel flash driver from Analog Devices is used, block 70 is read-only. By default, JP3 is installed. ADC Range Jumper (JP4) The ADC range jumper JP4 is used to select the range of the input signal to the ADC. The jumper determines whether the input range for the ADC is 2.5V or 5 V. The max voltage range for a signal connected to the SMA connector is 0–5V. Any voltage outside of this range can damage the EZ-Board. By default, JP4 is installed. LED Select Jumpers (JP11–12) The LED select jumpers (JP11 and JP12) are used to configure how Ethernet status is reported on the LEDs. By default, JP11 is installed, and JP12 is not installed. The LEDs can be used to report the status of the link, activity on the line, duplex mode speed, and collisions. For more information about the LEDs, refer to the KSZ8893M data sheet provided by the product manufacturer. Ethernet Power Down Jumper (JP13) The Ethernet power down jumper (JP13) is used to put the KSZ8893M PHY into a power down mode. In this mode, the entire chip is powered down, and the register configuration is not saved. By default, JP13 is not installed. ADSP-BF518F EZ-Board Evaluation System Manual 2-17 Jumpers OTP Flag Enable Jumper (JP14) The OTP flag enable jumper (JP14) controls the precise 7V OTP voltage regulator. When installed, JP14 allows OTP writes. must be installed for OTP writes to be successful. The nominal 2.5V for OTP is temporarily raised to 7V when PH3 is set high. Care must be taken when using the OTP_FLAG signal in order to avoid driving 7V for an extended amount of time. JP14 is a limited amount of time 7V can be applied to the procesa There sor’s OTP interface. Violating the specifications listed in the ADSP-BF512/ADSP-BF514/ADSP-BF516/ADSP-BF518 Blackfin Embedded Processor data sheet can damage the processor. Configured properly, JP14 connects the processor’s PH3 flag pin to the shut-down pin of the ADP1611 switching converter. Refer to the ADSP-BF51x Blackfin Processor Hardware Reference Manual and the ADSP-BF512/ADSP-BF514/ADSP-BF516/ADSP-BF518 Blackfin Embedded Processor data sheet for more information about OTP writes. MIC Select Jumper (JP15) The microphone select jumper (JP15) connects the MICBIAS signal to the MICIN signal (JP15 on positions 1&2) or connects the MICBIAS signal to the 3.5 mm connector J5 (JP15 on positions 2&3). By default, JP15 is installed on positions 2&3. SPI FLASH CS Enable Jumper (JP16) The SPI flash CS enable jumper (JP16) connects the SPI0_SSEL2 signal to the SPI flash. When installing JP16, position 3 of SW3 needs to be turned OFF since the SPI0_SSEL2 signal is shared with the ~AMS3 signal connected 2-18 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference to parallel flash. When using SPI flash, the available memory that is accessible on parallel flash is reduced from 4 MB to 3 MB. By default, JP16 is not installed. ADC Channel Select Jumpers (JP17–28) The ADC channel select jumpers JP17—28 are used to connect the SMA connector to the ADC input. When there is no input connected to the SMA connector, the jumper should have the shunt installed on pins 2&3. This connects the signal going to the ADC input to ground and keeps the noise level low. When an input signal is connected to the SMA connector, the shunt should be installed on position 1&2. By default, JP17—28 are installed on positions 2&3. VDDINT Power Jumper (P8) The VDDINT power jumper (P8) is used to measure the core voltage and current supplied to the processor core. P8 is ON by default, and the power flows through the two-pin IDC header. To measure power, remove P8 and measure voltage across the 0.1 ohm resistor. Once voltage is measured, power can be calculated. For more information, refer to “Power Measurements” on page 1-24. VDDEXT Power Jumper (P9) The VDDEXT power jumper (P9) is used to measure the processor’s I/O voltage and current. By default, P9 is ON, and the power flows through the two-pin IDC header. To measure power, remove the jumper and measure voltage across the 0.1 ohm resistor. Once voltage is measured, power can be calculated. For more information, refer to “Power Measurements” on page 1-24. ADSP-BF518F EZ-Board Evaluation System Manual 2-19 Jumpers VDDMEM Power Jumper (P10) The VDDMEM power jumper (P10) is used to measure the voltage and current supplied to the memory interface of the processor. By default, P10 is ON, and the power flows through the two-pin IDC header. To measure power, remove P10 and measure voltage across the 0.1 ohm resistor. Once voltage is measured, power can be calculated. For more information, refer to “Power Measurements” on page 1-24. VDDFLASH Power Jumper (P11) The VDDFLASH power jumper (P11) is used to measure the flash voltage and current supplied to the processor core. P11 is ON by default, and the power flows through the two-pin IDC header. To measure power, remove P11 and measure voltage across the 0.1 ohm resistor. Once voltage is measured, power can be calculated. For more information, refer to “Power Measurements” on page 1-24. 2-20 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference LEDs This section describes the on-board LEDs. Figure 2-4 shows the LED locations. Figure 2-4. LED Locations ADSP-BF518F EZ-Board Evaluation System Manual 2-21 LEDs GPIO LEDs (LED1–3) Three LEDs connect to three general-purpose I/O pins of the processor (see Table 2-12). The LEDs are active high and lit by writing a ‘1’ to the correct programmable flag signal. Table 2-12. GPIO LEDs LED Reference Designator Processor Programmable Flag Pin LED1 PH3 LED2 PH5 LED3 PH6 Ethernet LEDs (LED4–8, LED10–12) The Ethernet LEDs LED4—8 and LED10—12 are used to report the status of port 1 and port 2 of the KSZ8893M switch. The status displayed by the LEDs is controlled by jumpers JP11 and JP12. The LEDs can be used to report the status of the link, activity on the line, duplex mode speed, and collisions. For more information on the LEDs, refer to the KSZ8893M data sheet provided by the product manufacturer. For more information, see “LED Select Jumpers (JP11–12)” on page 2-17. Reset LED (LED9) When LED9 is lit, it indicates that the master reset of all major ICs is active. The reset LED is controlled by the Analog Devices ADM708 supervisory reset circuit. You can assert the reset push button (SW11) to assert the master reset and activate LED9. For more information, see “Reset Push Button (SW11)” on page 2-12. 2-22 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Power LED (LED13) When LED13 is lit solid, it indicates that the board is powered. ADSP-BF518F EZ-Board Evaluation System Manual 2-23 Connectors Connectors This section describes connector functionality and provides information about mating connectors. The connector locations are shown in Figure 2-5. Connectors shown with a dotted line are on the backside of the PCB Figure 2-5. Connector Locations 2-24 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Expansion Interface II Connector (J1) is a board-to-board connector providing signals from the external bus interface unit (EBIU) of the processor. The connector is located on the left edge of the board. For more information, see “Expansion Interface II” on page 1-23. For availability and pricing of the connector, contact Samtec. J1 Part Description Manufacturer Part Number 104-position 0.025”, SMT header SAMTEC QMS-052-11-L-D-A Mating Connector 104-position 0.025”, SMT socket SAMTEC QFS-052-01-L-D-A Part Description Manufacturer Part Number DB9, female, vertical mount NORCOMP 191-009-213-L-571 RS-232 Connector (J2) Mating Cable 2m female-to-female cable DIGI-KEY AE1020-ND Power Connector (J3) The power connector (J3) provides all of the power necessary to operate the EZ-Board. Part Description Manufacturer Part Number 0.65 mm power jack CUI 045-0883R Mating Power Supply (shipped with the EZ-Board) [email protected] power supply CUI STACK ADSP-BF518F EZ-Board Evaluation System Manual DMS050260-P12P-SZ 2-25 Connectors Dual Audio Connectors (J4–5) Part Description Manufacturer Part Number 3.5 mm dual stereo jack SWITCHCRAFT 35RAPC7JS Mating Cable (shipped with the EZ-Board) 3.5 mm male/male 6’ cable RANDOM 10A3-01106 SMA Connectors (J7, J16–26) Part Description Manufacturer Part Number SMA straight jack receptacle JOHNSON COMPONENTS 142-0701-201 Mating Cable (shipped with the EZ-Board) SMA male/male 18" cable CRYSTEK CORPORATION CCMA-MM-18 Part Description Manufacturer Part Number 16 mm battery holder MEMORY PROTECTION BH600 Battery Holder (J12) Mating Battery (shipped with the EZ-Board) 3V 125MAH 16 mm LI-COIN PANASONIC CR1632 Part Description Manufacturer Part Number SD 9-pin connector ITT CANON CCM05-5777LFT T50 SD Connector (J13) Mating Memory Card (shipped with the EZ-Board) 256 MB 2-26 SANDISK STACK SDSDB-256-A10 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Ethernet Connectors (J14–15) Part Description Manufacturer Part Number RJ-45 Ethernet jack STEWART SS-6488-NF Mating Cable (shipped with the EZ-Board) Cat 5E patch cable RANDOM PC10/100T-007 JTAG Connector (P1) The JTAG header is the connecting point for a JTAG connection to the ADSP-BF518F processor. The standalone debug agent requires both connectors P1 and ZP1. Pin 3 is missing to provide keying. Pin 3 in the mating connector should have a plug. When using an emulator with the EZ-Board, the standalone debug agent must be removed. Follow the installation instructions provided in “EZ-Board Installation” on page 1-4, using P1 as the JTAG connection point. Expansion Interface II Connectors (P2 and P4) and P4 are board-to-board connectors providing signals for the SPI, TWI, UART, SPORT interfaces and GPIO signals of the processor. The connectors are located on the upper and lower edges of the board. For more information, see “Expansion Interface II” on page 1-23. For availability and pricing of the connectors, contact Samtec. P2 Part Description Manufacturer Part Number 50-position 0.1”, SMT header SAMTEC TSSH-125-01-L-DV-A A D S P -B F 5 1 8 F E Z -B o a rd E v a lu a tio n S y ste m M a n u a l 2-27 Connectors Part Description Manufacturer Part Number Mating Connector 50-position 0.1”, SMT socket SAMTEC SSW-125-22-F-D-VS Expansion Interface II Connector (P3) is a board-to-board connector providing signals for the PPI, TWI, and GPIO signals of the processor. The connector is located on the upper edge of the board. For more information, see “Expansion Interface II” on page 1-23. For availability and pricing of the connector, contact Samtec. P3 Part Description Manufacturer Part Number 70-position 0.1”, SMT header SAMTEC TSSH-135-01-L-DV-A Mating Connector 70-position 0.1”, SMT socket SAMTEC SSW-135-22-F-D-VS DMAX Land Grid Array Connectors (P5–7) The land grid array areas (P5—7) are intended for the probing of the processor signals. The pads are exposed and designed to attach a Tektronix logic analyzer to the connectors listed in the following table. For more information about the land grid array, consult the Tektronix Web site. Part Description Manufacturer Part Number Primary retention TEKTRONIX 020290800 Alternate retention TEKTRONIX 020291000 2-28 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Hardware Reference Standalone Debug Agent Connector (ZP1) ZP1 connects the standalone debug agent to the EZ-Board. The standalone debug agent requires both the ZP1 and P1 connectors. For more information, see “EZ-Board Installation” on page 1-4. ADSP-BF518F EZ-Board Evaluation System Manual 2-29 Connectors 2-30 ADSP-BF518F EZ-Board Evaluation System Manual A ADSP-BF518F EZ-BOARD BILL OF MATERIALS The bill of materials corresponds to “ADSP-BF518F EZ-Board Schematic” on page B-1. Ref. Qty. Description Reference Designator Manufacturer Part Number 1 1 74LVC14A SOIC14 U6 TI 74LVC14AD 2 1 IDT74FCT3244A U10 PY SSOP20 IDT IDT74FCT3244APYG 3 1 32.768KHZ OSC008 U3 EPSON MC-156-32.7680KA-A0: ROHS 4 1 25MHZ OSC003 U19 EPSON SG-8002CA MP 5 4 SN74LVC1G08 SOT23-5 U23-26 TI SN74LVC1G08DBVR 6 1 MT48LC32M16A U14 2TG-75 TSOP54 MICRON MT48LC32M16A2P-75 7 1 SI4411DY SO-8 U8 VISHAY Si4411DY-T1-E3 8 2 HX1188 ICS007 U27-28 DIGI-KEY 553-1340-ND 9 1 12MHZ OSC003 U20 EPSON SG-8002CA-MP 10 1 SN74AUC1G00 SOT23-5 U13 TI SN74AUC1G00DBVR 11 1 KS8893M PQFP128 U4 MICREL KSZ8893MQL 12 1 BF518 M25P16 “U9” U9 ST MICRO M25P16-VMW6G ADSP-BF518F EZ-Board Evaluation System Manual A-1 Ref. Qty. Description Reference Designator Manufacturer Part Number 13 1 BF518 M29W320EB "U5" U5 STMICRO M29W320EB70ZE6E 14 1 MTFC2GDKDM FBGA169 U16 MICRON MTFC2GDKDM-WT 15 1 ADM708SARZ SOIC8 U22 ANALOG DEVICES ADM708SARZ 16 1 ADM3202ARNZ SOIC16 U21 ANALOG DEVICES ADM3202ARNZ 17 1 ADSP-BF518F LQFP176 U12 ANALOG DEVICES ADSP-BF518BSWZ-4F4 18 1 ADP1864AUJZ SOT23-6 VR1 ANALOG DEVICES ADP1864AUJZ-R7 19 1 ADP1611 MSOP8 VR6 ANALOG DEVICES ADP1611ARMZ-R7 20 1 ADP1715 MSOP8 VR5 ANALOG ADP1715ARMZ-R7 21 1 ADP1710 TSOT5 VR3 ANALOG DEVICES ADP1710AUJZ-R7 22 1 ADR550B SOT23-3 U11 ANALOG DEVICES ADR550BRTZ-REEL7 23 1 AD5258 MSOP10 U7 ANALOG DEVICES AD5258BRMZ10 24 1 SSM2602 ICS009 U1 ANALOG DEVICES SSM2602CPZ-R2 25 1 ADP1715 MSOP8 VR4 ANALOG DEVICES ADP1715ARMZ-1.8R7 26 6 AD8022 MSOP8 U29-34 ANALOG DEVICES AD8022ARMZ 27 1 AD7266 LFCSP32 U2 ANALOG DEVICES AD7266BCPZ A-2 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Bill Of Materials Ref. Qty. Description Reference Designator Manufacturer Part Number 28 1 ADP1610 MSOP8 VR2 ANALOG DEVICES ADP1610ARMZ-R7 29 1 DIP3 SWT015 SW19 DIGI-KEY CKN6114-ND 30 1 DIP8 SWT016 SW20 C&K TDA08H0SB1 31 6 DIP6 SWT017 SW15-18,SW2223 CTS 218-6LPST 32 7 DIP4 SWT018 SW3-8,SW10 ITT TDA04HOSB1 33 12 SMA XPINS CON043 J7,J16-26 JOHNSON COMP 142-0701-201 34 1 DB9 9PIN CON038 J2 NORCOMP 191-009-213-L-571 35 2 DIP2 SWT020 SW2,SW21 C&K CKN9064-ND 36 4 IDC 2X1 IDC2X1 P8-11 FCI 90726-402HLF 37 5 IDC 2X1 IDC2X1 JP3,JP11-14 FCI 90726-402HLF 38 13 IDC 3X1 IDC3X1 JP15,JP17-28 FCI 90726-403HLF 39 1 3A RESETABLE FUS004 F1 TYCO SMD300F-2 40 24 IDC 2PIN_JUMPER_ SHORT SJ1-24 DIGI-KEY S9001-ND 41 1 PWR .65MM CON045 J3 CUI 045-0883R 42 2 3.5MM DUAL_STEREO CON050 J4-5 SWITCHCRAFT 35RAPC7JS 43 1 SD_CONN 9PIN CON051 J13 DIGI-KEY 401-1954-ND ADSP-BF518F EZ-Board Evaluation System Manual A-3 Ref. Qty. Description Reference Designator Manufacturer Part Number 44 2 RJ45 8PIN CON_RJ45_12P J14-15 DIGI-KEY 380-1022-ND 45 3 MOMENTARY SWT024 SW11-13 PANASONIC EVQ-Q2K03W 46 1 ROTARY_ENC_ EDGE SWT025 SW14 PANASONIC EVQ-WKA001 47 1 QMS 52x2 QMS52x2_SMT J1 SAMTEC QMS-052-06.75-L-D-A 48 2 IDC 25x2 IDC25x2_SMTA P2,P4 SAMTEC TSSH-125-01-L-DV-A 49 1 IDC 35x2 IDC35x2_SMTA P3 SAMTEC TSSH-135-01-L-DV-A 50 1 IDC 7x2 IDC7x2_SMTA P1 SAMTEC TSM-107-01-T-DV-A 51 1 BATT_HOLDER 16MM BATT_COI J12 MEMORY PROTECTI BH600 52 2 IDC 2X1 IDC2X1_SMT JP4,JP16 SAMTEC TSM-102-01-T-SV 53 1 ROTARY SWT027 SW1 COPAL S-8010 54 3 YELLOW LED001 LED1-3 PANASONIC LN1461C 55 2 100 1/10W 5% 0805 R165,R167 VISHAY CRCW0805100RJNEA 56 11 600 100MHZ 200MA 0603 FER2-9,FER1214 DIGI-KEY 490-1014-2-ND 57 2 600 100MHZ 500MA 1206 FER15-16 STEWARD HZ1206B601R-10 58 2 10UF 16V 20% CAP002 CT1-2 PANASONIC EEE1CA100SR A-4 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Bill Of Materials Ref. Qty. Description 59 1 60 Reference Designator Manufacturer Part Number 0 1/10W 5% 0805 R69 VISHAY CRCW08050000Z0EA 1 190 100MHZ 5A FER002 FER17 MURATA DLW5BSN191SQ2 61 8 YELLOW LED009 LED4-8,LED1012 PANASONIC LNJ416Q8YRA 62 2 0.47UF 16V 10% 0805 C59-60 AVX 0805YC474KAT2A 63 2 1UF 10V 10% 0805 C123-124 AVX 0805ZC105KAT2A 64 18 10UF 6.3V 10% 0805 C7,C10,C1516,C37,C41,C61, C64,C66,C71, C75,C88,C90, C94-95,C98, C101,C106 AVX 08056D106KAT2A 65 1 4.7UF 6.3V 10% 0805 C145 AVX 08056D475KAT2A 66 47 0.1UF 10V 10% 0402 C4-6,C9,C1114,C25,C39,C4245,C47-48,C6263,C65,C72,C76, C86-87,C89, C108-110,C113, C115-118,C140, C152,C188-194, C211-216 AVX 0402ZD104KAT2A 67 59 0.01UF 16V 10% 0402 C1,C8,C17-24, C26-36,C38,C46, C49-58,C73,C9293,C96-97,C99100,C102-105, C119-122,C139, C154,C179-187 AVX 0402YC103KAT2A ADSP-BF518F EZ-Board Evaluation System Manual A-5 Ref. Qty. Description Reference Designator Manufacturer Part Number 68 48 10K 1/16W 5% 0402 R1,R11,R18-21, R26,R56-59,R8587,R89,R106108,R110-115, R117,R143-145, R152,R154-156, R161-164,R168, R170-173,R203, R245,R268,R270, R353-355 VISHAY CRCW040210K0FKED 69 9 4.7K 1/16W 5% 0402 R6-8,R13-17, R269 VISHAY CRCW04024K70JNED 70 27 0 1/16W 5% 0402 R9,R202,R205206,R209-212, R214-215,R217218,R221-222, R224-225,R227228,R230-233, R235-236,R238239,R267 PANASONIC ERJ-2GE0R00X 71 10 22 1/16W 5% 0402 R146-151,R241244 PANASONIC ERJ-2GEJ220X 72 3 33 1/16W 5% 0402 R313-314,R325 VISHAY CRCW040233R0JNEA 73 7 33 1/16W 5% 0402 R3,R12,R60,R6667,R78,R199 VISHAY CRCW040233R0JNEA 74 2 18PF 50V 5% 0805 C2-3 AVX 08055A180JAT2A 75 2 2.2UF 10V 10% 0805 C150-151 AVX 0805ZD225KAT2A 76 24 10PF 50V 5% 0805 C155-178 AVX 08055A100JAT2A 77 2 0.1UF 16V 10%0603 C40,C136 AVX 0603YC104KAT2A A-6 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Bill Of Materials Ref. Qty. Description Reference Designator Manufacturer Part Number 78 5 1UF 16V 10% 0603 C79-81,C199, C208 PANASONIC ECJ-1VB1C105K 79 1 68PF 50V 5% 0603 C144 AVX 06035A680JAT2A 80 3 4.7UF 6.3V 20% 0603 C137-138,C141 PANASONIC ECJ-1VB0J475M 81 1 470PF 50V 5% 0603 C143 AVX 06033A471JAT2A 82 3 220UF 6.3V 20% D2E CT3-4,CT6 SANYO 10TPE220ML 83 1 10M 1/10W 5% 0603 R10 VISHAY CRCW060310M0FNEA 84 5 330 1/10W 5% 0603 R153,R157-160 VISHAY CRCW0603330RJNEA 85 4 0 1/10W 5% 0603 R52-53,R195, R346 PHYCOMP 232270296001L 86 34 49.9 1/16W 1% 0603 R68,R71-77,R7984,R118-126, R128-135,R137139 VISHAY CRCW060349R9FNEA 87 15 10 1/10W 5% 0603 R166,R169,R207- VISHAY 208,R213,R216, R219-220,R223, R226,R229,R234, R237,R240,R349 CRCW060310R0JNEA 88 1 10.0K 1/10W 1% 0603 R183 DIGI-KEY 311-10.0KHRTR-ND 89 8 100PF 50V 5% 0603 C67-70,C82-85 AVX 06035A101JAT2A 90 1 1000PF 50V 5% 0603 C207 PANASONIC ECJ-1VC1H102J ADSP-BF518F EZ-Board Evaluation System Manual A-7 Ref. Qty. Description Reference Designator Manufacturer Part Number 91 1 2200PF 50V 5% 0603 C130 PANASONIC ECJ-1VB1H222K 92 2 75.0 1/10W 1% 0603 R127,R136 DALE CRCW060375R0FKEA 93 3 100 1/16W 5% 0402 R49,R54,R70 DIGI-KEY 311-100JRTR-ND 94 1 4.99K 1/16W 1% 0603 R347 VISHAY CRCW06034K99FKEA 95 1 24.9K 1/10W 1% 0603 R192 DIGI-KEY 311-24.9KHTR-ND 96 3 511.0 1/16W 1% 0402 R140-142 DIGI-KEY 311-511LCT-ND 97 2 10UF 10V 10% 0805 C107,C111 PANASONIC ECJ-2FB1A106K 98 1 2.0K 1/16W 1% 0603 R182 PANASONIC ERJ-3EKF2001V 99 6 0.05 1/2W 1% 1206 R190-191,R194, R196,R198,R204 SEI CSF 1/2 0.05 1%R 100 11 10UF 16V 10% 1210 C125-127,C135, C146,C149,C200 -203,C205 AVX 1210YD106KAT2A 101 1 GREEN LED001 LED13 PANASONIC LN1361CTR 102 1 RED LED001 LED9 PANASONIC LN1261CTR 103 2 1000PF 50V 5% 1206 C147-148 AVX 12065A102JAT2A 104 1 255.0K 1/10W 1% 0603 R197 VISHAY CRCW06032553FK 105 1 80.6K 1/10W 1% 0603 R193 DIGI-KEY 311-80.6KHRCT-ND 106 8 270 1/10W 5% 0603 R95-102 PANASONIC ERJ-3GEYJ271V A-8 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Bill Of Materials Ref. Qty. Description Reference Designator Manufacturer Part Number 107 2 22000PF 25V 10% 0402 C131,C197 DIGIKEY 490-3252-1-ND 108 2 5A MBRS540T3G SMC D7-8 ON SEMI MBRS540T3G 109 1 20MA MA3X717E DIO005 D1 PANASONIC MA3X717E 110 1 2.5UH 30% IND013 L3 COILCRAFT MSS1038-252NLB 111 1 33.0K 1/16W 1% 0402 R201 ROHM MCR01MZPF3302 112 5 47.0K 1/16W 1% 0402 R46,R48,R5051,R55 ROHM MCR01MZPF4702 113 1 3.01K 1/16W 1% 0402 R63 ROHM MCR01MZPF3011 114 1 5.6K 1/16W 5% 0402 R247 PANASONIC ERJ-2GEJ562X 115 15 1.0K 1/16W 1% 0402 PANASONIC R61-62,R64-65, R88,R91,R93-94, R103,R105,R109, R116,R189,R271272 ERJ-2RKF1001X 116 2 1000PF 2000V 10% 1206 C112,C114 AVX 1206GC102KAT1A 117 3 220PF 50V 10% 0402 C153,C195-196 DIGI-KEY 311-1035-2-ND 118 4 5.6K 1/16W 0.5% 0402 R40,R43-45 SUSUMU RR0510P-562-D 119 1 680 1/16W 1% 0402 R42 BC COMPONENTS 2312 275 16801 ADSP-BF518F EZ-Board Evaluation System Manual A-9 Ref. Qty. Description Reference Designator Manufacturer Part Number 120 1 90.9K 1/16W 5% 0402 R41 DIGI-KEY 541-90.9KLCT-ND 121 1 40.2K 1/16W 5% 0402 R47 DIGI-KEY 541-40.2KLCT-ND 122 2 100K 1/16W 5% 0402 R200,R350 DIGI-KEY 541-100KJTR-ND 123 4 2.2UF 25V 10% 0805 C129,C132, C204,C206 DIGIKEY 490-3331-1-ND 124 1 21.5K 1/10W 1% 0603 R179 DIGI-KEY 311-21.5KHRCT-ND 125 6 1A MBR130LSFT1G SOD-123FL D2-5,D9-10 ON SEMI MBR130LSFT1G 126 1 22UH 20% IND018 L1 COILCRAFT MSS4020-223MLB 127 3 1UH 20% IND019 L2,L6-7 COILCRAFT ME3220-102MLB 128 13 33 1/32W 5% RNS005 RN4-13,RN17-19 PANASONIC EXB-28V330JX 129 3 1.2K 1/16W 1% 0402 R4-5,R186 PANASONIC ERJ-2RKF1201X 130 2 4.3 1/4W 5% 1206 R185,R188 PANASONIC ERJ-8GEYJ4R3V 131 1 2.67K 1/16W 1% 0402 R187 PANASONIC ERJ-2RKF2671X 132 3 1.0M 1/16W 1% 0402 R248-250 VISHAY CRCW04021M00FKED 133 2 22UH 20% IND024 L8-9 COILCRAFT MSD7342-223MLC 134 4 330 100MHZ 1.5A 0805 FER1,FER19-21 MURATA BLM21PG331SN1D A-10 ADSP-BF518F EZ-Board Evaluation System Manual ADSP-BF518F EZ-Board Bill Of Materials Ref. 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Description Reference Designator Manufacturer Part Number 135 8 22 1/32W 5% RNS005 RN1-3,RN14-16, RN20-21 PANASONIC EXB-28V220JX 136 1 3300PF 50V 5% 0603 C198 PANASONIC ECJ-1VB1H332K 137 1 24.0K 1/10W 1% 0603 R176 PANASONIC ERJ-3EKF2402V 138 1 140.0K 1/10W 1% 0603 R181 PANASONIC ERJ-3EKF1403V 139 1 44.2K 1/10W 1% 0603 R348 PANASONIC ERJ-3EKF4422V 140 1 1.91K 1/10W .1% 0603 R180 SUSUMU RG1608P-1911-B-T5 141 1 3.01K 1/10W .1% 0603 R184 SUSUMU RG1608P-3011-B-T1 142 1 20.0K 1/16W 1% 0402 R344 VISHAY CRCW040220K0FKED ADSP-BF518F EZ-Board Evaluation System Manual A-11 A-12 ADSP-BF518F EZ-Board Evaluation System Manual A B C D 1 1 2 2 ADSP-BF518F EZ-BOARD SCHEMATIC 3 3 ANALOG DEVICES 4 Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD TITLE Title Size 20 Cotton Road Rev A0217-2008 0.2 Sheet 12-3-2008_14:30 D 1 of 16 A B C 3.3V A[1:19]_Z U12 A1_Z 107 A2_Z 106 A3_Z 105 A4_Z 103 A5_Z 102 A6_Z 101 A7_Z 97 A8_Z 96 A9_Z 94 A10_Z 93 A11_Z 92 A12_Z 91 A13_Z 86 A14_Z 85 1 A15_Z 84 A16_Z 81 A17_Z 80 A18_Z 78 A19_Z 77 D[0:15]_Z 76 D0 74 D1 73 D2 72 D3 71 D4 70 D5 69 D6 66 D7 65 D8 64 D9 62 D10 61 D11 60 D12 58 D13 57 D14 56 D15 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 D0_Z D1_Z D2_Z D3_Z U12 D5_Z D7_Z 19 ETXD2 D8_Z 18 ERXD2 D9_Z 13 ETXD3 D10_Z 12 ERXD3 D11_Z 11 ERXCLK D12_Z 10 ERXDV D13_Z 6 COL D14_Z 5 SPI0_SSEL1 D15_Z 4 MDC 3 MDIO 108 ABE1#/SDQM1 109 ABE0#/SDQM0 A19 119 SCKE_Z 174 ETXD0 ABE1#/SDQM1_Z 171 ERXD0 ABE0#/SDQM0_Z 168 SWE 110 SA10_Z SCAS 115 SRAS_Z SMS_Z SMS 143 144 48 47 ERXER 121 ARE 122 AWE CLKIN ARE_Z 39 MIITXCLK AWE_ZR3 33 0402 XTAL 125 CLKOUT 38 DR0PRI/SD_D0_Z 37 RSCLK0/SD_D1_Z CLKOUT 36 RFS0/SD_D2_Z 141 DSP_RTXI R1 10K 0402 DSP_RTXO TP10 117 GND TEST 135 PG RTXO 147 EXT_WAKE 127 NC 150 CLKBUF 146 RESET 33 DT0PRI/SD_CMD_Z 32 TSCLK0/SD_CLK_Z PG 31 UART0_TX_Z 130 NMI NMI RESET 34 TFS0/SD_D3_Z RTXI 140 1 PF0/ETXD2/PPID0/SPI1_SSEL2/TACLK6 PJ0/SCL PF1/ERXD2/PPID1/PWM_AH/TACLK7 PJ1/SDA PF2/ETXD3/PPID2/PWM_AL 173 172 R314 0402 R313 0402 33 R199 33 0402 TP9 WAKE 28 UART0_RX_Z 27 AMS2_Z CLKBUF 26 SPI0_SCK_Z ADSP-BF518F LQFP176_SOCKET 25 SPI0_MISO_Z AMS3/SPI0_SEL2 R202 0 0402 PF4/ERXCLK/PPID4/PWM_BL/TACLK1 PF5/ERXDV/PPID5/PWM_CH/TACI0 PH0/DR1PRI/SPI1_SS/RSI_DATA4 PF6/COL/PPID6/PWM_CL/TACI1 PH1/RFS1/SPI1_MISO/RSI_DATA5 PF7/SPI0_SSEL1/PPID7/PWM_SYNC PH2/RSCLK1/SPI1_SCK/RSI_DATA6 PF8/MDC/PPID8/SPI1_SSEL4 PH3/DT1PRI/SPI1_MOSI/RSI_DATA7 PF9/RMIIMDIO/PPID9/TMR2 PH4/TFS1/AOE/SPI0_SSEL3/CUD PF10/ETXD0/PPID10/TMR3 PH5/TSCLK1/ARDY/ECLK/CDG PF11/ERXD0/PPID11/PWM_AH/TACI3 PH6/DT1SEC/UART1_TX/SPI1_SSEL1/CZM PF12/ETXD1/PPID12/PWM_AL PH7/DR1SEC/UART1_RX/TMR7/TACI2 162 PB1/DR1PRI/MMC_D4_Z 161 PB2/RFS1/MMC_D5_Z 160 RSCLK1/MMC_D6_Z 159 ADC_A0/LED1/MMC_D7/OTP_EN_Z 156 SPI0_SSEL3/CUD_Z 155 CDG/ADC_A1/LED2_Z 154 CZM/ADC_A2/LED3_Z 153 DR1SEC_Z PF13/ERXD1/PPID13/PWM_BH PF14/ETXEN/PPID14/PWM_BL PF15/RMII_PHYINT/PPID15/PWM_SYNC 21 SPI0_MOSI_Z R325 0402 33 20 PG0/MIICRS/RMIICRS/HWAIT/SPI1_SSEL3 PG1/ERXER/DMAR1/PWM_CH PG2/MIITXCLK/RMIIREF_CLK/DMAR0/PWM_CL 2 PG3/DR0PRI/RSI_DATA0/SPI0_SSEL5/TACLK3 PG4/RSCLK0/RSI_DATA1/TMR5/TACI5 PG5/RFS0/RSI_DATA2/PPICLK/TMRCLK PG6/TFS0/RSI_DATA3/TMR0/PPIFS1 PG7/DT0PRI/RSI_CMD/TMR1/PPIFS2 PG8/TSCLK0/RSI_CLK/TMR6/TACI6 PG9/DT0SEC/UART0_TX/TMR4 PG10/DR0SEC/UART0_RX/TACI4 PG11/SPI0_SS/AMS[2]/SPI1_SSEL5/TACLK2 PG12/SPI0_SCK/PPICLK/TMRCLK PG13/SPI0_MISO/TMR0/PPIFS1 PG14/SPI0_MOSI/TMR1/PPIFS2/PWM_TRIPB PG15/SPI0_SSEL2/PPIFS3/AMS[3] "BOOT MODE" 3.3V BMODE0 54 TRST R11 10K 0402 55 TMS U19 C1 0.01UF 0402 1 R12 33 0402 4 VDD 3 OUT OE SDA PF3/ERXD3/PPID3/PWM_BH/TACLK0 3.3V 3 SCL 33 AMS0_Z MIICRS/HWAIT 3.3V DSP_CLKIN 165 RMII_PHYINT AMS1_Z SRAS 118 166 ETXEN 120 AMS1 123 AMS0 SA10 114 SCAS_Z 167 ERXD1 SCKE 113 SWE_Z R5 1.2K 0402 D6_Z A17 A18 R4 1.2K 0402 D4_Z ETXD1 2 D R9 0 0402 DSP_CLKIN 51 EMU 53 TCK 50 TDO GND 25MHZ 2 OSC003 52 TDI BMODE1 TRST BMODE2 42 SW1 1 41 2 40 4 3 EMU 2 C 1 0 4 5 TMS 3.3V 6 7 3 SWT027 ROTARY TCK TDO R7 4.7K 0402 TDI R8 4.7K 0402 R6 4.7K 0402 ADSP-BF518F LQFP176_SOCKET 3.3V DSP_RTXI SW1: Boot Mode Select Switch DSP_RTXO POSITION R200 100K 0402 R10 10M 0603 Default PG U3 R201 33.0K 0402 4 1 TERM2 TERM1 3 2 NC2 NC1 C2 18PF 0805 32.768KHZ OSC008 C153 220PF 0402 C3 18PF 0805 BOOT MODE 0 Idle-No Boot 1 Boot from 8 or 16-bit external flash memory 2 Boot from internal SPI memory 3 Boot from external SPI memory 4 Boot from SPI0 host 5 Boot from OTP memory 6 Boot from SDRAM 7 Boot from UART0 host ANALOG DEVICES 4 Size Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD DSP EBIU + CONTROL Title RTC 20 Cotton Road Rev A0217-2008 0.2 Sheet 12-17-2008_11:04 D 2 of 16 A B C D VDDEXT 1 1 VDDEXT C7 10UF 0805 U12 7 VDDEXT1 24 VDDEXT2 35 VDDEXT3 49 VDDEXT4 128 VDDEXT5 129 VDDEXT6 136 VDDEXT7 145 VDDEXT8 148 VDDEXT9 158 VDDEXT10 170 VDDEXT11 VDDMEM C37 10UF 0805 C6 0.1UF 0402 C5 0.1UF 0402 C4 0.1UF 0402 C39 0.1UF 0402 C8 0.01UF 0402 C22 0.01UF 0402 C23 0.01UF 0402 C21 0.01UF 0402 C16 10UF 0805 C9 0.1UF 0402 C25 0.1UF 0402 C19 0.01UF 0402 C18 0.01UF 0402 C20 0.01UF 0402 C17 0.01UF 0402 C27 0.01UF 0402 C26 0.01UF 0402 C24 0.01UF 0402 C38 0.01UF 0402 1 GND1 2 GND2 15 GND3 22 GND4 43 GND5 44 GND6 45 GND7 46 GND8 VDDMEM 67 GND9 83 GND10 87 GND11 88 GND12 59 VDDMEM1 68 VDDMEM2 75 VDDMEM3 82 VDDMEM4 95 VDDMEM5 104 VDDMEM6 112 VDDMEM7 124 VDDMEM8 2 VDDINT C10 10UF 0805 89 GND13 90 GND14 99 GND15 111 GND16 131 GND17 2 132 GND18 133 GND19 134 GND20 137 GND21 14 VDDINT1 23 VDDINT2 30 VDDINT3 63 VDDINT4 79 VDDINT5 98 VDDINT6 100 VDDINT7 116 VDDINT8 138 VDDINT9 152 VDDINT10 164 VDDINT11 VDDFLASH 3.3V D1 MA3X717E 20MA DIO005 16 VDDFLASH1 17 VDDFLASH2 29 VDDFLASH3 126 VDDFLASH4 J12 2 1 3 C34 0.01UF 0402 139 GND22 149 GND23 VDDINT 151 GND24 157 GND25 163 GND26 169 GND27 175 GND28 C15 10UF 0805 C14 0.1UF 0402 C13 0.1UF 0402 C12 0.1UF 0402 C11 0.1UF 0402 C31 0.01UF 0402 C30 0.01UF 0402 C32 0.01UF 0402 C28 0.01UF 0402 C33 0.01UF 0402 C36 0.01UF 0402 176 GND29 GND30 177 VDDFLASH 3 VPPOTP 142 VDDRTC VDDOTP BATT_COIN16MM BATTHOLDER 9 VDDOTP 8 VPPOTP "RTC BATTERY" C40 0.1UF 0603 C41 10UF 0805 C42 0.1UF 0402 C43 0.1UF 0402 C44 0.1UF 0402 C45 0.1UF 0402 ADSP-BF518F LQFP176_SOCKET C35 0.01UF 0402 ANALOG DEVICES 4 Title Size Date B C 20 Cotton Road Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD DSP POWER, BYPASS CAPS Board No. C A C29 0.01UF 0402 Rev A0217-2008 0.2 Sheet 12-17-2008_11:04 D 3 of 16 A B C D 64MB SDRAM (32M x 16) 4 MB FLASH (2M x 16) U14 A[1:19] 3.3V D[0:15]_ZZ 1 U5 A[1:19] A1 FROM TO DEFAULT ALTERNATE FUNCTION / OFF MODE A2 1 DSP (U12) FLASH (U5) ON A3 Expansion Interface A4 2 DSP (U12) FLASH (U5) ON Expansion Interface 3 DSP (U12) FLASH (U5) ON Expansion Interface 4 DSP (U12) FLASH (U5) ON Expansion Interface, SPI FLASH CS A5 A6 A7 A8 A9 A10 A11 3.3V A12 A13 A14 A15 A16 A17 R13 4.7K 0402 2 R14 4.7K 0402 R15 4.7K 0402 R16 4.7K 0402 R269 4.7K 0402 R17 4.7K 0402 A18 A19 "FLASH ENBL" ON 3 4 5 K3 D1 A6 30 G4 D2 A7 31 K4 D3 A8 32 K5 D4 A9 33 G5 D5 A10 34 K6 D6 G6 D7 H3 D8 J3 D9 H4 D1 D2 D3 D4 D5 D6 A5 A6 A7 A8 A9 22 SA10 A10 3.3V A12 35 A13 36 D10 A18 20 J4 D11 A19 21 H5 D12 J6 D13 H6 D14 J7 D15 D7 D8 D9 D10 D11 D12 D13 D14 D15/A-1 C54 0.01UF 0402 A11 A12_NC BA0 BA1 16 SWE 17 CAS 18 SRAS D5_ZZ D6_ZZ D7_ZZ D8_ZZ D9_ZZ D10_ZZ D11_ZZ D12_ZZ D13_ZZ D14_ZZ D15_ZZ 19 CS 37 CKE 38 CLK WE SCAS D4_ZZ RAS SMS SCKE CLKOUT 15 DQML ABE0#/SDQM0 2 39 DQMH ABE1#/SDQM1 MT48LC32M16A2TG-75 TSOP54 CE J2 OE C47 0.1UF 0402 C5 SN74AUC1G00 SOT23-5 WE D4 VPP/WP~ U24 1 A4 D3_ZZ RY/BY~ SN74LVC1G08 SOT23-5 2 DIP4 SWT018 29 D0 A5 H2 2 4 4 A3 D0 C4 U25 4 U13 1 A2 1 D2_ZZ BYTE 1 6 26 D1_ZZ RESET 7 3 AMS3/SPI0_SEL2 2 2 AMS2 1 AMS1 A4 A1 H7 SN74LVC1G08 SOT23-5 8 25 D5 2 1 24 A3 D0_ZZ 3.3V 4 AMS0 A2 2 DQ0 4 DQ1 5 DQ2 7 DQ3 8 DQ4 10 DQ5 11 DQ6 13 DQ7 42 DQ8 44 DQ9 45 DQ10 47 DQ11 48 DQ12 50 DQ13 51 DQ14 53 DQ15 A0 G3 U23 1 SW3 D[0:15] 23 M29W320EB TFBGA63_80 4 C48 0.1UF 0402 C49 0.01UF 0402 C50 0.01UF 0402 C51 0.01UF 0402 C52 0.01UF 0402 C53 0.01UF 0402 K2 K7GND1 GND2 POS. G2 A0 F2 A1 E2 A2 C2 A3 D2 A4 F3 A5 E3 A6 C3 A7 D6 A8 C6 A9 E6 A10 F6 A11 D7 A12 C7 A13 E7 A14 F7 A15 G7 A16 D3 A17 E4 A18 F5 A19 F4 A20 J5 VDD SW3: FLASH ENABLE A1 2 SN74LVC1G08 SOT23-5 RESET ARE AWE JP3 3 1 SHORTING JUMPER DEFAULT=NOT INSTALLED 2 "FLASH WP" 3 3.3V SJ1 16 Mb SPI FLASH IDC2X1 MEMORY MAP ADDRESS RANGE SELECT LINE TYPE 0x2030 0000 - 0x203F FFFF ASYNC BANK 3 FLASH 0x2020 0000 - 0x202F FFFF ASYNC BANK 2 FLASH 0x2010 0000 - 0x201F FFFF ASYNC BANK 1 FLASH 0x2000 0000 - 0x200F FFFF ASYNC BANK 0 FLASH 0x0000 0000 - 0x03FF FFFF NONE R18 10K 0402 R20 10K 0402 R21 10K 0402 U9 SPI0_MOSI SPI0_SCK SDRAM JP16 1 AMS3/SPI0_SEL2 3.3V 8 VCC 5 SI 6 SCK 1 CS 3 WP 7 HOLD 2 IDC2X1_SMT M25P16 SO8W "SPI FLASH CS ENBL" 2 SPI0_MISO SO GND 4 3.3V SJ9 SHORTING JUMPER DEFAULT=NOT INSTALLED C58 0.01UF 0402 4 C57 0.01UF 0402 C56 0.01UF 0402 R19 10K 0402 C55 0.01UF 0402 ANALOG DEVICES C46 0.01UF 0402 Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD EXTERNAL MEMORY Title Size 20 Cotton Road Rev A0217-2008 0.2 Sheet 1-16-2009_12:36 D 4 of 16 A B C D PS_5V DIFFERENTIAL INPUTS SJ10 SHORTING JUMPER DEFAULT=2&3 J20 SMA 1 U29 3 +12V;8 R222 0 0402 R216 10 0603 1 JP17 2 AD8022 MSOP8 1 2 V1+ R215 0 0402 JP24 AD8022 MSOP8 SHORTING JUMPER DEFAULT=2&3 V2+ 3 C165 10PF 0805 IDC3X1 R221 0 0402 AGND SJ12 2 2 3 C160 10PF 0805 IDC3X1 SHORTING JUMPER DEFAULT=2&3 SJ17 AGND AGND R217 0 0402 1 R219 10 0603 U29 5 R225 0 0402 1 JP18 2 6 AD8022 MSOP8 2 V1- AD8022 MSOP8 3 C162 10PF 0805 R218 0 0402 2 6 C167 10PF 0805 IDC3X1 R224 0 0402 C163 10PF 0805 J22 SMA R228 0 0402 1 2 2 1 3 R237 10 0603 U32 1 2 AD8022 MSOP8 2 V3+ C169 10PF 0805 R227 0 0402 2 2 AD8022 MSOP8 3 C174 10PF 0805 R236 0 0402 AGND 15 14 13 VB2 VB3 VB4 RANGE ADC_A0/LED1/MMC_D7/OTP_EN VB6 SHORTING JUMPER DEFAULT=INSTALLLED CZM/ADC_A2/LED3 2 REF_SELECT 4 DCAPA 20 DCAPB VB5 SJ2 CDG/ADC_A1/LED2 Install for a range of 2 X Vref (0-5V) Remove for a range of Vref (0-2.5V) DCAPA DCAPB C59 0.47UF 0805 R26 10K 0402 C60 0.47UF 0805 2 C190 0.1UF 0402 C189 0.1UF 0402 V4+ 3 IDC3X1 2 JP22 1 1 2 16 VB1 AGND JP19 1 17 +12V R235 0 0402 R226 10 0603 U30 3 18 V4- J25 SMA ADC_CS 21 RANGE 22 SGL/DIFF~ 25 A0 24 A1 23 A2 VA6 VSE4 AGND 1 VA5 VSE3 C166 10PF 0805 JP4 ADC_SCLK IDC2X1_SMT 12 V4+ AGND "ADC RANGE" DOUTB 5 6AGND1 19AGND2 1AGND3 29DGND1 DGND2 AGND DOUTA 11 V3- IDC3X1 1 VA4 V3+ SHORTING JUMPER DEFAULT=2&3 V2- 10 VSE2 SJ15 3 VA3 VSE1 SHORTING JUMPER DEFAULT=2&3 JP23 1 7 VA2 9 V2- SJ14 R223 10 0603 U31 1 7 2 5 8 V1- SHORTING JUMPER DEFAULT=2&3 30 DOUTA 28 DOUTB 27 SCLK 26 CS VA1 V2+ SJ16 J21 SMA 3.3V 7 V1+ SHORTING JUMPER DEFAULT=2&3 C164 10PF 0805 J19 SMA U2 SJ13 AGND C161 10PF 0805 FER1 330 0805 SHORTING JUMPER DEFAULT=2&3 1 1 -12V;4 2 3 1 1 2 SJ11 R220 10 0603 U31 3 AVDD32 VDD31 VDRIVE J18 SMA R214 0 0402 3.3V C191 0.1UF 0402 C192 0.1UF 0402 C193 0.1UF 0402 C194 0.1UF 0402 IDC3X1 AGND AGND AGND 3.3V C168 10PF 0805 C175 10PF 0805 AGND J23 SMA PS_5V AVDD_ADC -12V AGND AGND J24 SMA R231 0 0402 1 R229 10 0603 U30 5 R232 0 0402 1 R234 10 0603 U32 JP20 1 7 2 5 2 6 AD8022 MSOP8 2 V3- 3 C171 10PF 0805 R230 0 0402 2 6 AD8022 MSOP8 C211 0.1UF 0402 JP21 1 7 C212 0.1UF 0402 C213 0.1UF 0402 C216 0.1UF 0402 C215 0.1UF 0402 C214 0.1UF 0402 C61 10UF 0805 C64 10UF 0805 C62 0.1UF 0402 C63 0.1UF 0402 C66 10UF 0805 C65 0.1UF 0402 V4- 3 C172 10PF 0805 IDC3X1 R233 0 0402 IDC3X1 AGND AGND AGND C170 10PF 0805 J17 SMA C173 10PF 0805 AGND AGND R210 0 0402 AGND 3 1 R208 10 0603 U33 3 3 JP28 1 1 SW22 SMA_VSE3 6 SMA_VSE4 SWT017 DIP6 5 8 6 7 SJ20 R212 0 0402 1 U33 5 1 4 VSE2 2 3 C159 10PF 0805 1 2 2 AD8022 MSOP8 IDC3X1 R239 0 0402 AGND AGND 5 R207 10 0603 U34 3 C176 10PF 0805 IDC3X1 AGND C178 10PF 0805 ADC_SCLK ADC_CS IDC3X1 ANALOG DEVICES AGND AGND Board No. C Date C 20 Cotton Road Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD ADC Title AGND B 5 VSE4 Size A 4 DOUTB 3 C155 10PF 0805 C177 10PF 0805 6 1 AGND C158 10PF 0805 3 DOUTA "SPORT1 ENBL" 2 R206 0 0402 VSE3 7 JP27 6 AD8022 MSOP8 JP26 1 2 R211 0 0402 U34 1 6 AD8022 MSOP8 3 2 DIP4 SWT018 7 2 8 SW4 disconnects DSP from ADC R205 0 0402 R240 10 0603 JP25 7 2 SHORTING JUMPER DEFAULT=2&3 1 R238 0 0402 R213 10 0603 PB2/RFS1/MMC_D5 J16 SMA J26 SMA J7 SMA DR1SEC C156 10PF 0805 SJ19 1 PB1/DR1PRI/MMC_D4 RSCLK1/MMC_D6 SHORTING JUMPER DEFAULT=2&3 SINGLE ENDED INPUTS SW4 IDC3X1 AGND SJ18 SWT017 DIP6 C157 10PF 0805 R209 0 0402 SHORTING JUMPER DEFAULT=2&3 VSE1 3 4 7 9 2 AD8022 MSOP8 3 6 5 SMA_VSE1 SMA_VSE2 4 SHORTING JUMPER DEFAULT=2&3 LHPOUT_RDIV 2 2 8 10 6 5 SMA_V4- 3 5 9 11 4 4 4 SMA_V4+ SMA_V3- 2 2 ON 3 SMA_V3+ SMA_V2- SJ21 12 1 10 ON 3 SMA_V1- 3 11 RHPOUT_RDIV 1 2 2 2 SMA_V2+ 12 1 1 SMA_V1+ SW23 ON 1 Rev A0217-2008 0.2 Sheet 12-10-2008_14:21 D 5 of 16 A B J4 J5 HP OUT MIC IN C "MIC GAIN" D SW4: MIC GAIN 3.3V 1 ON SW5 1 R47 40.2K 0402 7 3 6 4 5 3 4 GAIN 1 5 (14dB) 2 1 (0dB) 3 0.5 (-6dB) 8 2 2 R41 90.9K 0402 POS. DEFAULT 3.3V C88 10UF 0805 C74 220PF 0402 DNP C87 0.1UF 0402 C86 0.1UF 0402 5 4 R247 5.6K 0402 FER4 600 0603 AGND "MIC" MICIN_RDIV 22 MICBIAS_Z 21 DBVDD AVDD DGND AGND C72 0.1UF 0402 18 FER20 330 0805 AGND MICIN MICBIAS HPVDD HPGND C91 220PF 0402 DNP IDC3X1 "MIC SELECT" J5 HPVDD 12 C75 10UF 0805 LLINEIN_RDIV 24 RLINEIN_RDIV 23 C76 0.1UF 0402 AUDIO CODEC INTERFACE MODE: SW6.3 ON and SW6.4 OFF = SPI MODE SW6.3 OFF and SW6.4 ON = TWI MODE LLINEIN RLINEIN SHORTING JUMPER DEFAULT=2&3 LHPOUT AGND MICBIAS FER5 600 0603 1 R45 5.6K 0402 RHPOUT C80 1UF 0603 CODEC_DACLRC LLINEIN CODEC_DACDAT LEFT_LPBK FER2 600 0603 RIGHT_LPBK RLINEIN CT4 220UF D2E AGND SJ3 5 AUDIO_MODE 15 MICIN 8 5 1 SW6 allows the MICIN signal to be looped back, for test purposes, to the Left and Right headphone. DO NOT switch positions 1 & 2 ON at the same time. Ensure that JP15 is on 2&3 or OFF when using SW6. 3 7 4 RHPOUT_RDIV 19 2 "LINE IN" 4 6 R56 10K 0402 DCVDD R42 680 0402 JP15 1 FER3 600 0603 C71 10UF 0805 U1 3 3 3 LHPOUT_RDIV DIP4 SWT018 R46 47.0K 0402 2 7 4 AVDD 8 2 3 FER19 330 0805 LINE IN 2 ON NC C79 1UF 0603 LINE OUT SW6 1 MICIN 2 1 4 R57 10K 0402 3.3V 1 DIP4 SWT018 "MIC/HP LPBK" "AUDIO MODE" R40 5.6K 0402 C81 1UF 0603 CODEC_ADCDAT CODEC_ADCLRC BCLK 6 9 8 10 11 7 13 LHPOUT 14 RHPOUT DACLRC R53 0 0603 ADCDAT LOUT ADCLRC ROUT 16 LOUT 17 ROUT CT3 220UF D2E R52 0 0603 C69 100PF 0603 C70 100PF 0603 R43 5.6K 0402 C195 220PF 0402 R44 5.6K 0402 25 AUDIO_MODE C196 220PF 0402 26 CSB 27 28 SCLK 3.3V SDIN VMID R51 47.0K 0402 7 LEFT_LPBK 6 8 RIGHT_LPBK ROUT_RDIV 20 5 6 VMID 2 1 SCLK SSM2602 ICS009 XTO SDIN AGND CLKOUT 4 LOUT_RDIV MODE CSB 3 1 R50 47.0K 0402 XTI/MCLK C68 100PF 0603 FER7 600 0603 RHPOUT_RDIV CT2 10UF CAP002 BCLK 2 J4 2 CON050 C67 100PF 0603 "LINE OUT" LHPOUT_RDIV CT1 10UF CAP002 DACDAT "HEAD PHONE" FER8 600 0603 CON050 AGND AGND AGND AGND "AUDIO CLK" R59 10K 0402 3.3V MICIN_RDIV LLINEIN_RDIV U20 RLINEIN_RDIV 1 OE R248 1.0M 0402 3 3 OUT FER6 600 0603 R54 100 0402 FER9 600 0603 AGND AUDIO_CLK GND 12MHZ 2 OSC003 C73 0.01UF 0402 R250 1.0M 0402 R249 1.0M 0402 R60 33 0402 4 VDD R49 100 0402 3 R55 47.0K 0402 R48 47.0K 0402 C82 100PF 0603 C83 100PF 0603 C85 100PF 0603 C84 100PF 0603 AGND FER21 330 0805 "SPORT0 ENBL" "SPI/TWI" SW15 ON SDA SPI0_SCK ON SPI0_MOSI 11 3 10 4 9 5 8 6 7 6 SCL 4 C89 0.1UF 0402 C77 1000PF 0805 DNP R58 10K 0402 12 2 5 DIP6 SWT017 1 4 7 SPI0_SSEL3/CUD CODEC_ADCLRC BCLK C90 10UF 0805 SW16 3 6 CODEC_ADCDAT AGND AGND CODEC_DACDAT 2 8 CODEC_DACLRC 1 9 5 6 RSCLK0/SD_D1 4 5 TSCLK0/SD_CLK 11 10 4 RFS0/SD_D2 12 3 3 DR0PRI/SD_D0 2 2 DT0PRI/SD_CMD 1 1 TFS0/SD_D3 AGND VMID 3.3V CSB C78 1000PF 0805 DNP ANALOG DEVICES SDIN SCLK AGND DIP6 SWT017 AUDIO CODEC MODE INTERFACE: SPI MODE: ON, OFF, ON, OFF TWI MODE: OFF, ON, OFF, ON Size A B Board No. C Date C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD AUDIO CODEC Title SW15 disconnects DSP from AUDIO CODEC 20 Cotton Road Rev A0217-2008 0.2 Sheet 12-10-2008_14:21 D 6 of 16 A B C D R68 49.9 0603 VCCO_SW SMDIO MDIO R71 49.9 0603 3.3V VCCPLL_SW VCCA_SW VCC3A_SW SMDC MDC R72 49.9 0603 SCRS MIICRS/HWAIT R73 49.9 0603 1 SCOL COL R75 49.9 0603 U4 SMRXD0 ERXD0 3.3V R76 49.9 0603 SMRXD1 ERXD1 SMRXD2 R355 10K 0402 R74 49.9 0603 MDC SCRS SCRS 86 SCOL SCOL 85 SMRXD0 84 SMRXD2 SMRXD3 81 SMRXDV SMRXDV 80 SMRXC SMRXC SMRXC ERXCLK 77 ERXER SMTXC/REFCLK SMTXER R353 10K 0402 RMII_PHYINT SMTXD0 74 SMTXD1 SMTXD1 73 SMTXD2 SMTXD2 SMTXER 72 70 LEDSEL0 23 LEDSEL1 71 SMTXEN SMTXEN SMTXD0 ETXD0 R81 49.9 0603 99 SPIS 98 SDA 97 SCL 96 SPIQ SPIS SSDA SMTXD1 ETXD1 SSCL R80 49.9 0603 SPIQ SMTXER 68 UNUSED1 69 UNUSED2 92 UNUSED3 93 UNUSED4 102 UNUSED5 103 UNUSED6 104 UNUSED7 105 UNUSED8 108 UNUSED9 109 UNUSED10 110 UNUSED11 111 UNUSED12 112 UNUSED13 113 UNUSED14 114 UNUSED15 115 UNUSED16 116 UNUSED17 117 UNUSED18 118 UNUSED19 119 UNUSED20 120 UNUSED21 121 UNUSED22 124 UNUSED23 125 UNUSED24 126 UNUSED25 SMTXD2 ETXD2 R83 49.9 0603 R354 10K 0402 SMTXD3 ETXD3 30 P1ANEN P1ANEN 31 P1SPD P1SPD 32 P1DPX P1DPX R84 49.9 0603 33 P1FFC P1FFC SMTXEN ETXEN 13 P2ANEN P2ANEN 14 P2SPD P2SPD 15 P2DPX P2DPX 16 P2FFC P2FFC 29 P2MDIX P2MDIX 28 P2MDIXDIS 12 ADVFC 26 RMIIEN 27 HWPOVR 89 SCONFIG0 88 SCONFIG1 101 PS0 100 PS1 P2MDIXDIS ADVFC HWPOVR 3 SCONFIG0 SCONFIG1 3.3V PS0 PS1 R86 10K 0402 R85 10K 0402 PWRDN 36 PWRDN RESET 67 RESET 65 X1 66 X2 CLKBUF "ETHERNET MODE" SW17 5 8 6 7 SPIS SPIQ SSDA KS8893M PQFP128 7 21DGND1 78DGND2 90DGND3 106DGND4 122DGND5 DGND6 37 39ADGND1 42ADGND2 47ADGND3 54ADGND4 58ADGND5 62ADGND6 64ADGND7 ADGND8 ON 4 9 6 SCL 10 4 5 SPI0_SCK 3 4 SDA 11 3 SPI0_MOSI 12 2 2 SPI0_MISO 1 1 SPI0_SSEL1 TXM2 RXP2 RXM2 P1LED0 P1LED1 P1LED2 P1LED3 P2LED0 P2LED1 P2LED2 3.3V P2LED3 VCC3A_SW 2 SMTXD3 SMTXD3 R82 49.9 0603 6 P2LED0 5 P2LED1 4 P2LED2 20 P2LED3 75 SMTXD0 R78 33 0402 TXP2 76 SMTXER MIITXCLK RXM1 SMTXC/REFCLK SMTXC/REFCLK R66 33 0402 3 P1LED0 2 P1LED1 1 P1LED2 25 P1LED3 82 SMRXD3 R67 33 0402 RXP1 83 SMRXD2 SMRXDV TXM1 SMRXD1 SMRXD1 SMDIO ERXDV 56 TXP2 55 TXM2 53 RXP2 52 RXM2 87 SMRXD3 R79 49.9 0603 TXP1 94 SMRXD0 ERXD3 48 TXP1 49 TXM1 45 RXP1 46 RXM1 MDIO SMDC ERXD2 2 95 SMDIO R77 49.9 0603 8 VDDIO079 VDDIO1107 VDDIO2 22 VDDC091 VDDC1123 VDDC2 38 VDDA043 VDDA157 VDDA2 63 VDDAP 51 VDDARX50 VDDATX 1 40 MUX1 41 MUX2 44 FXSD1 59 TEST1 60 TEST2 61 ISET 127 TESTEN 128 SCANEN LEDSEL0 FER13 600 0603 LEDSEL1 3.3V C94 10UF 0805 C93 0.01UF 0402 AGND VCCO_SW VCCPLL_SW VCCA_SW FER14 600 0603 FER12 600 0603 C95 10UF 0805 C96 0.01UF 0402 C97 0.01UF 0402 C98 10UF 0805 C99 0.01UF 0402 C100 0.01UF 0402 C106 10UF 0805 C105 0.01UF 0402 C104 0.01UF 0402 3 AGND R61 1.0K 0402 R69 0 0805 R63 3.01K 0402 SHGND R64 1.0K 0402 R65 1.0K 0402 ANALOG DEVICES Size Board No. C Date C 20 Cotton Road Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD ETHERNET SWITCH Title AGND B C103 0.01UF 0402 R70 100 0402 DIP6 SWT017 A C102 0.01UF 0402 R62 1.0K 0402 SSCL SPI MODE: ON,ON,ON, OFF, ON, OFF TWI MODE: OFF,OFF,OFF, ON, OFF, ON C101 10UF 0805 C92 0.01UF 0402 Rev A0217-2008 0.2 Sheet 12-3-2008_14:30 D 7 of 16 A B C D 3.3V 3.3V PORT 1 CONFIG SJ24 SHORTING JUMPER DEFAULT=NOT INSTALLLED "ETHERNET CFG" R106 10K 0402 R108 10K 0402 R107 10K 0402 R117 10K 0402 R115 10K 0402 R87 10K 0402 3.3V 1 3.3V SW7 1 ADVFC 3 6 HWPOVR 3 P1SPD PS1 4 5 1 2 3 4 Force Flow Control Force Full/Half Force Speed Auto-Negotiation JP11 1 Position Function OFF Disable ON Enable OFF Half Duplex ON Full Duplex OFF 10BaseT ON 100BaseTX OFF ON JP12 2 1 LEDSEL0 5 DIP4 SWT018 R103 1.0K 0402 SW7: Port 1 Configuration Switch Description 6 4 DIP4 SWT018 7 3 4 PS0 1 "LED SEL1" 8 2 3 4 P1ANEN 1 2 7 1 2 2 P1DPX "LED SEL0" SW8 8 ON ON 1 P1FFC Switch SHORTING JUMPER DEFAULT=INSTALLLED SJ23 "PORT 1 CFG" 2 R91 1.0K 0402 R116 1.0K 0402 LEDSEL1 R93 1.0K 0402 SW8: Ethernet Configuration Switch Switch 1 2 3,4 Description Advertise Flow Control Hardware Pin Overwrite Serial Bus Mode Position Function OFF Disable ON Enable OFF Enable ON Disable OFF OFF Not Used Enable OFF ON TWI Slave Disable ON OFF SPI Slave ON ON Not Used JPx: LED Configuration Switch OFF OFF 2 OFF ON ON OFF ON PxLED3 tri-state,PD tri-state,PD ACT NU PxLED2 LINK/ACT 100LINK/ACT LINK NU PxLED1 FULL DPX/COL 10LINK/ACT FULL DPX/COL NU PxLED0 SPEED FULL DPX SPEED NU ON 2 PS1 R94 1.0K 0402 PS0 P1LED3 3.3V R271 1.0K 0402 R272 1.0K 0402 PORT 2 3.3V "PORT 2 CFG" R110 10K 0402 R111 10K 0402 R112 10K 0402 R113 10K 0402 LED10 YELLOW LED009 R114 10K 0402 P1LED0 SW18 1 11 3 10 4 9 5 8 6 7 3 P2SPD 4 P2ANEN 5 P2MDIXDIS 6 P2MDIX Switch 1 2 3 4 5 6 Description Force Flow Control Force Full/Half Force Speed Auto-Negotiation Auto MDI/MDI-X MDI/MDI-X Setting Position Function OFF Disable ON Enable OFF Half Duplex ON Full Duplex OFF 10BaseT ON 100BaseTX OFF Enable ON Disable OFF Enable ON Disable OFF MDI-X ON MDI LED12 YELLOW LED009 PORT 1 R89 10K 0402 R97 270 0603 P1LED2 "ETHERNET PD" LED4 YELLOW LED009 JP13 SCONFIG0 R109 1.0K 0402 SW18: Port 2 Configuration Switch R96 270 0603 P1LED1 DIP6 SWT017 3 LED11 YELLOW LED009 12 2 2 P2DPX 3.3V ON 1 P2FFC R95 270 0603 1 2 R98 270 0603 PWRDN P1LED3 3 SCONFIG1 R88 1.0K 0402 R105 1.0K 0402 SJ22 SHORTING JUMPER DEFAULT=NOT INSTALLLED LED5 YELLOW LED009 R99 270 0603 P2LED0 LED6 YELLOW LED009 R100 270 0603 P2LED1 PHY mode MII Power Down LED7 YELLOW LED009 PORT 2 R101 270 0603 P2LED2 LED8 YELLOW LED009 R102 270 0603 P2LED3 ANALOG DEVICES 4 Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD ETHERNET CONFIG/LEDS Title Size 20 Cotton Road Rev A0217-2008 0.2 Sheet 12-10-2008_14:21 D 8 of 16 A B C D VCC3A_SW PORT 1 J15 U28 1 TXP1 1 2 3 TXM1 TD+ TX+ 1 16 1 2 TCT TD1CT:1CT TXTCM 14 3 15 4 5 6 RXP1 7 8 RXM1 RD+ RX+ 7 RCT RD- RX- C108 0.1UF 0402 10 NC4 NC3 NC2 8 9 13 HX1188 ICS007 12 R121 49.9 0603 5 R120 49.9 0603 4 R119 49.9 0603 NC1 TCM_ R118 49.9 0603 6 11 R136 75.0 0603 R138 49.9 0603 R139 49.9 0603 R137 49.9 0603 R135 49.9 0603 C107 10UF 0805 C109 0.1UF 0402 R134 49.9 0603 R133 49.9 0603 C114 1000PF 1206 2 2 SHGND VCC3A_SW PORT 2 U27 1 TXP2 2 3 TXM2 J14 TD+ TX+ 1 16 2 TCT TD1CT:1CT TXTCM 14 3 15 4 5 6 RXP2 7 8 RXM2 RD+ RX+ 7 RCT RD- RX- C110 0.1UF 0402 C113 0.1UF 0402 NC3 8 9 10 NC4 13 HX1188 ICS007 12 R122 49.9 0603 NC2 R132 49.9 0603 5 R131 49.9 0603 4 R123 49.9 0603 NC1 TCM_ 3 6 11 3 R127 75.0 0603 R125 49.9 0603 R124 49.9 0603 R126 49.9 0603 R128 49.9 0603 C111 10UF 0805 R129 49.9 0603 R130 49.9 0603 C112 1000PF 1206 SHGND ANALOG DEVICES 4 Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD ETHERNET JACKS Title Size 20 Cotton Road Rev A0217-2008 0.2 Sheet 12-3-2008_14:30 D 9 of 16 A B C D 3.3V All USB interface circuitry is considered proprietary and has been omitted from this schematic. When designing your JTAG interface please refer to the Engineer to Engineer Note EE-68 which can be found at "ENCODER ENABL" http://www.analog.com R140 511.0 0402 "ENCODER" 1 R141 511.0 0402 R142 511.0 0402 1 3.3V SW14 COMMON 2 5 5 3 4 ON SW2 6 3 SW1 1 2 B SW19 1 1 A 4 6 SPI0_SSEL3/CUD "JTAG" CDG/ADC_A1/LED2 CZM/ADC_A2/LED3 DIP3 SWT015 R144 10K 0402 R145 10K 0402 PS_5V 3.3V DA_PWR VDD_EXT_DSP 2 P1 TP1 3.3V 3.3V "UART 0" C116 0.1UF 0402 U21 R270 10K 0402 C117 0.1UF 0402 1 C1+ 3 C1V+ C115 0.1UF 0402 2 4 C2+ 5 C2- V- J2 2 7 3 6 4 5 3 UART0_RX 4 5 6 TMS 7 8 TCK 9 10 TRST 11 12 TDI 13 14 TDO RESET RESET DA_SOFT_RESET DA_SOFT_RESET DA_STANDALONE R143 10K 0402 1 6 6 2 4 11 14 T1IN T1OUT 10 7 T2IN T2OUT 12 13 R1OUT R1IN 9 8 R2OUT R2IN ADM3202ARNZ SOIC16 8 2 2 MIICRS/HWAIT 3 7 ON 1 UART0_TX 2 IDC7X2_SMTA SW10 1 EMU 1 GND ROTARY_ENC_EDGE SWT025 TP12 DIP4 SWT018 2 3 8 4 9 3.3V 5 CON038 C118 0.1UF 0402 "UART0 SETUP" (UART 0) R203 10K 0402 R149 22 0402 3.3V MMC_D0 DR0PRI/SD_D0 R146 22 0402 9 R148 22 0402 "eMMC ENABL" MMC_D3 TFS0/SD_D3 3 ON 1 2 3 2 MMC_CMD DIP2 SWT020 SW20 1 15 3 14 4 13 5 12 6 11 7 10 8 9 3 MMC_D2 4 MMC_D3 6 PB1/DR1PRI/MMC_D4 5 R241 22 0402 7 PB2/RFS1/MMC_D5 8 R242 22 0402 16 2 2 MMC_D1 ON 1 MMC_D0 W6 CLK W5 CMD H3 D0 H4 D1 H5 D2 J2 D3 J3 D4 J4 D5 J5 D6 J6 D7 DIP8 SWT016 MTFC2GDKDM FBGA169 M6 VCC1N5 VCC2T10 VCC3U9 VCC4K6 VCCQ1W4 VCCQ2Y4 VCCQ3AA3 VCCQ4AA5 VCCQ5 U16 4 DAT1 DAT2 C154 0.01UF 0402 CD/DAT3 CLK CMD CON051 MMC_CLK TSCLK0/SD_CLK 5 2 R150 22 0402 3 R151 22 0402 2GB eMMC MMC_CMD DT0PRI/SD_CMD "SD CARD" M7 P5VSS1 R10VSS2 U8VSS3 K4VSS4 Y2VSSQ1 Y5VSSQ2 AA4VSSQ3 AA6VSSQ4 K2VSSQ5 VDDI SW21 1 1 DAT0 GND1 GND2 MMC_D2 RFS0/SD_D2 MMC_CLK 8 3 6 3.3V VDD J13 7 R147 22 0402 4 MMC_D1 RSCLK0/SD_D1 3.3V R243 22 0402 C188 0.1UF 0402 RSCLK1/MMC_D6 R244 22 0402 4 C179 0.01UF 0402 ADC_A0/LED1/MMC_D7/OTP_EN C180 0.01UF 0402 C181 0.01UF 0402 C182 0.01UF 0402 C183 0.01UF 0402 C184 0.01UF 0402 C186 0.01UF 0402 C185 0.01UF 0402 ANALOG DEVICES C187 0.01UF 0402 Title Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD ROTARY ENCODER, JTAG, RS232, RSI Board No. C Date 20 Cotton Road Rev A0217-2008 0.2 Sheet 1-15-2009_11:11 D 10 of 16 A B C D LOGIC ANALYZER COMPRESSION LAND GRID ARRAY 1 A[1:19] 1 P5 A1 A1 A2 A2 A3 A3 A4 A4 A5 A6 A7 CLKOUT A8 A9 A5 A10 A6 A11 A12 A7 A13 A8 A14 A15 A9 A16 A10 A17 A18 2 A11 A19 A12 A20 A21 A13 A22 A14 A23 A24 A15 A25 A16 A26 A27 D0 D1 GND0 D4 D5 GND1 CLK1+ CLK1GND2 D10 D11 GND3 D14 D15 GND4 D18 D19 GND5 D22 D23 GND6 D24 D25 GND7 D28 D29 GND8 DMAX_ALT DNP P7 P6 B1 GND9 B2 D2 B3 D3 B4 GND10 B5 D6 B6 D7 B7 GND11 B8 D8 B9 D9 B10 GND12 B11 D12 B12 D13 B13 GND13 B14 D16 B15 D17 B16 GND14 B17 D20 B18 D21 B19 GND15 B20 CLK2B21 CLK2+ B22 GND16 B23 D26 B24 D27 B25 GND17 B26 D30 B27 D31 D[0:15] AMS0 D0 A1 D1 A2 D0 D1 A3 GND0 AMS1 AMS3/SPI0_SEL2 D2 A4 D3 A5 D4 D5 A6 GND1 ARE A7 CLK1+ CLKBUF A8 CLK1- AMS2 A9 GND2 ABE1#/SDQM1 SCAS D4 A10 D5 A11 D10 D11 A12 GND3 SCKE ABE0#/SDQM0 D6 A13 D7 A14 D14 D15 A15 GND4 SMS SWE D8 A16 D9 A17 D18 D19 A18 GND5 SRAS D10 A19 D11 A20 D22 D23 A21 GND6 AWE SA10 D12 A22 D13 A23 A17 D24 D25 A24 GND7 A19 A18 D14 A25 D15 A26 D28 D29 A27 GND8 DMAX_ALT DNP B1 MDC GND9 B2 D2 B3 D3 MDIO ETXD0 ETXD1 B4 SPI0_SSEL1 GND10 B5 D6 B6 D7 B7 GND11 B8 D8 B9 D9 B10 GND12 B11 D12 B12 D13 B13 GND13 B14 D16 B15 D17 B16 GND14 B17 D20 B18 D21 B19 GND15 B20 CLK2B21 CLK2+ B22 GND16 B23 D26 B24 D27 B25 GND17 B26 D30 B27 D31 ETXD2 SPI0_SSEL3/CUD ETXD3 SPI0_SCK ERXD0 ERXD1 SPI0_MISO ERXD2 SPI0_MOSI ERXD3 CDG/ADC_A1/LED2 ETXEN CZM/ADC_A2/LED3 ERXDV SCL ERXER SDA PB1/DR1PRI/MMC_D4 PB2/RFS1/MMC_D5 ERXCLK RSCLK1/MMC_D6 MIITXCLK ADC_A0/LED1/MMC_D7/OTP_EN MIICRS/HWAIT DR1SEC RMII_PHYINT RESET COL A1 D0 A2 D1 A3 GND0 A4 D4 A5 D5 A6 GND1 A7 CLK1+ A8 CLK1A9 GND2 A10 D10 A11 D11 A12 GND3 A13 D14 A14 D15 A15 GND4 A16 D18 A17 D19 A18 GND5 A19 D22 A20 D23 A21 GND6 A22 D24 A23 D25 A24 GND7 A25 D28 A26 D29 A27 GND8 DMAX_ALT DNP B1 GND9 B2 D2 B3 D3 B4 GND10 B5 D6 B6 D7 B7 GND11 B8 D8 B9 D9 B10 GND12 B11 D12 B12 D13 B13 GND13 B14 D16 B15 D17 B16 GND14 B17 D20 B18 D21 B19 GND15 B20 CLK2B21 CLK2+ B22 GND16 B23 D26 B24 D27 B25 GND17 B26 D30 B27 D31 DR0PRI/SD_D0 RSCLK0/SD_D1 RFS0/SD_D2 TFS0/SD_D3 DT0PRI/SD_CMD TSCLK0/SD_CLK UART0_TX UART0_RX 2 3 3 ANALOG DEVICES 4 Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD LOGIC ANALYZER CONN Title Size 20 Cotton Road Rev A0217-2008 0.2 Sheet 12-3-2008_14:30 D 11 of 16 A B C D 3.3V 3.3V 3.3V R162 10K 0402 R161 10K 0402 R163 10K 0402 R164 10K 0402 "PB1" U10 R165 100 0805 R166 10 0603 U6 1 1 C122 0.01UF 0402 SW12 MOMENTARY SWT024 2 2 ADC_A0/LED1/MMC_D7/OTP_EN 4 1A1 CDG/ADC_A1/LED2 1A2 6 CZM/ADC_A2/LED3 1A3 8 74LVC14A SOIC14 11 1A4 C123 1UF 0805 2A1 13 15 2A2 2A3 17 1 2A4 "PB ENABLE" "PB2" 1 LED2 YELLOW LED001 LED3 YELLOW LED001 9 2Y1 7 2Y2 5 2Y3 3 2Y4 R159 330 0603 OE1 19 R168 10K 0402 3.3V 18 1Y1 16 1Y2 14 1Y3 12 1Y4 R158 330 0603 LED1 YELLOW LED001 R160 330 0603 LED13 GREEN LED001 "POWER" R157 330 0603 OE2 IDT74FCT3244APY SSOP20 2 4 2 3 1 ON U6 SW13 MOMENTARY SWT024 SW2 R169 10 0603 1 R167 100 0805 4 PB1/DR1PRI/MMC_D4 3 PB2/RFS1/MMC_D5 DIP2 SWT020 74LVC14A SOIC14 C124 1UF 0805 2 2 SW2: GPIO enable POS. FROM 1 push button 1 DSP (U12, PH0) ON ON (PB1), OFF eMMC, ADC, Expansion Interface) 2 push button 2 DSP (U12, PH1) ON ON ( PB2), OFF eMMC, ADC, Expansion Interface) TO DEFAULT FUNCTIONS 3.3V "RESET" 3 R268 10K 0402 R156 10K 0402 R154 10K 0402 LED9 RED LED001 3 R155 10K 0402 R153 330 0603 U22 1 MR 4 PFI DA_SOFT_RESET 1 U26 4 RESET ADM708SARZ SOIC8 2 SW11 MOMENTARY SWT024 8 RESET 7 RESET 5 PFO SN74LVC1G08 SOT23-5 3.3V 3.3V 3.3V 3.3V "RESET" R152 10K 0402 4 R170 10K 0402 U6 5 U6 6 74LVC14A SOIC14 R171 10K 0402 9 U6 8 74LVC14A SOIC14 R172 10K 0402 11 C121 0.01UF 0402 U6 10 74LVC14A SOIC14 C119 0.01UF 0402 13 ANALOG DEVICES C120 0.01UF 0402 12 74LVC14A SOIC14 Title Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD PUSHBUTTONS, RESET, LEDS Board No. C Date 20 Cotton Road Rev A0217-2008 0.2 Sheet 1-15-2009_11:11 D 12 of 16 A B C D 3.3V 3.3V PS_5V PS_5V D[0:15] A[1:19] J1 1 A1 2 A3 4 A5 6 A7 8 ADDR1 A9 10 A11 12 A13 14 A15 A17 A19 16 18 20 22 24 26 28 30 32 40 42 ABE1#/SDQM1 44 46 2 52 54 ADC_A0/LED1/MMC_D7/OTP_EN D1 56 D3 58 D5 60 D7 62 D9 64 D11 66 D13 68 D15 70 74 76 78 80 82 84 PS_5V 86 88 90 92 94 3 96 ADDR9 ADDR8 ADDR11 ADDR10 ADDR13 ADDR12 ADDR15 ADDR14 ADDR17 ADDR16 ADDR19 ADDR18 ADDR21 ADDR20 ADDR23 ADDR22 ADDR25 ADDR24 ADDR27 ADDR26 ADDR29 ADDR28 98 AOE ARE AMS0 AMS3 AMS2 ABE1 ABE0 ABE3 ABE2 NMI BG CLKOUT RESET GPIO1 GPIO2 GPIO3 GPIO4 DATA1 DATA0 DATA3 DATA2 DATA5 DATA4 DATA6 DATA9 DATA8 DATA11 DATA10 DATA13 DATA12 DATA15 DATA14 DATA17 DATA16 DATA19 DATA18 DATA21 DATA20 DATA23 DATA22 DATA25 DATA24 DATA27 DATA26 DATA29 DATA28 DATA31 DATA30 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 PWR_IN2 VDDIO1 102 ADDR30 AMS1 PWR_IN1 100 104 ADDR6 DATA7 72 3.3V ADDR7 BGH 50 CLKOUT ADDR4 BR 48 PB1/DR1PRI/MMC_D4 ADDR5 ARDY 38 AMS3/SPI0_SEL2 ADDR2 AWE 36 AMS1 ADDR3 ADDR31 34 AWE ADDR0 VDDIO2 3.3V1 QMS52X2_SMT GND1 GND2 GND3 GND4 3.3V2 1 3 A2 5 A4 7 A6 9 A8 11 A10 13 A12 15 17 19 TFS0/SD_D3 A14 AMS3/SPI0_SEL2 A16 ERXD2 A18 ERXD3 21 23 ERXDV 25 SPI0_SSEL1 MDIO 27 29 ERXD0 31 ERXD1 RMII_PHYINT 33 35 ARE TSCLK0/SD_CLK 37 AMS0 RESET 39 AMS2 41 ABE0#/SDQM0 43 45 NMI 47 49 RESET 51 PB2/RFS1/MMC_D5 53 CDG/ADC_A1/LED2 55 D0 57 D2 59 D4 61 D6 63 D8 SDA 65 D10 SCL 67 D12 69 D14 71 P3 1 GND1 3 GND2 5 GND3 7 GND4 9 GND5 11 GND6 13 PPI0FS1 15 PPI0FS3 17 PPI0D1 19 PPI0D3 21 PPI0D5 23 PPI0D7 25 PPI0D9 27 PPI0D11 29 PPI0D13 31 PPI0D15 33 PPI0D17 35 TIMER2/GPIO 37 RESET 39 PPI1FS1 41 PPI1FS3 43 PPI1D1/PPI0D19 45 PPI1D3/PPI0D21 47 PPI1D5/PPI0D23 49 PPI1D7 51 PPI1D9 53 PPI1D11 55 PPI1D13 57 PPI1D15 59 PPI1D17 61 SDA 63 SCL 65 RSVD2 67 RSVD4 69 RSVD6 IDC35X2_SMTA P2 PWR_IN1 PWR_IN2 VDDIO1 VDDIO2 3.3V1 3.3V2 PPI0FS2 PPI0CLK PPI0D0 PPI0D2 PPI0D4 PPI0D6 PPI0D8 PPI0D10 PPI0D12 PPI0D14 PPI0D16 TIMER1/GPIO TIMER3/GPIO PPI1FS2 PPI1CLK PP1D0/PPI0D18 PPI1D2/PPI0D20 PPI1D4/PPI0D22 PPI1D6 PPI1D8 PPI1D10 PPI1D12 PPI1D14 PPI1D16 NC RSVD1 RSVD3 RSVD5 RSVD7 2 1 4 3 6 5 8 7 10 9 12 11 14 13 16 18 20 22 24 26 28 30 32 DT0PRI/SD_CMD DT0PRI/SD_CMD RFS0/SD_D2 TSCLK0/SD_CLK ETXD3 TFS0/SD_D3 ERXCLK PB2/RFS1/MMC_D5 ETXD1 SCL 38 GND4 VDDIO2 GND5 3.3V1 GND6 3.3V2 TFS SPISEL2 SPISEL3 SPICLK UART0_TX 40 42 UARTRX UARTTX UARTRTSUARTCTS RESET NC GPIO1 GPIO2 GPIO3 GPIO4 39 41 WAKE SDA SCL 37 ADC_A0/LED1/MMC_D7/OTP_EN TIMER SPIMISO 35 PB1/DR1PRI/MMC_D4 SPISS SPIMOSI 31 RESET RFS SPISEL1 33 RSCLK0/SD_D1 RSCLK TSCLK 29 44 43 46 45 48 47 50 49 WAKE RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 IDC25X2_SMTA 52 4 6 8 10 12 UART0_RX 18 RSCLK0/SD_D1 20 RFS0/SD_D2 22 MIICRS/HWAIT 24 RSCLK1/MMC_D6 26 PB1/DR1PRI/MMC_D4 28 DR1SEC 30 SDA 32 UART0_RX 34 36 38 PB2/RFS1/MMC_D5 40 CDG/ADC_A1/LED2 42 44 46 48 50 2 56 58 3.3V 60 PS_5V 62 64 66 P4 68 1 70 3 5 73 7 75 9 77 11 79 ADC_A0/LED1/MMC_D7/OTP_EN 81 83 CZM/ADC_A2/LED3 85 CDG/ADC_A1/LED2 SPI0_SSEL3/CUD 87 89 SPI0_SSEL1 91 SPI0_SSEL3/CUD 93 SPI0_MOSI 95 SPI0_MISO 97 SCL 99 CZM/ADC_A2/LED3 13 15 17 19 23 25 27 29 RESET PB1/DR1PRI/MMC_D4 WAKE PWR_IN1 GND2 PWR_IN2 GND3 VDDIO1 GND4 VDDIO2 GND5 3.3V1 GND6 3.3V2 DTPRI DRPRI DTSEC DRSEC TSCLK RSCLK RFS SPISEL1 SPISEL2 SPISEL3 SPICLK SPIMOSI SPISS SPIMISO TIMER 31 SCL SDA UARTTX UARTRX UARTRTSUARTCTS 101 103 GND1 TFS 21 33 35 37 39 RESET NC GPIO1 GPIO2 GPIO3 41 43 45 47 GPIO4 WAKE RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 49 RSVD8 RSVD9 IDC25X2_SMTA ANALOG DEVICES 4 Size Board No. C Date C 2 4 6 8 10 12 14 PB1/DR1PRI/MMC_D4 16 DR1SEC 18 RSCLK1/MMC_D6 20 PB2/RFS1/MMC_D5 22 AMS3/SPI0_SEL2 24 SPI0_SCK 26 AMS2 28 3 DR1SEC 30 SDA 32 DR1SEC 34 36 38 PB2/RFS1/MMC_D5 40 CDG/ADC_A1/LED2 42 44 46 48 50 20 Cotton Road Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD EXPANSION INTERFACE Title B DR0PRI/SD_D0 16 54 ADC_A0/LED1/MMC_D7/OTP_EN A 1 14 DRSEC DTSEC 27 2 DRPRI DTPRI 25 34 36 VDDIO1 23 UART0_TX ETXEN GND3 21 ADC_A0/LED1/MMC_D7/OTP_EN ETXD0 PWR_IN2 19 AMS2 MDC GND2 17 CZM/ADC_A2/LED3 COL PWR_IN1 15 UART0_TX ETXD2 GND1 Rev A0217-2008 0.2 Sheet 12-10-2008_14:26 D 13 of 16 A B C D VDDOTP TP3 VPPOTP TP2 3.3V R182 2.0K 0603 1 C136 0.1UF 0603 L2 1UH IND019 SJ4 SHORTING JUMPER DEFAULT=NOT INSTALLED V- V+ 1 TRIM 3 ADR550B SOT23-3 L1 22UH IND018 "OTP FLAG ENBL" R180 1.91K 0603 1 1 IN 3 EN 2 GND IDC2X1 6 IN SW1 7 RT FB 3 SD SS 4 GND R173 10K 0402 C125 10UF 1210 C208 1UF 0603 D4 MBR130LSFT1G 1A SOD-123FL C127 10UF 1210 VR2 COMP C129 2.2UF 0805 5 OUT ADJ 5 R179 21.5K 0603 DNP 4 ADP1710 TSOT5 C133 1UF 0603 DNP 2 8 R183 10.0K 0603 C126 10UF 1210 D3 MBR130LSFT1G 1A SOD-123FL R178 10K 0603 DNP 1 R176 24.0K 0603 ADP1610 MSOP8 R352 21.5K 0603 VR3 JP14 2 1 R181 140.0K 0603 U11 2 ADC_A0/LED1/MMC_D7/OTP_EN D5 MBR130LSFT1G 1A SOD-123FL D2 MBR130LSFT1G 1A SOD-123FL PS_5V C131 22000PF 0402 R184 3.01K 0603 R351 0 0603 DNP R177 10K 0603 DNP C209 1UF 0603 DNP C132 2.2UF 0805 C135 10UF 1210 C130 2200PF 0603 2 2 L6 1UH IND019 -12V 1 2 L8 22UH IND024 3 D9 MBR130LSFT1G C201 10UF 1210 C200 10UF 1210 4 SOD-123FL C206 2.2UF 0805 PS_5V 1 2 L9 22UH IND024 3 3 C205 10UF 1210 R350 100K 0402 R349 10 0603 4 3 C204 2.2UF 0805 SOD-123FL L7 1UH IND019 +12V C207 1000PF 0603 R345 0 0603 DNP R346 0 0603 D10 MBR130LSFT1G R348 44.2K 0603 VR6 6 IN 7 RT FB 3 SD SS 4 GND C199 1UF 0603 C210 1UF 0603 DNP SW1 ADP1611 MSOP8 COMP C203 10UF 1210 C202 10UF 1210 5 2 8 1 R344 20.0K 0402 C197 22000PF 0402 R347 4.99K 0603 C198 3300PF 0603 ANALOG DEVICES 4 Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD OTP AND DUAL POWER Title Size 20 Cotton Road Rev A0217-2008 0.2 Sheet 1-15-2009_11:09 D 14 of 16 A B F1 3A FUS004 FER17 190 FER002 4 3 1 2 C PS_5V J3 1 C148 1000PF 1206 3 R267 0 0402 C149 10UF 1210 D8 MBRS540T3G 5A SMC 2 D WAKE POWER CON045 1 "5V" R185 4.3 1206 3.3V FER15 600 1206 C147 1000PF 1206 1 1.1 - 1.4V @ 500mA R188 4.3 1206 R190 0.05 1206 FER16 600 1206 VDDINT R186 1.2K 0402 SHGND R246 10K 0402 DNP U7 SHGND 1 W A 2 AD0 B 3 AD1 4 SDA SDA 5 SCL AD5258 MSOP10 SCL VCC GND VLOGIC TP4 P8 C141 4.7UF 0603 1 2 IDC2X1 VR5 10 1 EN GND1 2 IN GND2 3 OUT GND3 4 ADJ GND4 5 "VDDINT" 9 R189 1.0K 0402 8 C139 0.01UF 0402 6 7 SJ5 7 SHORTING JUMPER DEFAULT=INSTALLED 8 6 C140 0.1UF 0402 R187 2.67K 0402 C137 4.7UF 0603 C138 4.7UF 0603 ADP1715 MSOP8 R245 10K 0402 Remove P8 when measuring VDDINT 2 2 PS_5V 1.8V @ 500mA Remove P9 when measuring VDDEXT C142 10UF 0805 DNP C146 10UF 1210 SJ6 3 "VDDFLASH" SHORTING JUMPER DEFAULT=INSTALLLED 3.3V @ 2A 3 P11 1 3.3V TP11 2 TP8 VDDFLASH IDC2X1 PGND TP5 R196 0.05 1206 VR1 IN 1 COMP C144 68PF 0603 3 FB PGATE GND 2 R193 80.6K 0603 R194 0.05 1206 TP6 U8 4 6 ADP1864AUJZ SOT23-6 1 R195 0 0603 R204 0.05 1206 VR4 1 EN 2 IN 4 SS P9 1 2 VDDEXT IDC2X1 CS C143 470PF 0603 5 "VDDEXT" 5 2 6 3 7 4 8 L3 2.5UH IND013 R191 0.05 1206 C151 2.2UF 0805 OUT 5 6GND1 7GND2 8GND3 GND4 R192 24.9K 0603 3.3V C152 0.1UF 0402 3 C150 2.2UF 0805 Remove P11 when measuring VDDFLASH D7 MBRS540T3G SMC SI4411DY SO-8 CT6 220UF D2E CT5 2.2UF B DNP C145 4.7UF 0805 R198 0.05 1206 R197 255.0K 0603 TP7 SJ8 SHORTING JUMPER DEFAULT=INSTALLLED VDDMEM PGND P10 1 2 PGND IDC2X1 W2 COPPER 4 4A ANALOG DEVICES "VDDMEM" SJ7 SHORTING JUMPER DEFAULT=INSTALLLED PGND Remove P10 when measuring VDDMEM Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD POWER Title Size 20 Cotton Road Rev A0217-2008 0.2 Sheet 12-10-2008_14:26 D 15 of 15 A B RN1 1 D2 1 D3 2 D1 3 D0 4 R1A RN5 R1B R2A R2B R3A R3B R4A C R4B 8 D2_Z A5_Z 1 7 D3_Z A6_Z 2 6 D1_Z A8_Z 3 5 D0_Z A7_Z 4 R1A RN9 R1B R2A R2B R3A R3B R4A D R4B 8 A5 7 A6 6 A8 5 A7 PB1/DR1PRI/MMC_D4_Z PB2/RFS1/MMC_D5_Z 1 R1A 2 3 RSCLK1/MMC_D6_Z ADC_A0/LED1/MMC_D7/OTP_EN_Z 4 RN13 R1B R2A R2B R3A R3B R4A R4B 8 7 6 5 PB1/DR1PRI/MMC_D4 PB2/RFS1/MMC_D5 RSCLK1/MMC_D6 ADC_A0/LED1/MMC_D7/OTP_EN A19_Z 1 A18_Z 2 A17_Z 3 A16_Z 4 R1A R2A R3A R4A RN17 R1B R2B R3B R4B 8 A19 7 A18 6 A17 5 A16 1 SPI0_MOSI_Z R1A 2 SPI0_MISO_Z R2A R2B R3A R3B 3 SPI0_SCK_Z 4 AMS2_Z R4A 22 RNS005 33 RNS005 33 RNS005 33 RNS005 33 RNS005 RN2 RN6 RN10 RN14 RN18 D0 1 D1 2 D2 3 D3 4 R1A R1B R2A R2B R3A R3B R4A R4B 8 D0_ZZ A1_Z 1 7 D1_ZZ A2_Z 2 6 D2_ZZ A3_Z 3 5 D3_ZZ A4_Z 4 22 RNS005 R1A R1B R2A R2B R3A R3B R4A R4B 8 A1 7 A2 6 A3 5 A4 AMS0_Z AWE_Z ARE_Z AMS1_Z 1 R1A 2 3 4 33 RNS005 R1B R2A R2B R3A R3B R4A R4B 8 7 6 5 D7 AMS0 D6 AWE D5 ARE D4 AMS1 1 R1A 2 R2A 3 R3A 4 R4A R1B R2B R3B R4B 8 D7_Z 7 D6_Z 6 D5_Z 5 D4_Z 1 UART0_RX_Z R1A 2 UART0_TX_Z R2A 3 TSCLK0/SD_CLK_Z R3A 4 R4A DT0PRI/SD_CMD_Z 22 RNS005 33 RNS005 R1B R4B R1B R2B R3B R4B 8 SPI0_MOSI 7 1 SPI0_MISO 6 SPI0_SCK 5 AMS2 8 UART0_RX 7 UART0_TX 6 TSCLK0/SD_CLK 5 DT0PRI/SD_CMD 33 RNS005 2 2 RN3 3 D7_ZZ 1 D6_ZZ 2 D5_ZZ 3 D4_ZZ 4 R1A RN7 R1B R2A R2B R3A R3B R4A R4B 8 D7 7 D6 6 D5 5 D4 TFS0/SD_D3_Z RFS0/SD_D2_Z RSCLK0/SD_D1_Z DR0PRI/SD_D0_Z 1 R1A 2 3 4 RN11 R1B R2A R2B R3A R3B R4A R4B 8 7 6 5 TFS0/SD_D3 SCKE_Z RFS0/SD_D2 SMS_Z RSCLK0/SD_D1 SCAS_Z DR0PRI/SD_D0 SRAS_Z 1 R1A 2 3 4 RN15 R1B R2A R2B R3A R3B R4A R4B 8 7 6 5 D11 SCKE D10 SMS D9 SCAS D8 SRAS 1 R1A 2 R2A 3 R3A 4 R4A RN19 R1B R2B R3B R4B 8 D11_Z A15_Z 7 D10_Z A14_Z 6 D9_Z A13_Z 5 D8_Z 1 R1A 2 R2A 3 R3A 4 R4A RN16 RN20 4 RN12 A12_Z RN8 3 RN4 A11_Z 33 RNS005 2 22 RNS005 1 33 RNS005 A9_Z 33 RNS005 A10_Z 22 RNS005 R1A R1B R2A R2B R3A R3B R4A R4B 8 A9 7 A10 6 A11 5 A12 33 RNS005 SPI0_SSEL3/CUD_Z CDG/ADC_A1/LED2_Z CZM/ADC_A2/LED3_Z DR1SEC_Z 1 R1A 2 3 4 R1B R2A R2B R3A R3B R4A R4B 8 7 6 5 SPI0_SSEL3/CUD SWE_Z CDG/ADC_A1/LED2 SA10_Z CZM/ADC_A2/LED3 ABE0#/SDQM0_Z DR1SEC ABE1#/SDQM1_Z 33 RNS005 1 R1A 2 3 4 R1B R2A R2B R3A R3B R4A R4B 8 7 6 5 D15 SWE D14 SA10 D13 ABE0#/SDQM0 D12 ABE1#/SDQM1 33 RNS005 1 R1A 2 R2A 3 R3A 4 R4A R1B R2B R3B R4B 8 D15_Z D11_ZZ 7 D14_Z D10_ZZ 6 D13_Z D9_ZZ 5 D12_Z D8_ZZ 1 R1A 2 R2A 3 R3A 4 R4A 22 RNS005 R1B R2B R3B R4B R1B R2B R3B R4B 8 A15 7 A14 6 A13 5 8 D11 7 D10 6 D9 5 D8 3 22 RNS005 RN21 D15_ZZ 1 D14_ZZ 2 D13_ZZ 3 D12_ZZ 4 R1A R2A R3A R4A R1B R2B R3B R4B 8 D15 7 D14 6 D13 5 D12 22 RNS005 ANALOG DEVICES 4 Board No. C Date A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-BF518F EZ-BOARD SERIES TERMINATORS Title Size 20 Cotton Road Rev A0217-2008 0.2 Sheet 12-3-2008_14:30 D 16 of 16 I INDEX Numerics 2-wire interface (TWI), 2-3 A AD5258 digipot, 2-2 ADC7266 (U2), 2-9 ADC_A0-2 signal, 1-21 ADC channel select jumpers (JP17-28), 2-19 ADC range jumper (JP4), 2-17 ADM3202 line driver/receiver (U21), 1-19 ADP1715 low dropout regulator (LDO), 2-2 AMS0-3 select lines, 1-11, 2-9, 2-18 analog audio interface, See audio analog-to-digital converter (ADC), 1-12, 1-17, 1-18, 2-15, 2-17 architecture, of this EZ-Board, 2-2 ASYNC (asynchronous memory control) external memory banks 0-3, 1-10 audio interface, 1-17 codec (U31), 1-13, 1-15, 1-17, 2-10 dual connectors (J4-5), 1-18, 2-26 SPI/TWI select switch (SW16), 2-13 SPORT0 enable (SW15), 1-17, 2-13 test switches (SW22-23), 1-19, 2-15 B background telemetry channel (BTC), 1-25 battery holder connector (J12), 2-26 supply, 1-20 bill of materials, A-1 board schematic (ADSP-BF518F), B-1 boot modes, 2-8 mode select switch (SW1), 1-12, 1-14 C CDG signal, 1-21 audio codec, See audio configuration, of this EZ-Board, 1-4 ADSP-BF518F EZ-Board Evaluation System Manual I-1 INDEX connectors diagram of locations, 2-24 J12 (battery holder), 2-26 J13 (SD), 2-26 J14-15 (Ethernet), 1-17 J14 (Ethernet), 2-27 J15 (Ethernet), 2-27 J16-26 (SMA), 2-26 J1 (expansion interface II), 1-21, 2-25, 2-26 J2 (RS-232), 2-25 J3 (power), 1-6, 2-25 J4-5 (dual audio), 1-18, 2-26 J7 (SMA), 2-26 P1 (JTAG), 1-6, 1-22, 2-27 P2 (expansion interface II), 1-21, 2-27 P3 (expansion interface II), 1-15, 2-28 P4 (expansion interface II), 1-21, 2-27 P5-7 (DMAX land grid array), 1-22, 2-28 ZP1 (debug agent), 2-29 contents, of this EZ-Board package, 1-3 core voltage, 2-2 CUD (up) signal, 1-14, 1-15 customer support, xvii CZM signal, 1-21 D Das U-Boot, universal boot loader, 1-13 debug agent connector (ZP1), 2-29 default configuration, of this EZ-Board, 1-4 down signal (CDG), 1-15 DR1PRI signal, 1-21 E eMMC enable switches (SW20-21), 1-12 enable switch (SW20-21), 2-15 interface, 1-12 I-2 Ethernet interface, xiv, 1-13, 1-16 configuration switch (SW8), 2-11 connectors (J14-15), 1-17, 2-27 LEDs (LED4-8, LED10-12), 2-22 mode switch (SW17), 2-14 PHY IC (U29), 1-13 port 1 config switch (SW7), 1-16, 2-11 port 2 config switch (SW18), 1-16, 2-14 power down jumper (JP13), 2-17 reset push button (SW11), 2-12 example programs, 1-25 expansion interface II J1 connector, 1-21, 1-23, 2-25, 2-26 P2 connector, 1-19, 1-21, 1-23, 2-27 P3 connector, 1-15, 1-23, 2-28 P4 connector, 1-19, 1-21, 1-23, 2-27 external memory, 1-9, 1-10 F features, of this EZ-Board, xiii flag pins, See programmable flags by name (PFx, PGs, PHx) flash memory enable switch (SW6), 2-9 flash WP jumper (JP3), 2-17 G general-purpose IO pins (GPIO), 1-21, 2-8, 2-12, 2-14, 2-22 general-purpose push buttons (PB1-2), 1-21 GPIO enable switch, See SW2 I installation, of this EZ-Board, 1-4 IO voltage, 2-2 ADSP-BF518F EZ-Board Evaluation System Manual INDEX J M JTAG interface, 1-22 connector (P1), 1-6, 1-22, 2-27 jumpers diagram of locations, 2-16 JP11-12 (LED select), 2-17 JP13 (Ethernet power down), 2-17 JP14 (OTP flag enable), 2-18 JP15 (mic select), 1-17, 2-18 JP16 (SPI flash CS enable), 1-15, 2-18 JP17-28 (ADC channel select), 2-19 JP3 (flash WP), 2-17 JP4 (ADC range), 1-19, 2-17 JP6 (mic select), 1-17 P10 (VDDMEM power), 1-24, 2-20 P11 (VDDFLASH power), 1-24, 2-20 P17-28 (ADC channel select), 1-19 P8 (VDDINT power), 1-24, 2-19 P9 (VDDEXT power), 1-24, 2-19 MAC address, 1-16 media independent interface (MII), 1-16 Media Instruction Set Computing (MISC), xi memory map, of this EZ-Board, 1-9 MICBIAS signal, 2-18 MICIN signal, 2-18 microphone gain switch (SW5), 2-10 headphone select (SW6), 1-18, 2-10 select jumper (JP15), 1-17, 2-18 SPI/TWI switch (SW8), 1-17 Micro Signal Architecture (MSA), xi MMC_Dx signals, 1-21 K KSZ8893M PHY device, 2-14 L land grid array connectors (P5-7), 1-22, 2-28 LEDs diagram of locations, 2-21 LED10-12 (Ethernet), 2-22 LED1-3 (PH3, PH5-6), 1-21, 2-22 LED4-8 (Ethernet), 2-22 LED4 (USB monitor), 1-6 LED9 (reset), 2-22 power (LED13), 2-23 LED select jumpers (JP11-12), 2-17 license restrictions, xii, 1-8 N notation conventions, xxi O oscilloscope, 1-24 OTP_EN signal, 1-21 OTP flag enable jumper (JP14), 2-18 OTP memory writes, 2-18 P package contents, 1-3 parallel flash memory, xiii, 1-11 See also NAND, flash memory parallel peripheral interface (PPI), See PPI interface PF0-7 programmable flags, 2-3 PF8 programmable flag, 2-3 PF9-15 programmable flags, 2-3 PG0-10 programmable flags, 2-5 PG11 programmable flag, 2-5 PG12 programmable flag, 2-5 PG13-15 programmable flags, 2-5 PH0-1 programmable flags, 1-21, 2-6, 2-12 ADSP-BF518F EZ-Board Evaluation System Manual I-3 INDEX PH2 programmable flag, 2-6 PH3 programmable flag, 1-21, 2-6, 2-18, 2-22 PH4 programmable flag, 2-6 PH5-6 programmable flags, 1-21, 2-6, 2-22 PH7 programmable flag, 2-6 POST (power-on-self test) program, 1-12, 1-19, 1-24, 2-12 power 5V wall adaptor (P14), 1-3 connector (J3), 1-6, 2-25 LED (LED13), 2-23 measurements, 1-24 PPI interface connections, 1-15 expansion interface II connector (P3), 1-15, 2-28 programmable flag inputs PH0 -1, 1-21 R real-time clock (RTC), 1-20, 2-3 Reduced Instruction Set Computing (RISC), xi reference design info, 1-25 removable secure interface (RSI), 1-12 reset LED (LED9), 2-22 push button (SW11), 2-12 restrictions, of evaluation license, 1-8 RFS1 signal, 1-21 rotary encoder interface, 1-15 enable switch (SW19), 1-15, 2-14 with momentary switch (SW14), 2-13 RS-232 connector (J2), 2-25 RTC pin, 1-20 S schematic, of ADSP-BF518F EZ-Board, B-1 SD connector (J13), 2-26 SDRAM interface, 1-10, 1-11 I-4 secure digital (SD) interface, 1-12, 1-13 serial peripheral interconnect (SPI) ports, See SPI interface session startup procedure, 1-6 SMA connectors (J7, J16-26), 2-26 SPI0_SSEL2 signal, 2-18 SPI flash CS enable jumper (JP16), 2-18 SPI interface connections, 1-13 SPI/TWI switch (SW16), 1-17 SPISEL1 signal, 1-14 SPISEL2 signal, 1-13 SPISEL3 signal, 1-14 SPORT0 enable switch (SW15), 1-17, 2-13 SPORT1 enable switch (SW4), 1-18, 2-9 SRAM memory, 1-9 SSM2602 audio codec (U1), 2-13 standalone debug agent, xii, 1-4, 1-6, 1-8, 1-11, 1-22 SW10 (UART0 setup) switch, 2-12 SW11 (reset) push button, 2-12 SW12-13 (IO) push buttons, 2-12 SW14 (rotary encoder with momentary) switch, 2-13 SW15 (SPORT0 enable) switch, 1-17, 2-13 SW16 (SPI/TWI config) switch, 1-17, 2-13 SW17 (Ethernet mode) switch, 2-14 SW18 (Ethernet port 2 config) switch, 1-16, 2-14 SW19 (encoder enable) switch, 1-16, 2-14 SW1 (boot mode select) switch, 1-12, 1-14, 2-8 SW20-21 (eMMC enable) switches, 1-12 SW20 (eMMC enable) switch, 2-15 SW21 (eMMC enable) switch, 2-15 SW22-23 (test) switches, 1-19, 2-15 SW2 (push button enable) switch, 1-21, 2-8, 2-13 SW3 (flash enable) switch, 2-9 SW4 (SPORT1 enable) switch, 1-18, 2-9 SW5 (mic gain) switch, 1-17, 2-10 ADSP-BF518F EZ-Board Evaluation System Manual INDEX SW6 (mic select) switch, 1-18, 2-10 universal asynchronous receiver transmitter, See SW7 (Ethernet port 1 config) switch, 1-16, 2-11 UART0, UART1 SW8 (Ethernet config) switch, 2-11 USB monitor LED (LED4), 1-6 switches, diagram of locations, 2-7 system architecture, of this EZ-Board, 2-2 V T thumbwheel control, xiv TWI config switch (SW8), 1-17 U UART0 interface expansion interface II connectors (P2), 1-19, 2-27 reset push button (SW11), 2-12 setup switch (SW10), 2-12 UART1 interface enable switch (SW14), 2-12 expansion interface II connectors (P4), 1-19, 2-27 UART1_RX signal, 2-12, 2-18, 2-19 UART1_TX signal, 2-12, 2-18, 2-19 U-Boot, universal boot loader, 1-13 VDDEXT power jumper (P9), 2-19 voltage domain, 1-24 VDDFLASH power jumper (P11), 2-20 voltage domain, 1-24 VDDINT power jumper (P8), 2-19 voltage domain, 1-24 VDDMEM power jumper (P10), 2-20 voltage domain, 1-24 VisualDSP++ environment, 1-6 voltage planes, 1-23 W wall adaptor connector (J3), 1-6, 1-22 watchdog timer, 1-20 ADSP-BF518F EZ-Board Evaluation System Manual I-5